2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
10 * Copyright (C) 2013 Imagination Technologies Ltd.
12 #include <linux/errno.h>
13 #include <linux/sched.h>
14 #include <linux/sched/debug.h>
15 #include <linux/sched/task.h>
16 #include <linux/sched/task_stack.h>
17 #include <linux/tick.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/export.h>
23 #include <linux/ptrace.h>
24 #include <linux/mman.h>
25 #include <linux/personality.h>
26 #include <linux/sys.h>
27 #include <linux/init.h>
28 #include <linux/completion.h>
29 #include <linux/kallsyms.h>
30 #include <linux/random.h>
31 #include <linux/prctl.h>
34 #include <asm/bootinfo.h>
36 #include <asm/dsemul.h>
41 #include <asm/pgtable.h>
42 #include <asm/mipsregs.h>
43 #include <asm/processor.h>
45 #include <linux/uaccess.h>
48 #include <asm/isadep.h>
50 #include <asm/stacktrace.h>
51 #include <asm/irq_regs.h>
53 #ifdef CONFIG_HOTPLUG_CPU
54 void arch_cpu_idle_dead(void)
60 asmlinkage
void ret_from_fork(void);
61 asmlinkage
void ret_from_kernel_thread(void);
63 void start_thread(struct pt_regs
* regs
, unsigned long pc
, unsigned long sp
)
67 /* New thread loses kernel privileges. */
68 status
= regs
->cp0_status
& ~(ST0_CU0
|ST0_CU1
|ST0_FR
|KU_MASK
);
70 regs
->cp0_status
= status
;
72 clear_thread_flag(TIF_MSA_CTX_LIVE
);
74 atomic_set(¤t
->thread
.bd_emu_frame
, BD_EMUFRAME_NONE
);
80 void exit_thread(struct task_struct
*tsk
)
83 * User threads may have allocated a delay slot emulation frame.
84 * If so, clean up that allocation.
86 if (!(current
->flags
& PF_KTHREAD
))
87 dsemul_thread_cleanup(tsk
);
90 int arch_dup_task_struct(struct task_struct
*dst
, struct task_struct
*src
)
93 * Save any process state which is live in hardware registers to the
94 * parent context prior to duplication. This prevents the new child
95 * state becoming stale if the parent is preempted before copy_thread()
96 * gets a chance to save the parent's live hardware registers to the
101 if (is_msa_enabled())
103 else if (is_fpu_owner())
115 * Copy architecture-specific thread state
117 int copy_thread_tls(unsigned long clone_flags
, unsigned long usp
,
118 unsigned long kthread_arg
, struct task_struct
*p
, unsigned long tls
)
120 struct thread_info
*ti
= task_thread_info(p
);
121 struct pt_regs
*childregs
, *regs
= current_pt_regs();
122 unsigned long childksp
;
123 p
->set_child_tid
= p
->clear_child_tid
= NULL
;
125 childksp
= (unsigned long)task_stack_page(p
) + THREAD_SIZE
- 32;
127 /* set up new TSS. */
128 childregs
= (struct pt_regs
*) childksp
- 1;
129 /* Put the stack after the struct pt_regs. */
130 childksp
= (unsigned long) childregs
;
131 p
->thread
.cp0_status
= read_c0_status() & ~(ST0_CU2
|ST0_CU1
);
132 if (unlikely(p
->flags
& PF_KTHREAD
)) {
134 unsigned long status
= p
->thread
.cp0_status
;
135 memset(childregs
, 0, sizeof(struct pt_regs
));
136 ti
->addr_limit
= KERNEL_DS
;
137 p
->thread
.reg16
= usp
; /* fn */
138 p
->thread
.reg17
= kthread_arg
;
139 p
->thread
.reg29
= childksp
;
140 p
->thread
.reg31
= (unsigned long) ret_from_kernel_thread
;
141 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
142 status
= (status
& ~(ST0_KUP
| ST0_IEP
| ST0_IEC
)) |
143 ((status
& (ST0_KUC
| ST0_IEC
)) << 2);
147 childregs
->cp0_status
= status
;
153 childregs
->regs
[7] = 0; /* Clear error flag */
154 childregs
->regs
[2] = 0; /* Child gets zero as return value */
156 childregs
->regs
[29] = usp
;
157 ti
->addr_limit
= USER_DS
;
159 p
->thread
.reg29
= (unsigned long) childregs
;
160 p
->thread
.reg31
= (unsigned long) ret_from_fork
;
163 * New tasks lose permission to use the fpu. This accelerates context
164 * switching for most programs since they don't use the fpu.
166 childregs
->cp0_status
&= ~(ST0_CU2
|ST0_CU1
);
168 clear_tsk_thread_flag(p
, TIF_USEDFPU
);
169 clear_tsk_thread_flag(p
, TIF_USEDMSA
);
170 clear_tsk_thread_flag(p
, TIF_MSA_CTX_LIVE
);
172 #ifdef CONFIG_MIPS_MT_FPAFF
173 clear_tsk_thread_flag(p
, TIF_FPUBOUND
);
174 #endif /* CONFIG_MIPS_MT_FPAFF */
176 atomic_set(&p
->thread
.bd_emu_frame
, BD_EMUFRAME_NONE
);
178 if (clone_flags
& CLONE_SETTLS
)
184 #ifdef CONFIG_CC_STACKPROTECTOR
185 #include <linux/stackprotector.h>
186 unsigned long __stack_chk_guard __read_mostly
;
187 EXPORT_SYMBOL(__stack_chk_guard
);
190 struct mips_frame_info
{
192 unsigned long func_size
;
197 #define J_TARGET(pc,target) \
198 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
200 static inline int is_ra_save_ins(union mips_instruction
*ip
, int *poff
)
202 #ifdef CONFIG_CPU_MICROMIPS
205 * swm16 reglist,offset(sp)
206 * swm32 reglist,offset(sp)
208 * jradiussp - NOT SUPPORTED
210 * microMIPS is way more fun...
212 if (mm_insn_16bit(ip
->halfword
[1])) {
213 switch (ip
->mm16_r5_format
.opcode
) {
215 if (ip
->mm16_r5_format
.rt
!= 31)
218 *poff
= ip
->mm16_r5_format
.simmediate
;
219 *poff
= (*poff
<< 2) / sizeof(ulong
);
223 switch (ip
->mm16_m_format
.func
) {
225 *poff
= ip
->mm16_m_format
.imm
;
226 *poff
+= 1 + ip
->mm16_m_format
.rlist
;
227 *poff
= (*poff
<< 2) / sizeof(ulong
);
239 switch (ip
->i_format
.opcode
) {
241 if (ip
->i_format
.rs
!= 29)
243 if (ip
->i_format
.rt
!= 31)
246 *poff
= ip
->i_format
.simmediate
/ sizeof(ulong
);
250 switch (ip
->mm_m_format
.func
) {
252 if (ip
->mm_m_format
.rd
< 0x10)
254 if (ip
->mm_m_format
.base
!= 29)
257 *poff
= ip
->mm_m_format
.simmediate
;
258 *poff
+= (ip
->mm_m_format
.rd
& 0xf) * sizeof(u32
);
259 *poff
/= sizeof(ulong
);
269 /* sw / sd $ra, offset($sp) */
270 if ((ip
->i_format
.opcode
== sw_op
|| ip
->i_format
.opcode
== sd_op
) &&
271 ip
->i_format
.rs
== 29 && ip
->i_format
.rt
== 31) {
272 *poff
= ip
->i_format
.simmediate
/ sizeof(ulong
);
280 static inline int is_jump_ins(union mips_instruction
*ip
)
282 #ifdef CONFIG_CPU_MICROMIPS
284 * jr16,jrc,jalr16,jalr16
286 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
287 * jraddiusp - NOT SUPPORTED
289 * microMIPS is kind of more fun...
291 if (mm_insn_16bit(ip
->halfword
[1])) {
292 if ((ip
->mm16_r5_format
.opcode
== mm_pool16c_op
&&
293 (ip
->mm16_r5_format
.rt
& mm_jr16_op
) == mm_jr16_op
))
298 if (ip
->j_format
.opcode
== mm_j32_op
)
300 if (ip
->j_format
.opcode
== mm_jal32_op
)
302 if (ip
->r_format
.opcode
!= mm_pool32a_op
||
303 ip
->r_format
.func
!= mm_pool32axf_op
)
305 return ((ip
->u_format
.uimmediate
>> 6) & mm_jalr_op
) == mm_jalr_op
;
307 if (ip
->j_format
.opcode
== j_op
)
309 if (ip
->j_format
.opcode
== jal_op
)
311 if (ip
->r_format
.opcode
!= spec_op
)
313 return ip
->r_format
.func
== jalr_op
|| ip
->r_format
.func
== jr_op
;
317 static inline int is_sp_move_ins(union mips_instruction
*ip
)
319 #ifdef CONFIG_CPU_MICROMIPS
324 * jradiussp - NOT SUPPORTED
326 * microMIPS is not more fun...
328 if (mm_insn_16bit(ip
->halfword
[1])) {
329 return (ip
->mm16_r3_format
.opcode
== mm_pool16d_op
&&
330 ip
->mm16_r3_format
.simmediate
&& mm_addiusp_func
) ||
331 (ip
->mm16_r5_format
.opcode
== mm_pool16d_op
&&
332 ip
->mm16_r5_format
.rt
== 29);
335 return ip
->mm_i_format
.opcode
== mm_addiu32_op
&&
336 ip
->mm_i_format
.rt
== 29 && ip
->mm_i_format
.rs
== 29;
338 /* addiu/daddiu sp,sp,-imm */
339 if (ip
->i_format
.rs
!= 29 || ip
->i_format
.rt
!= 29)
341 if (ip
->i_format
.opcode
== addiu_op
|| ip
->i_format
.opcode
== daddiu_op
)
347 static int get_frame_info(struct mips_frame_info
*info
)
349 bool is_mmips
= IS_ENABLED(CONFIG_CPU_MICROMIPS
);
350 union mips_instruction insn
, *ip
, *ip_end
;
351 const unsigned int max_insns
= 128;
354 info
->pc_offset
= -1;
355 info
->frame_size
= 0;
357 ip
= (void *)msk_isa16_mode((ulong
)info
->func
);
361 ip_end
= (void *)ip
+ info
->func_size
;
363 for (i
= 0; i
< max_insns
&& ip
< ip_end
; i
++, ip
++) {
364 if (is_mmips
&& mm_insn_16bit(ip
->halfword
[0])) {
365 insn
.halfword
[0] = 0;
366 insn
.halfword
[1] = ip
->halfword
[0];
367 } else if (is_mmips
) {
368 insn
.halfword
[0] = ip
->halfword
[1];
369 insn
.halfword
[1] = ip
->halfword
[0];
371 insn
.word
= ip
->word
;
374 if (is_jump_ins(&insn
))
377 if (!info
->frame_size
) {
378 if (is_sp_move_ins(&insn
))
380 #ifdef CONFIG_CPU_MICROMIPS
381 if (mm_insn_16bit(ip
->halfword
[0]))
385 if (ip
->halfword
[0] & mm_addiusp_func
)
387 tmp
= (((ip
->halfword
[0] >> 1) & 0x1ff) << 2);
388 info
->frame_size
= -(signed short)(tmp
| ((tmp
& 0x100) ? 0xfe00 : 0));
390 tmp
= (ip
->halfword
[0] >> 1);
391 info
->frame_size
= -(signed short)(tmp
& 0xf);
393 ip
= (void *) &ip
->halfword
[1];
397 info
->frame_size
= - ip
->i_format
.simmediate
;
401 if (info
->pc_offset
== -1 &&
402 is_ra_save_ins(&insn
, &info
->pc_offset
))
405 if (info
->frame_size
&& info
->pc_offset
>= 0) /* nested */
407 if (info
->pc_offset
< 0) /* leaf */
409 /* prologue seems bogus... */
414 static struct mips_frame_info schedule_mfi __read_mostly
;
416 #ifdef CONFIG_KALLSYMS
417 static unsigned long get___schedule_addr(void)
419 return kallsyms_lookup_name("__schedule");
422 static unsigned long get___schedule_addr(void)
424 union mips_instruction
*ip
= (void *)schedule
;
428 for (i
= 0; i
< max_insns
; i
++, ip
++) {
429 if (ip
->j_format
.opcode
== j_op
)
430 return J_TARGET(ip
, ip
->j_format
.target
);
436 static int __init
frame_info_init(void)
438 unsigned long size
= 0;
439 #ifdef CONFIG_KALLSYMS
444 addr
= get___schedule_addr();
446 addr
= (unsigned long)schedule
;
448 #ifdef CONFIG_KALLSYMS
449 kallsyms_lookup_size_offset(addr
, &size
, &ofs
);
451 schedule_mfi
.func
= (void *)addr
;
452 schedule_mfi
.func_size
= size
;
454 get_frame_info(&schedule_mfi
);
457 * Without schedule() frame info, result given by
458 * thread_saved_pc() and get_wchan() are not reliable.
460 if (schedule_mfi
.pc_offset
< 0)
461 printk("Can't analyze schedule() prologue at %p\n", schedule
);
466 arch_initcall(frame_info_init
);
469 * Return saved PC of a blocked thread.
471 unsigned long thread_saved_pc(struct task_struct
*tsk
)
473 struct thread_struct
*t
= &tsk
->thread
;
475 /* New born processes are a special case */
476 if (t
->reg31
== (unsigned long) ret_from_fork
)
478 if (schedule_mfi
.pc_offset
< 0)
480 return ((unsigned long *)t
->reg29
)[schedule_mfi
.pc_offset
];
484 #ifdef CONFIG_KALLSYMS
485 /* generic stack unwinding function */
486 unsigned long notrace
unwind_stack_by_address(unsigned long stack_page
,
491 unsigned long low
, high
, irq_stack_high
;
492 struct mips_frame_info info
;
493 unsigned long size
, ofs
;
494 struct pt_regs
*regs
;
501 * IRQ stacks start at IRQ_STACK_START
502 * task stacks at THREAD_SIZE - 32
505 if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp
)) {
506 high
= stack_page
+ IRQ_STACK_START
;
507 irq_stack_high
= high
;
509 high
= stack_page
+ THREAD_SIZE
- 32;
514 * If we reached the top of the interrupt stack, start unwinding
515 * the interrupted task stack.
517 if (unlikely(*sp
== irq_stack_high
)) {
518 unsigned long task_sp
= *(unsigned long *)*sp
;
521 * Check that the pointer saved in the IRQ stack head points to
522 * something within the stack of the current task
524 if (!object_is_on_stack((void *)task_sp
))
528 * Follow pointer to tasks kernel stack frame where interrupted
531 regs
= (struct pt_regs
*)task_sp
;
533 if (!user_mode(regs
) && __kernel_text_address(pc
)) {
534 *sp
= regs
->regs
[29];
535 *ra
= regs
->regs
[31];
540 if (!kallsyms_lookup_size_offset(pc
, &size
, &ofs
))
543 * Return ra if an exception occurred at the first instruction
545 if (unlikely(ofs
== 0)) {
551 info
.func
= (void *)(pc
- ofs
);
552 info
.func_size
= ofs
; /* analyze from start to ofs */
553 leaf
= get_frame_info(&info
);
557 if (*sp
< low
|| *sp
+ info
.frame_size
> high
)
562 * For some extreme cases, get_frame_info() can
563 * consider wrongly a nested function as a leaf
564 * one. In that cases avoid to return always the
567 pc
= pc
!= *ra
? *ra
: 0;
569 pc
= ((unsigned long *)(*sp
))[info
.pc_offset
];
571 *sp
+= info
.frame_size
;
573 return __kernel_text_address(pc
) ? pc
: 0;
575 EXPORT_SYMBOL(unwind_stack_by_address
);
577 /* used by show_backtrace() */
578 unsigned long unwind_stack(struct task_struct
*task
, unsigned long *sp
,
579 unsigned long pc
, unsigned long *ra
)
581 unsigned long stack_page
= 0;
584 for_each_possible_cpu(cpu
) {
585 if (on_irq_stack(cpu
, *sp
)) {
586 stack_page
= (unsigned long)irq_stack
[cpu
];
592 stack_page
= (unsigned long)task_stack_page(task
);
594 return unwind_stack_by_address(stack_page
, sp
, pc
, ra
);
599 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
601 unsigned long get_wchan(struct task_struct
*task
)
603 unsigned long pc
= 0;
604 #ifdef CONFIG_KALLSYMS
606 unsigned long ra
= 0;
609 if (!task
|| task
== current
|| task
->state
== TASK_RUNNING
)
611 if (!task_stack_page(task
))
614 pc
= thread_saved_pc(task
);
616 #ifdef CONFIG_KALLSYMS
617 sp
= task
->thread
.reg29
+ schedule_mfi
.frame_size
;
619 while (in_sched_functions(pc
))
620 pc
= unwind_stack(task
, &sp
, pc
, &ra
);
628 * Don't forget that the stack pointer must be aligned on a 8 bytes
629 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
631 unsigned long arch_align_stack(unsigned long sp
)
633 if (!(current
->personality
& ADDR_NO_RANDOMIZE
) && randomize_va_space
)
634 sp
-= get_random_int() & ~PAGE_MASK
;
639 static void arch_dump_stack(void *info
)
641 struct pt_regs
*regs
;
643 regs
= get_irq_regs();
651 void arch_trigger_cpumask_backtrace(const cpumask_t
*mask
, bool exclude_self
)
653 long this_cpu
= get_cpu();
655 if (cpumask_test_cpu(this_cpu
, mask
) && !exclude_self
)
658 smp_call_function_many(mask
, arch_dump_stack
, NULL
, 1);
663 int mips_get_process_fp_mode(struct task_struct
*task
)
667 if (!test_tsk_thread_flag(task
, TIF_32BIT_FPREGS
))
668 value
|= PR_FP_MODE_FR
;
669 if (test_tsk_thread_flag(task
, TIF_HYBRID_FPREGS
))
670 value
|= PR_FP_MODE_FRE
;
675 static void prepare_for_fp_mode_switch(void *info
)
677 struct mm_struct
*mm
= info
;
679 if (current
->mm
== mm
)
683 int mips_set_process_fp_mode(struct task_struct
*task
, unsigned int value
)
685 const unsigned int known_bits
= PR_FP_MODE_FR
| PR_FP_MODE_FRE
;
686 struct task_struct
*t
;
689 /* Check the value is valid */
690 if (value
& ~known_bits
)
693 /* Avoid inadvertently triggering emulation */
694 if ((value
& PR_FP_MODE_FR
) && raw_cpu_has_fpu
&&
695 !(raw_current_cpu_data
.fpu_id
& MIPS_FPIR_F64
))
697 if ((value
& PR_FP_MODE_FRE
) && raw_cpu_has_fpu
&& !cpu_has_fre
)
700 /* FR = 0 not supported in MIPS R6 */
701 if (!(value
& PR_FP_MODE_FR
) && raw_cpu_has_fpu
&& cpu_has_mips_r6
)
704 /* Proceed with the mode switch */
707 /* Save FP & vector context, then disable FPU & MSA */
708 if (task
->signal
== current
->signal
)
711 /* Prevent any threads from obtaining live FP context */
712 atomic_set(&task
->mm
->context
.fp_mode_switching
, 1);
713 smp_mb__after_atomic();
716 * If there are multiple online CPUs then force any which are running
717 * threads in this process to lose their FPU context, which they can't
718 * regain until fp_mode_switching is cleared later.
720 if (num_online_cpus() > 1) {
721 /* No need to send an IPI for the local CPU */
722 max_users
= (task
->mm
== current
->mm
) ? 1 : 0;
724 if (atomic_read(¤t
->mm
->mm_users
) > max_users
)
725 smp_call_function(prepare_for_fp_mode_switch
,
726 (void *)current
->mm
, 1);
730 * There are now no threads of the process with live FP context, so it
731 * is safe to proceed with the FP mode switch.
733 for_each_thread(task
, t
) {
734 /* Update desired FP register width */
735 if (value
& PR_FP_MODE_FR
) {
736 clear_tsk_thread_flag(t
, TIF_32BIT_FPREGS
);
738 set_tsk_thread_flag(t
, TIF_32BIT_FPREGS
);
739 clear_tsk_thread_flag(t
, TIF_MSA_CTX_LIVE
);
742 /* Update desired FP single layout */
743 if (value
& PR_FP_MODE_FRE
)
744 set_tsk_thread_flag(t
, TIF_HYBRID_FPREGS
);
746 clear_tsk_thread_flag(t
, TIF_HYBRID_FPREGS
);
749 /* Allow threads to use FP again */
750 atomic_set(&task
->mm
->context
.fp_mode_switching
, 0);
756 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
757 void mips_dump_regs32(u32
*uregs
, const struct pt_regs
*regs
)
761 for (i
= MIPS32_EF_R1
; i
<= MIPS32_EF_R31
; i
++) {
762 /* k0/k1 are copied as zero. */
763 if (i
== MIPS32_EF_R26
|| i
== MIPS32_EF_R27
)
766 uregs
[i
] = regs
->regs
[i
- MIPS32_EF_R0
];
769 uregs
[MIPS32_EF_LO
] = regs
->lo
;
770 uregs
[MIPS32_EF_HI
] = regs
->hi
;
771 uregs
[MIPS32_EF_CP0_EPC
] = regs
->cp0_epc
;
772 uregs
[MIPS32_EF_CP0_BADVADDR
] = regs
->cp0_badvaddr
;
773 uregs
[MIPS32_EF_CP0_STATUS
] = regs
->cp0_status
;
774 uregs
[MIPS32_EF_CP0_CAUSE
] = regs
->cp0_cause
;
776 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
779 void mips_dump_regs64(u64
*uregs
, const struct pt_regs
*regs
)
783 for (i
= MIPS64_EF_R1
; i
<= MIPS64_EF_R31
; i
++) {
784 /* k0/k1 are copied as zero. */
785 if (i
== MIPS64_EF_R26
|| i
== MIPS64_EF_R27
)
788 uregs
[i
] = regs
->regs
[i
- MIPS64_EF_R0
];
791 uregs
[MIPS64_EF_LO
] = regs
->lo
;
792 uregs
[MIPS64_EF_HI
] = regs
->hi
;
793 uregs
[MIPS64_EF_CP0_EPC
] = regs
->cp0_epc
;
794 uregs
[MIPS64_EF_CP0_BADVADDR
] = regs
->cp0_badvaddr
;
795 uregs
[MIPS64_EF_CP0_STATUS
] = regs
->cp0_status
;
796 uregs
[MIPS64_EF_CP0_CAUSE
] = regs
->cp0_cause
;
798 #endif /* CONFIG_64BIT */