arch/mips/kernel/process.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
   7  * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
   8  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   9  * Copyright (C) 2004 Thiemo Seufer
  10  * Copyright (C) 2013  Imagination Technologies Ltd.
  11  */
  12 #include <linux/errno.h>
  13 #include <linux/sched.h>
  14 #include <linux/sched/debug.h>
  15 #include <linux/sched/task.h>
  16 #include <linux/sched/task_stack.h>
  17 #include <linux/tick.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/export.h>
  23 #include <linux/ptrace.h>
  24 #include <linux/mman.h>
  25 #include <linux/personality.h>
  26 #include <linux/sys.h>
  27 #include <linux/init.h>
  28 #include <linux/completion.h>
  29 #include <linux/kallsyms.h>
  30 #include <linux/random.h>
  31 #include <linux/prctl.h>
  32
  33 #include <asm/asm.h>
  34 #include <asm/bootinfo.h>
  35 #include <asm/cpu.h>
  36 #include <asm/dsemul.h>
  37 #include <asm/dsp.h>
  38 #include <asm/fpu.h>
  39 #include <asm/irq.h>
  40 #include <asm/msa.h>
  41 #include <asm/pgtable.h>
  42 #include <asm/mipsregs.h>
  43 #include <asm/processor.h>
  44 #include <asm/reg.h>
  45 #include <linux/uaccess.h>
  46 #include <asm/io.h>
  47 #include <asm/elf.h>
  48 #include <asm/isadep.h>
  49 #include <asm/inst.h>
  50 #include <asm/stacktrace.h>
  51 #include <asm/irq_regs.h>
  52
  53 #ifdef CONFIG_HOTPLUG_CPU
  54 void arch_cpu_idle_dead(void)
  55 {
  56         play_dead();
  57 }
  58 #endif
  59
  60 asmlinkage void ret_from_fork(void);
  61 asmlinkage void ret_from_kernel_thread(void);
  62
  63 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
  64 {
  65         unsigned long status;
  66
  67         /* New thread loses kernel privileges. */
  68         status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
  69         status |= KU_USER;
  70         regs->cp0_status = status;
  71         lose_fpu(0);
  72         clear_thread_flag(TIF_MSA_CTX_LIVE);
  73         clear_used_math();
  74         atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
  75         init_dsp();
  76         regs->cp0_epc = pc;
  77         regs->regs[29] = sp;
  78 }
  79
  80 void exit_thread(struct task_struct *tsk)
  81 {
  82         /*
  83          * User threads may have allocated a delay slot emulation frame.
  84          * If so, clean up that allocation.
  85          */
  86         if (!(current->flags & PF_KTHREAD))
  87                 dsemul_thread_cleanup(tsk);
  88 }
  89
  90 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  91 {
  92         /*
  93          * Save any process state which is live in hardware registers to the
  94          * parent context prior to duplication. This prevents the new child
  95          * state becoming stale if the parent is preempted before copy_thread()
  96          * gets a chance to save the parent's live hardware registers to the
  97          * child context.
  98          */
  99         preempt_disable();
 100
 101         if (is_msa_enabled())
 102                 save_msa(current);
 103         else if (is_fpu_owner())
 104                 _save_fp(current);
 105
 106         save_dsp(current);
 107
 108         preempt_enable();
 109
 110         *dst = *src;
 111         return 0;
 112 }
 113
 114 /*
 115  * Copy architecture-specific thread state
 116  */
 117 int copy_thread_tls(unsigned long clone_flags, unsigned long usp,
 118         unsigned long kthread_arg, struct task_struct *p, unsigned long tls)
 119 {
 120         struct thread_info *ti = task_thread_info(p);
 121         struct pt_regs *childregs, *regs = current_pt_regs();
 122         unsigned long childksp;
 123
 124         childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
 125
 126         /* set up new TSS. */
 127         childregs = (struct pt_regs *) childksp - 1;
 128         /*  Put the stack after the struct pt_regs.  */
 129         childksp = (unsigned long) childregs;
 130         p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
 131         if (unlikely(p->flags & PF_KTHREAD)) {
 132                 /* kernel thread */
 133                 unsigned long status = p->thread.cp0_status;
 134                 memset(childregs, 0, sizeof(struct pt_regs));
 135                 ti->addr_limit = KERNEL_DS;
 136                 p->thread.reg16 = usp; /* fn */
 137                 p->thread.reg17 = kthread_arg;
 138                 p->thread.reg29 = childksp;
 139                 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
 140 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
 141                 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
 142                          ((status & (ST0_KUC | ST0_IEC)) << 2);
 143 #else
 144                 status |= ST0_EXL;
 145 #endif
 146                 childregs->cp0_status = status;
 147                 return 0;
 148         }
 149
 150         /* user thread */
 151         *childregs = *regs;
 152         childregs->regs[7] = 0; /* Clear error flag */
 153         childregs->regs[2] = 0; /* Child gets zero as return value */
 154         if (usp)
 155                 childregs->regs[29] = usp;
 156         ti->addr_limit = USER_DS;
 157
 158         p->thread.reg29 = (unsigned long) childregs;
 159         p->thread.reg31 = (unsigned long) ret_from_fork;
 160
 161         /*
 162          * New tasks lose permission to use the fpu. This accelerates context
 163          * switching for most programs since they don't use the fpu.
 164          */
 165         childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
 166
 167         clear_tsk_thread_flag(p, TIF_USEDFPU);
 168         clear_tsk_thread_flag(p, TIF_USEDMSA);
 169         clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
 170
 171 #ifdef CONFIG_MIPS_MT_FPAFF
 172         clear_tsk_thread_flag(p, TIF_FPUBOUND);
 173 #endif /* CONFIG_MIPS_MT_FPAFF */
 174
 175         atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
 176
 177         if (clone_flags & CLONE_SETTLS)
 178                 ti->tp_value = tls;
 179
 180         return 0;
 181 }
 182
 183 #ifdef CONFIG_CC_STACKPROTECTOR
 184 #include <linux/stackprotector.h>
 185 unsigned long __stack_chk_guard __read_mostly;
 186 EXPORT_SYMBOL(__stack_chk_guard);
 187 #endif
 188
 189 struct mips_frame_info {
 190         void            *func;
 191         unsigned long   func_size;
 192         int             frame_size;
 193         int             pc_offset;
 194 };
 195
 196 #define J_TARGET(pc,target)     \
 197                 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
 198
 199 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
 200 {
 201 #ifdef CONFIG_CPU_MICROMIPS
 202         /*
 203          * swsp ra,offset
 204          * swm16 reglist,offset(sp)
 205          * swm32 reglist,offset(sp)
 206          * sw32 ra,offset(sp)
 207          * jradiussp - NOT SUPPORTED
 208          *
 209          * microMIPS is way more fun...
 210          */
 211         if (mm_insn_16bit(ip->halfword[1])) {
 212                 switch (ip->mm16_r5_format.opcode) {
 213                 case mm_swsp16_op:
 214                         if (ip->mm16_r5_format.rt != 31)
 215                                 return 0;
 216
 217                         *poff = ip->mm16_r5_format.simmediate;
 218                         *poff = (*poff << 2) / sizeof(ulong);
 219                         return 1;
 220
 221                 case mm_pool16c_op:
 222                         switch (ip->mm16_m_format.func) {
 223                         case mm_swm16_op:
 224                                 *poff = ip->mm16_m_format.imm;
 225                                 *poff += 1 + ip->mm16_m_format.rlist;
 226                                 *poff = (*poff << 2) / sizeof(ulong);
 227                                 return 1;
 228
 229                         default:
 230                                 return 0;
 231                         }
 232
 233                 default:
 234                         return 0;
 235                 }
 236         }
 237
 238         switch (ip->i_format.opcode) {
 239         case mm_sw32_op:
 240                 if (ip->i_format.rs != 29)
 241                         return 0;
 242                 if (ip->i_format.rt != 31)
 243                         return 0;
 244
 245                 *poff = ip->i_format.simmediate / sizeof(ulong);
 246                 return 1;
 247
 248         case mm_pool32b_op:
 249                 switch (ip->mm_m_format.func) {
 250                 case mm_swm32_func:
 251                         if (ip->mm_m_format.rd < 0x10)
 252                                 return 0;
 253                         if (ip->mm_m_format.base != 29)
 254                                 return 0;
 255
 256                         *poff = ip->mm_m_format.simmediate;
 257                         *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
 258                         *poff /= sizeof(ulong);
 259                         return 1;
 260                 default:
 261                         return 0;
 262                 }
 263
 264         default:
 265                 return 0;
 266         }
 267 #else
 268         /* sw / sd $ra, offset($sp) */
 269         if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
 270                 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
 271                 *poff = ip->i_format.simmediate / sizeof(ulong);
 272                 return 1;
 273         }
 274
 275         return 0;
 276 #endif
 277 }
 278
 279 static inline int is_jump_ins(union mips_instruction *ip)
 280 {
 281 #ifdef CONFIG_CPU_MICROMIPS
 282         /*
 283          * jr16,jrc,jalr16,jalr16
 284          * jal
 285          * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
 286          * jraddiusp - NOT SUPPORTED
 287          *
 288          * microMIPS is kind of more fun...
 289          */
 290         if (mm_insn_16bit(ip->halfword[1])) {
 291                 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
 292                     (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
 293                         return 1;
 294                 return 0;
 295         }
 296
 297         if (ip->j_format.opcode == mm_j32_op)
 298                 return 1;
 299         if (ip->j_format.opcode == mm_jal32_op)
 300                 return 1;
 301         if (ip->r_format.opcode != mm_pool32a_op ||
 302                         ip->r_format.func != mm_pool32axf_op)
 303                 return 0;
 304         return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
 305 #else
 306         if (ip->j_format.opcode == j_op)
 307                 return 1;
 308         if (ip->j_format.opcode == jal_op)
 309                 return 1;
 310         if (ip->r_format.opcode != spec_op)
 311                 return 0;
 312         return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
 313 #endif
 314 }
 315
 316 static inline int is_sp_move_ins(union mips_instruction *ip)
 317 {
 318 #ifdef CONFIG_CPU_MICROMIPS
 319         /*
 320          * addiusp -imm
 321          * addius5 sp,-imm
 322          * addiu32 sp,sp,-imm
 323          * jradiussp - NOT SUPPORTED
 324          *
 325          * microMIPS is not more fun...
 326          */
 327         if (mm_insn_16bit(ip->halfword[1])) {
 328                 return (ip->mm16_r3_format.opcode == mm_pool16d_op &&
 329                         ip->mm16_r3_format.simmediate && mm_addiusp_func) ||
 330                        (ip->mm16_r5_format.opcode == mm_pool16d_op &&
 331                         ip->mm16_r5_format.rt == 29);
 332         }
 333
 334         return ip->mm_i_format.opcode == mm_addiu32_op &&
 335                ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
 336 #else
 337         /* addiu/daddiu sp,sp,-imm */
 338         if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
 339                 return 0;
 340         if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
 341                 return 1;
 342 #endif
 343         return 0;
 344 }
 345
 346 static int get_frame_info(struct mips_frame_info *info)
 347 {
 348         bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
 349         union mips_instruction insn, *ip, *ip_end;
 350         const unsigned int max_insns = 128;
 351         unsigned int i;
 352
 353         info->pc_offset = -1;
 354         info->frame_size = 0;
 355
 356         ip = (void *)msk_isa16_mode((ulong)info->func);
 357         if (!ip)
 358                 goto err;
 359
 360         ip_end = (void *)ip + info->func_size;
 361
 362         for (i = 0; i < max_insns && ip < ip_end; i++, ip++) {
 363                 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
 364                         insn.halfword[0] = 0;
 365                         insn.halfword[1] = ip->halfword[0];
 366                 } else if (is_mmips) {
 367                         insn.halfword[0] = ip->halfword[1];
 368                         insn.halfword[1] = ip->halfword[0];
 369                 } else {
 370                         insn.word = ip->word;
 371                 }
 372
 373                 if (is_jump_ins(&insn))
 374                         break;
 375
 376                 if (!info->frame_size) {
 377                         if (is_sp_move_ins(&insn))
 378                         {
 379 #ifdef CONFIG_CPU_MICROMIPS
 380                                 if (mm_insn_16bit(ip->halfword[0]))
 381                                 {
 382                                         unsigned short tmp;
 383
 384                                         if (ip->halfword[0] & mm_addiusp_func)
 385                                         {
 386                                                 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
 387                                                 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
 388                                         } else {
 389                                                 tmp = (ip->halfword[0] >> 1);
 390                                                 info->frame_size = -(signed short)(tmp & 0xf);
 391                                         }
 392                                         ip = (void *) &ip->halfword[1];
 393                                         ip--;
 394                                 } else
 395 #endif
 396                                 info->frame_size = - ip->i_format.simmediate;
 397                         }
 398                         continue;
 399                 }
 400                 if (info->pc_offset == -1 &&
 401                     is_ra_save_ins(&insn, &info->pc_offset))
 402                         break;
 403         }
 404         if (info->frame_size && info->pc_offset >= 0) /* nested */
 405                 return 0;
 406         if (info->pc_offset < 0) /* leaf */
 407                 return 1;
 408         /* prologue seems bogus... */
 409 err:
 410         return -1;
 411 }
 412
 413 static struct mips_frame_info schedule_mfi __read_mostly;
 414
 415 #ifdef CONFIG_KALLSYMS
 416 static unsigned long get___schedule_addr(void)
 417 {
 418         return kallsyms_lookup_name("__schedule");
 419 }
 420 #else
 421 static unsigned long get___schedule_addr(void)
 422 {
 423         union mips_instruction *ip = (void *)schedule;
 424         int max_insns = 8;
 425         int i;
 426
 427         for (i = 0; i < max_insns; i++, ip++) {
 428                 if (ip->j_format.opcode == j_op)
 429                         return J_TARGET(ip, ip->j_format.target);
 430         }
 431         return 0;
 432 }
 433 #endif
 434
 435 static int __init frame_info_init(void)
 436 {
 437         unsigned long size = 0;
 438 #ifdef CONFIG_KALLSYMS
 439         unsigned long ofs;
 440 #endif
 441         unsigned long addr;
 442
 443         addr = get___schedule_addr();
 444         if (!addr)
 445                 addr = (unsigned long)schedule;
 446
 447 #ifdef CONFIG_KALLSYMS
 448         kallsyms_lookup_size_offset(addr, &size, &ofs);
 449 #endif
 450         schedule_mfi.func = (void *)addr;
 451         schedule_mfi.func_size = size;
 452
 453         get_frame_info(&schedule_mfi);
 454
 455         /*
 456          * Without schedule() frame info, result given by
 457          * thread_saved_pc() and get_wchan() are not reliable.
 458          */
 459         if (schedule_mfi.pc_offset < 0)
 460                 printk("Can't analyze schedule() prologue at %p\n", schedule);
 461
 462         return 0;
 463 }
 464
 465 arch_initcall(frame_info_init);
 466
 467 /*
 468  * Return saved PC of a blocked thread.
 469  */
 470 unsigned long thread_saved_pc(struct task_struct *tsk)
 471 {
 472         struct thread_struct *t = &tsk->thread;
 473
 474         /* New born processes are a special case */
 475         if (t->reg31 == (unsigned long) ret_from_fork)
 476                 return t->reg31;
 477         if (schedule_mfi.pc_offset < 0)
 478                 return 0;
 479         return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
 480 }
 481
 482
 483 #ifdef CONFIG_KALLSYMS
 484 /* generic stack unwinding function */
 485 unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
 486                                               unsigned long *sp,
 487                                               unsigned long pc,
 488                                               unsigned long *ra)
 489 {
 490         unsigned long low, high, irq_stack_high;
 491         struct mips_frame_info info;
 492         unsigned long size, ofs;
 493         struct pt_regs *regs;
 494         int leaf;
 495
 496         if (!stack_page)
 497                 return 0;
 498
 499         /*
 500          * IRQ stacks start at IRQ_STACK_START
 501          * task stacks at THREAD_SIZE - 32
 502          */
 503         low = stack_page;
 504         if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
 505                 high = stack_page + IRQ_STACK_START;
 506                 irq_stack_high = high;
 507         } else {
 508                 high = stack_page + THREAD_SIZE - 32;
 509                 irq_stack_high = 0;
 510         }
 511
 512         /*
 513          * If we reached the top of the interrupt stack, start unwinding
 514          * the interrupted task stack.
 515          */
 516         if (unlikely(*sp == irq_stack_high)) {
 517                 unsigned long task_sp = *(unsigned long *)*sp;
 518
 519                 /*
 520                  * Check that the pointer saved in the IRQ stack head points to
 521                  * something within the stack of the current task
 522                  */
 523                 if (!object_is_on_stack((void *)task_sp))
 524                         return 0;
 525
 526                 /*
 527                  * Follow pointer to tasks kernel stack frame where interrupted
 528                  * state was saved.
 529                  */
 530                 regs = (struct pt_regs *)task_sp;
 531                 pc = regs->cp0_epc;
 532                 if (!user_mode(regs) && __kernel_text_address(pc)) {
 533                         *sp = regs->regs[29];
 534                         *ra = regs->regs[31];
 535                         return pc;
 536                 }
 537                 return 0;
 538         }
 539         if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
 540                 return 0;
 541         /*
 542          * Return ra if an exception occurred at the first instruction
 543          */
 544         if (unlikely(ofs == 0)) {
 545                 pc = *ra;
 546                 *ra = 0;
 547                 return pc;
 548         }
 549
 550         info.func = (void *)(pc - ofs);
 551         info.func_size = ofs;   /* analyze from start to ofs */
 552         leaf = get_frame_info(&info);
 553         if (leaf < 0)
 554                 return 0;
 555
 556         if (*sp < low || *sp + info.frame_size > high)
 557                 return 0;
 558
 559         if (leaf)
 560                 /*
 561                  * For some extreme cases, get_frame_info() can
 562                  * consider wrongly a nested function as a leaf
 563                  * one. In that cases avoid to return always the
 564                  * same value.
 565                  */
 566                 pc = pc != *ra ? *ra : 0;
 567         else
 568                 pc = ((unsigned long *)(*sp))[info.pc_offset];
 569
 570         *sp += info.frame_size;
 571         *ra = 0;
 572         return __kernel_text_address(pc) ? pc : 0;
 573 }
 574 EXPORT_SYMBOL(unwind_stack_by_address);
 575
 576 /* used by show_backtrace() */
 577 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
 578                            unsigned long pc, unsigned long *ra)
 579 {
 580         unsigned long stack_page = 0;
 581         int cpu;
 582
 583         for_each_possible_cpu(cpu) {
 584                 if (on_irq_stack(cpu, *sp)) {
 585                         stack_page = (unsigned long)irq_stack[cpu];
 586                         break;
 587                 }
 588         }
 589
 590         if (!stack_page)
 591                 stack_page = (unsigned long)task_stack_page(task);
 592
 593         return unwind_stack_by_address(stack_page, sp, pc, ra);
 594 }
 595 #endif
 596
 597 /*
 598  * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
 599  */
 600 unsigned long get_wchan(struct task_struct *task)
 601 {
 602         unsigned long pc = 0;
 603 #ifdef CONFIG_KALLSYMS
 604         unsigned long sp;
 605         unsigned long ra = 0;
 606 #endif
 607
 608         if (!task || task == current || task->state == TASK_RUNNING)
 609                 goto out;
 610         if (!task_stack_page(task))
 611                 goto out;
 612
 613         pc = thread_saved_pc(task);
 614
 615 #ifdef CONFIG_KALLSYMS
 616         sp = task->thread.reg29 + schedule_mfi.frame_size;
 617
 618         while (in_sched_functions(pc))
 619                 pc = unwind_stack(task, &sp, pc, &ra);
 620 #endif
 621
 622 out:
 623         return pc;
 624 }
 625
 626 /*
 627  * Don't forget that the stack pointer must be aligned on a 8 bytes
 628  * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
 629  */
 630 unsigned long arch_align_stack(unsigned long sp)
 631 {
 632         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 633                 sp -= get_random_int() & ~PAGE_MASK;
 634
 635         return sp & ALMASK;
 636 }
 637
 638 static void arch_dump_stack(void *info)
 639 {
 640         struct pt_regs *regs;
 641
 642         regs = get_irq_regs();
 643
 644         if (regs)
 645                 show_regs(regs);
 646
 647         dump_stack();
 648 }
 649
 650 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
 651 {
 652         long this_cpu = get_cpu();
 653
 654         if (cpumask_test_cpu(this_cpu, mask) && !exclude_self)
 655                 dump_stack();
 656
 657         smp_call_function_many(mask, arch_dump_stack, NULL, 1);
 658
 659         put_cpu();
 660 }
 661
 662 int mips_get_process_fp_mode(struct task_struct *task)
 663 {
 664         int value = 0;
 665
 666         if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
 667                 value |= PR_FP_MODE_FR;
 668         if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
 669                 value |= PR_FP_MODE_FRE;
 670
 671         return value;
 672 }
 673
 674 static void prepare_for_fp_mode_switch(void *info)
 675 {
 676         struct mm_struct *mm = info;
 677
 678         if (current->mm == mm)
 679                 lose_fpu(1);
 680 }
 681
 682 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
 683 {
 684         const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
 685         struct task_struct *t;
 686         int max_users;
 687
 688         /* Check the value is valid */
 689         if (value & ~known_bits)
 690                 return -EOPNOTSUPP;
 691
 692         /* Avoid inadvertently triggering emulation */
 693         if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
 694             !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
 695                 return -EOPNOTSUPP;
 696         if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
 697                 return -EOPNOTSUPP;
 698
 699         /* FR = 0 not supported in MIPS R6 */
 700         if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
 701                 return -EOPNOTSUPP;
 702
 703         /* Proceed with the mode switch */
 704         preempt_disable();
 705
 706         /* Save FP & vector context, then disable FPU & MSA */
 707         if (task->signal == current->signal)
 708                 lose_fpu(1);
 709
 710         /* Prevent any threads from obtaining live FP context */
 711         atomic_set(&task->mm->context.fp_mode_switching, 1);
 712         smp_mb__after_atomic();
 713
 714         /*
 715          * If there are multiple online CPUs then force any which are running
 716          * threads in this process to lose their FPU context, which they can't
 717          * regain until fp_mode_switching is cleared later.
 718          */
 719         if (num_online_cpus() > 1) {
 720                 /* No need to send an IPI for the local CPU */
 721                 max_users = (task->mm == current->mm) ? 1 : 0;
 722
 723                 if (atomic_read(&current->mm->mm_users) > max_users)
 724                         smp_call_function(prepare_for_fp_mode_switch,
 725                                           (void *)current->mm, 1);
 726         }
 727
 728         /*
 729          * There are now no threads of the process with live FP context, so it
 730          * is safe to proceed with the FP mode switch.
 731          */
 732         for_each_thread(task, t) {
 733                 /* Update desired FP register width */
 734                 if (value & PR_FP_MODE_FR) {
 735                         clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
 736                 } else {
 737                         set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
 738                         clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
 739                 }
 740
 741                 /* Update desired FP single layout */
 742                 if (value & PR_FP_MODE_FRE)
 743                         set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
 744                 else
 745                         clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
 746         }
 747
 748         /* Allow threads to use FP again */
 749         atomic_set(&task->mm->context.fp_mode_switching, 0);
 750         preempt_enable();
 751
 752         return 0;
 753 }
 754
 755 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
 756 void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs)
 757 {
 758         unsigned int i;
 759
 760         for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
 761                 /* k0/k1 are copied as zero. */
 762                 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
 763                         uregs[i] = 0;
 764                 else
 765                         uregs[i] = regs->regs[i - MIPS32_EF_R0];
 766         }
 767
 768         uregs[MIPS32_EF_LO] = regs->lo;
 769         uregs[MIPS32_EF_HI] = regs->hi;
 770         uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
 771         uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
 772         uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
 773         uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
 774 }
 775 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
 776
 777 #ifdef CONFIG_64BIT
 778 void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs)
 779 {
 780         unsigned int i;
 781
 782         for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
 783                 /* k0/k1 are copied as zero. */
 784                 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
 785                         uregs[i] = 0;
 786                 else
 787                         uregs[i] = regs->regs[i - MIPS64_EF_R0];
 788         }
 789
 790         uregs[MIPS64_EF_LO] = regs->lo;
 791         uregs[MIPS64_EF_HI] = regs->hi;
 792         uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
 793         uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
 794         uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
 795         uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
 796 }
 797 #endif /* CONFIG_64BIT */