arch/mips/lib-32/watch.S

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Kernel debug stuff to use the Watch registers.
   7  * Useful to find stack overflows, dangling pointers etc.
   8  *
   9  * Copyright (C) 1995, 1996, 1999 by Ralf Baechle
  10  */
  11 #include <asm/asm.h>
  12 #include <asm/mipsregs.h>
  13 #include <asm/regdef.h>
  14
  15                 .set    noreorder
  16 /*
  17  * Parameter: a0 - logic address to watch
  18  *                 Currently only KSEG0 addresses are allowed!
  19  *            a1 - set bit #1 to trap on load references
  20  *                     bit #0 to trap on store references
  21  * Results  : none
  22  */
  23                 LEAF(__watch_set)
  24                 li      t0, 0x80000000
  25                 subu    a0, t0
  26                 ori     a0, 7
  27                 xori    a0, 7
  28                 or      a0, a1
  29                 mtc0    a0, CP0_WATCHLO
  30                 sw      a0, watch_savelo
  31
  32                 jr      ra
  33                  mtc0   zero, CP0_WATCHHI
  34                 END(__watch_set)
  35
  36 /*
  37  * Parameter: none
  38  * Results  : none
  39  */
  40                 LEAF(__watch_clear)
  41                 jr      ra
  42                  mtc0   zero, CP0_WATCHLO
  43                 END(__watch_clear)
  44
  45 /*
  46  * Parameter: none
  47  * Results  : none
  48  */
  49                 LEAF(__watch_reenable)
  50                 lw      t0, watch_savelo
  51                 jr      ra
  52                  mtc0   t0, CP0_WATCHLO
  53                 END(__watch_reenable)
  54
  55 /*
  56  * Saved value of the c0_watchlo register for watch_reenable()
  57  */
  58                 .data
  59 watch_savelo:   .word   0
  60                 .text