2 * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 * PROM library initialisation code.
22 #include <linux/config.h>
23 #include <linux/init.h>
24 #include <linux/string.h>
25 #include <linux/kernel.h>
27 #include <asm/bootinfo.h>
28 #include <asm/gt64120.h>
30 #include <asm/system.h>
32 #include <asm/mips-boards/prom.h>
33 #include <asm/mips-boards/generic.h>
34 #include <asm/mips-boards/bonito64.h>
35 #include <asm/mips-boards/msc01_pci.h>
37 #include <asm/mips-boards/malta.h>
40 extern int rs_kgdb_hook(int, int);
41 extern int rs_putDebugChar(char);
42 extern char rs_getDebugChar(void);
43 extern int saa9730_kgdb_hook(int);
44 extern int saa9730_putDebugChar(char);
45 extern char saa9730_getDebugChar(void);
49 int *_prom_argv
, *_prom_envp
;
52 * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
53 * This macro take care of sign extension, if running in 64-bit mode.
55 #define prom_envp(index) ((char *)(long)_prom_envp[(index)])
59 unsigned int mips_revision_corid
;
61 /* Bonito64 system controller register base. */
62 unsigned long _pcictrl_bonito
;
63 unsigned long _pcictrl_bonito_pcicfg
;
65 /* GT64120 system controller register base */
66 unsigned long _pcictrl_gt64120
;
68 /* MIPS System controller register base */
69 unsigned long _pcictrl_msc
;
71 char *prom_getenv(char *envname
)
74 * Return a pointer to the given environment variable.
75 * In 64-bit mode: we're using 64-bit pointers, but all pointers
76 * in the PROM structures are only 32-bit, so we need some
77 * workarounds, if we are running in 64-bit mode.
83 while (prom_envp(index
)) {
84 if(strncmp(envname
, prom_envp(index
), i
) == 0) {
85 return(prom_envp(index
+1));
93 static inline unsigned char str2hexnum(unsigned char c
)
95 if (c
>= '0' && c
<= '9')
97 if (c
>= 'a' && c
<= 'f')
102 static inline void str2eaddr(unsigned char *ea
, unsigned char *str
)
106 for (i
= 0; i
< 6; i
++) {
109 if((*str
== '.') || (*str
== ':'))
111 num
= str2hexnum(*str
++) << 4;
112 num
|= (str2hexnum(*str
++));
117 int get_ethernet_addr(char *ethernet_addr
)
121 ethaddr_str
= prom_getenv("ethaddr");
123 printk("ethaddr not set in boot prom\n");
126 str2eaddr(ethernet_addr
, ethaddr_str
);
128 if (init_debug
> 1) {
130 printk("get_ethernet_addr: ");
132 printk("%02x:", (unsigned char)*(ethernet_addr
+i
));
133 printk("%02x\n", *(ethernet_addr
+i
));
139 #ifdef CONFIG_SERIAL_8250_CONSOLE
140 static void __init
console_config(void)
142 char console_string
[40];
144 char parity
= '\0', bits
= '\0', flow
= '\0';
147 if ((strstr(prom_getcmdline(), "console=ttyS")) == NULL
) {
148 s
= prom_getenv("modetty0");
150 while (*s
>= '0' && *s
<= '9')
151 baud
= baud
*10 + *s
++ - '0';
153 if (*s
) parity
= *s
++;
157 if (*s
== 'h') flow
= 'r';
161 if (parity
!= 'n' && parity
!= 'o' && parity
!= 'e')
163 if (bits
!= '7' && bits
!= '8')
167 sprintf (console_string
, " console=ttyS0,%d%c%c%c", baud
, parity
, bits
, flow
);
168 strcat (prom_getcmdline(), console_string
);
169 prom_printf("Config serial console:%s\n", console_string
);
175 void __init
kgdb_config (void)
177 extern int (*generic_putDebugChar
)(char);
178 extern char (*generic_getDebugChar
)(void);
182 argptr
= prom_getcmdline();
183 if ((argptr
= strstr(argptr
, "kgdb=ttyS")) != NULL
) {
184 argptr
+= strlen("kgdb=ttyS");
185 if (*argptr
!= '0' && *argptr
!= '1')
186 printk("KGDB: Unknown serial line /dev/ttyS%c, "
187 "falling back to /dev/ttyS1\n", *argptr
);
188 line
= *argptr
== '0' ? 0 : 1;
189 printk("KGDB: Using serial line /dev/ttyS%d for session\n", line
);
192 if (*++argptr
== ',')
195 while ((c
= *++argptr
) && ('0' <= c
&& c
<= '9'))
196 speed
= speed
* 10 + c
- '0';
198 #ifdef CONFIG_MIPS_ATLAS
200 speed
= saa9730_kgdb_hook(speed
);
201 generic_putDebugChar
= saa9730_putDebugChar
;
202 generic_getDebugChar
= saa9730_getDebugChar
;
207 speed
= rs_kgdb_hook(line
, speed
);
208 generic_putDebugChar
= rs_putDebugChar
;
209 generic_getDebugChar
= rs_getDebugChar
;
212 prom_printf("KGDB: Using serial line /dev/ttyS%d at %d for session, "
213 "please connect your debugger\n", line
? 1 : 0, speed
);
217 for (s
= "Please connect GDB to this port\r\n"; *s
; )
218 generic_putDebugChar (*s
++);
222 /* Breakpoint is invoked after interrupts are initialised */
227 void __init
prom_init(void)
229 u32 start
, map
, mask
, data
;
232 _prom_argv
= (int *) fw_arg1
;
233 _prom_envp
= (int *) fw_arg2
;
235 mips_display_message("LINUX");
237 #ifdef CONFIG_MIPS_SEAD
238 set_io_port_base(KSEG1
);
241 * early setup of _pcictrl_bonito so that we can determine
242 * the system controller on a CORE_EMUL board
244 _pcictrl_bonito
= (unsigned long)ioremap(BONITO_REG_BASE
, BONITO_REG_SIZE
);
246 mips_revision_corid
= MIPS_REVISION_CORID
;
248 if (mips_revision_corid
== MIPS_REVISION_CORID_CORE_EMUL
) {
249 if (BONITO_PCIDID
== 0x0001df53 ||
250 BONITO_PCIDID
== 0x0003df53)
251 mips_revision_corid
= MIPS_REVISION_CORID_CORE_EMUL_BON
;
253 mips_revision_corid
= MIPS_REVISION_CORID_CORE_EMUL_MSC
;
255 switch(mips_revision_corid
) {
256 case MIPS_REVISION_CORID_QED_RM5261
:
257 case MIPS_REVISION_CORID_CORE_LV
:
258 case MIPS_REVISION_CORID_CORE_FPGA
:
259 case MIPS_REVISION_CORID_CORE_FPGAR2
:
261 * Setup the North bridge to do Master byte-lane swapping
262 * when running in bigendian.
264 _pcictrl_gt64120
= (unsigned long)ioremap(MIPS_GT_BASE
, 0x2000);
266 #ifdef CONFIG_CPU_LITTLE_ENDIAN
267 GT_WRITE(GT_PCI0_CMD_OFS
, GT_PCI0_CMD_MBYTESWAP_BIT
|
268 GT_PCI0_CMD_SBYTESWAP_BIT
);
270 GT_WRITE(GT_PCI0_CMD_OFS
, 0);
272 /* Fix up PCI I/O mapping if necessary (for Atlas). */
273 start
= GT_READ(GT_PCI0IOLD_OFS
);
274 map
= GT_READ(GT_PCI0IOREMAP_OFS
);
275 if ((start
& map
) != 0) {
277 GT_WRITE(GT_PCI0IOREMAP_OFS
, map
);
280 set_io_port_base(MALTA_GT_PORT_BASE
);
283 case MIPS_REVISION_CORID_CORE_EMUL_BON
:
284 case MIPS_REVISION_CORID_BONITO64
:
285 case MIPS_REVISION_CORID_CORE_20K
:
286 _pcictrl_bonito_pcicfg
= (unsigned long)ioremap(BONITO_PCICFG_BASE
, BONITO_PCICFG_SIZE
);
289 * Disable Bonito IOBC.
291 BONITO_PCIMEMBASECFG
= BONITO_PCIMEMBASECFG
&
292 ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED
|
293 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED
);
296 * Setup the North bridge to do Master byte-lane swapping
297 * when running in bigendian.
299 #ifdef CONFIG_CPU_LITTLE_ENDIAN
300 BONITO_BONGENCFG
= BONITO_BONGENCFG
&
301 ~(BONITO_BONGENCFG_MSTRBYTESWAP
|
302 BONITO_BONGENCFG_BYTESWAP
);
304 BONITO_BONGENCFG
= BONITO_BONGENCFG
|
305 BONITO_BONGENCFG_MSTRBYTESWAP
|
306 BONITO_BONGENCFG_BYTESWAP
;
309 set_io_port_base(MALTA_BONITO_PORT_BASE
);
312 case MIPS_REVISION_CORID_CORE_MSC
:
313 case MIPS_REVISION_CORID_CORE_FPGA2
:
314 case MIPS_REVISION_CORID_CORE_EMUL_MSC
:
315 _pcictrl_msc
= (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE
, 0x2000);
318 MSC_READ(MSC01_PCI_CFG
, data
);
319 MSC_WRITE(MSC01_PCI_CFG
, data
& ~MSC01_PCI_CFG_EN_BIT
);
322 /* Fix up lane swapping. */
323 #ifdef CONFIG_CPU_LITTLE_ENDIAN
324 MSC_WRITE(MSC01_PCI_SWAP
, MSC01_PCI_SWAP_NOSWAP
);
326 MSC_WRITE(MSC01_PCI_SWAP
,
327 MSC01_PCI_SWAP_BYTESWAP
<< MSC01_PCI_SWAP_IO_SHF
|
328 MSC01_PCI_SWAP_BYTESWAP
<< MSC01_PCI_SWAP_MEM_SHF
|
329 MSC01_PCI_SWAP_BYTESWAP
<< MSC01_PCI_SWAP_BAR0_SHF
);
331 /* Fix up target memory mapping. */
332 MSC_READ(MSC01_PCI_BAR0
, mask
);
333 MSC_WRITE(MSC01_PCI_P2SCMSKL
, mask
& MSC01_PCI_BAR0_SIZE_MSK
);
335 /* Don't handle target retries indefinitely. */
336 if ((data
& MSC01_PCI_CFG_MAXRTRY_MSK
) ==
337 MSC01_PCI_CFG_MAXRTRY_MSK
)
338 data
= (data
& ~(MSC01_PCI_CFG_MAXRTRY_MSK
<<
339 MSC01_PCI_CFG_MAXRTRY_SHF
)) |
340 ((MSC01_PCI_CFG_MAXRTRY_MSK
- 1) <<
341 MSC01_PCI_CFG_MAXRTRY_SHF
);
344 MSC_WRITE(MSC01_PCI_CFG
, data
);
347 set_io_port_base(MALTA_MSC_PORT_BASE
);
351 /* Unknown Core card */
352 mips_display_message("CC Error");
353 while(1); /* We die here... */
356 prom_printf("\nLINUX started...\n");
359 #ifdef CONFIG_SERIAL_8250_CONSOLE