arch/mips/mm/dma-default.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2000  Ani Joshi <ajoshi@unixbox.com>
   7  * Copyright (C) 2000, 2001, 06  Ralf Baechle <ralf@linux-mips.org>
   8  * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
   9  */
  10
  11 #include <linux/types.h>
  12 #include <linux/dma-mapping.h>
  13 #include <linux/mm.h>
  14 #include <linux/module.h>
  15 #include <linux/scatterlist.h>
  16 #include <linux/string.h>
  17 #include <linux/gfp.h>
  18 #include <linux/highmem.h>
  19
  20 #include <asm/cache.h>
  21 #include <asm/io.h>
  22
  23 #include <dma-coherence.h>
  24
  25 int coherentio = 0;     /* User defined DMA coherency from command line. */
  26 EXPORT_SYMBOL_GPL(coherentio);
  27 int hw_coherentio = 0;  /* Actual hardware supported DMA coherency setting. */
  28
  29 static int __init setcoherentio(char *str)
  30 {
  31         coherentio = 1;
  32         pr_info("Hardware DMA cache coherency (command line)\n");
  33         return 0;
  34 }
  35 early_param("coherentio", setcoherentio);
  36
  37 static int __init setnocoherentio(char *str)
  38 {
  39         coherentio = 0;
  40         pr_info("Software DMA cache coherency (command line)\n");
  41         return 0;
  42 }
  43 early_param("nocoherentio", setnocoherentio);
  44
  45 static inline struct page *dma_addr_to_page(struct device *dev,
  46         dma_addr_t dma_addr)
  47 {
  48         return pfn_to_page(
  49                 plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
  50 }
  51
  52 /*
  53  * Warning on the terminology - Linux calls an uncached area coherent;
  54  * MIPS terminology calls memory areas with hardware maintained coherency
  55  * coherent.
  56  */
  57
  58 static inline int cpu_is_noncoherent_r10000(struct device *dev)
  59 {
  60         return !plat_device_is_coherent(dev) &&
  61                (current_cpu_type() == CPU_R10000 ||
  62                current_cpu_type() == CPU_R12000);
  63 }
  64
  65 static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
  66 {
  67         gfp_t dma_flag;
  68
  69         /* ignore region specifiers */
  70         gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
  71
  72 #ifdef CONFIG_ISA
  73         if (dev == NULL)
  74                 dma_flag = __GFP_DMA;
  75         else
  76 #endif
  77 #if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA)
  78              if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
  79                         dma_flag = __GFP_DMA;
  80         else if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
  81                         dma_flag = __GFP_DMA32;
  82         else
  83 #endif
  84 #if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA)
  85              if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
  86                 dma_flag = __GFP_DMA32;
  87         else
  88 #endif
  89 #if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32)
  90              if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
  91                 dma_flag = __GFP_DMA;
  92         else
  93 #endif
  94                 dma_flag = 0;
  95
  96         /* Don't invoke OOM killer */
  97         gfp |= __GFP_NORETRY;
  98
  99         return gfp | dma_flag;
 100 }
 101
 102 void *dma_alloc_noncoherent(struct device *dev, size_t size,
 103         dma_addr_t * dma_handle, gfp_t gfp)
 104 {
 105         void *ret;
 106
 107         gfp = massage_gfp_flags(dev, gfp);
 108
 109         ret = (void *) __get_free_pages(gfp, get_order(size));
 110
 111         if (ret != NULL) {
 112                 memset(ret, 0, size);
 113                 *dma_handle = plat_map_dma_mem(dev, ret, size);
 114         }
 115
 116         return ret;
 117 }
 118 EXPORT_SYMBOL(dma_alloc_noncoherent);
 119
 120 static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
 121         dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
 122 {
 123         void *ret;
 124
 125         if (dma_alloc_from_coherent(dev, size, dma_handle, &ret))
 126                 return ret;
 127
 128         gfp = massage_gfp_flags(dev, gfp);
 129
 130         ret = (void *) __get_free_pages(gfp, get_order(size));
 131
 132         if (ret) {
 133                 memset(ret, 0, size);
 134                 *dma_handle = plat_map_dma_mem(dev, ret, size);
 135
 136                 if (!plat_device_is_coherent(dev)) {
 137                         dma_cache_wback_inv((unsigned long) ret, size);
 138                         if (!hw_coherentio)
 139                                 ret = UNCAC_ADDR(ret);
 140                 }
 141         }
 142
 143         return ret;
 144 }
 145
 146
 147 void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
 148         dma_addr_t dma_handle)
 149 {
 150         plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
 151         free_pages((unsigned long) vaddr, get_order(size));
 152 }
 153 EXPORT_SYMBOL(dma_free_noncoherent);
 154
 155 static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 156         dma_addr_t dma_handle, struct dma_attrs *attrs)
 157 {
 158         unsigned long addr = (unsigned long) vaddr;
 159         int order = get_order(size);
 160
 161         if (dma_release_from_coherent(dev, order, vaddr))
 162                 return;
 163
 164         plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
 165
 166         if (!plat_device_is_coherent(dev) && !hw_coherentio)
 167                 addr = CAC_ADDR(addr);
 168
 169         free_pages(addr, get_order(size));
 170 }
 171
 172 static inline void __dma_sync_virtual(void *addr, size_t size,
 173         enum dma_data_direction direction)
 174 {
 175         switch (direction) {
 176         case DMA_TO_DEVICE:
 177                 dma_cache_wback((unsigned long)addr, size);
 178                 break;
 179
 180         case DMA_FROM_DEVICE:
 181                 dma_cache_inv((unsigned long)addr, size);
 182                 break;
 183
 184         case DMA_BIDIRECTIONAL:
 185                 dma_cache_wback_inv((unsigned long)addr, size);
 186                 break;
 187
 188         default:
 189                 BUG();
 190         }
 191 }
 192
 193 /*
 194  * A single sg entry may refer to multiple physically contiguous
 195  * pages. But we still need to process highmem pages individually.
 196  * If highmem is not configured then the bulk of this loop gets
 197  * optimized out.
 198  */
 199 static inline void __dma_sync(struct page *page,
 200         unsigned long offset, size_t size, enum dma_data_direction direction)
 201 {
 202         size_t left = size;
 203
 204         do {
 205                 size_t len = left;
 206
 207                 if (PageHighMem(page)) {
 208                         void *addr;
 209
 210                         if (offset + len > PAGE_SIZE) {
 211                                 if (offset >= PAGE_SIZE) {
 212                                         page += offset >> PAGE_SHIFT;
 213                                         offset &= ~PAGE_MASK;
 214                                 }
 215                                 len = PAGE_SIZE - offset;
 216                         }
 217
 218                         addr = kmap_atomic(page);
 219                         __dma_sync_virtual(addr + offset, len, direction);
 220                         kunmap_atomic(addr);
 221                 } else
 222                         __dma_sync_virtual(page_address(page) + offset,
 223                                            size, direction);
 224                 offset = 0;
 225                 page++;
 226                 left -= len;
 227         } while (left);
 228 }
 229
 230 static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
 231         size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
 232 {
 233         if (cpu_is_noncoherent_r10000(dev))
 234                 __dma_sync(dma_addr_to_page(dev, dma_addr),
 235                            dma_addr & ~PAGE_MASK, size, direction);
 236
 237         plat_unmap_dma_mem(dev, dma_addr, size, direction);
 238 }
 239
 240 static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg,
 241         int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
 242 {
 243         int i;
 244
 245         for (i = 0; i < nents; i++, sg++) {
 246                 if (!plat_device_is_coherent(dev))
 247                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 248                                    direction);
 249 #ifdef CONFIG_NEED_SG_DMA_LENGTH
 250                 sg->dma_length = sg->length;
 251 #endif
 252                 sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
 253                                   sg->offset;
 254         }
 255
 256         return nents;
 257 }
 258
 259 static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
 260         unsigned long offset, size_t size, enum dma_data_direction direction,
 261         struct dma_attrs *attrs)
 262 {
 263         if (!plat_device_is_coherent(dev))
 264                 __dma_sync(page, offset, size, direction);
 265
 266         return plat_map_dma_mem_page(dev, page) + offset;
 267 }
 268
 269 static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
 270         int nhwentries, enum dma_data_direction direction,
 271         struct dma_attrs *attrs)
 272 {
 273         int i;
 274
 275         for (i = 0; i < nhwentries; i++, sg++) {
 276                 if (!plat_device_is_coherent(dev) &&
 277                     direction != DMA_TO_DEVICE)
 278                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 279                                    direction);
 280                 plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
 281         }
 282 }
 283
 284 static void mips_dma_sync_single_for_cpu(struct device *dev,
 285         dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
 286 {
 287         if (cpu_is_noncoherent_r10000(dev))
 288                 __dma_sync(dma_addr_to_page(dev, dma_handle),
 289                            dma_handle & ~PAGE_MASK, size, direction);
 290 }
 291
 292 static void mips_dma_sync_single_for_device(struct device *dev,
 293         dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
 294 {
 295         plat_extra_sync_for_device(dev);
 296         if (!plat_device_is_coherent(dev))
 297                 __dma_sync(dma_addr_to_page(dev, dma_handle),
 298                            dma_handle & ~PAGE_MASK, size, direction);
 299 }
 300
 301 static void mips_dma_sync_sg_for_cpu(struct device *dev,
 302         struct scatterlist *sg, int nelems, enum dma_data_direction direction)
 303 {
 304         int i;
 305
 306         /* Make sure that gcc doesn't leave the empty loop body.  */
 307         for (i = 0; i < nelems; i++, sg++) {
 308                 if (cpu_is_noncoherent_r10000(dev))
 309                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 310                                    direction);
 311         }
 312 }
 313
 314 static void mips_dma_sync_sg_for_device(struct device *dev,
 315         struct scatterlist *sg, int nelems, enum dma_data_direction direction)
 316 {
 317         int i;
 318
 319         /* Make sure that gcc doesn't leave the empty loop body.  */
 320         for (i = 0; i < nelems; i++, sg++) {
 321                 if (!plat_device_is_coherent(dev))
 322                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 323                                    direction);
 324         }
 325 }
 326
 327 int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 328 {
 329         return plat_dma_mapping_error(dev, dma_addr);
 330 }
 331
 332 int mips_dma_supported(struct device *dev, u64 mask)
 333 {
 334         return plat_dma_supported(dev, mask);
 335 }
 336
 337 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
 338                          enum dma_data_direction direction)
 339 {
 340         BUG_ON(direction == DMA_NONE);
 341
 342         plat_extra_sync_for_device(dev);
 343         if (!plat_device_is_coherent(dev))
 344                 __dma_sync_virtual(vaddr, size, direction);
 345 }
 346
 347 EXPORT_SYMBOL(dma_cache_sync);
 348
 349 static struct dma_map_ops mips_default_dma_map_ops = {
 350         .alloc = mips_dma_alloc_coherent,
 351         .free = mips_dma_free_coherent,
 352         .map_page = mips_dma_map_page,
 353         .unmap_page = mips_dma_unmap_page,
 354         .map_sg = mips_dma_map_sg,
 355         .unmap_sg = mips_dma_unmap_sg,
 356         .sync_single_for_cpu = mips_dma_sync_single_for_cpu,
 357         .sync_single_for_device = mips_dma_sync_single_for_device,
 358         .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
 359         .sync_sg_for_device = mips_dma_sync_sg_for_device,
 360         .mapping_error = mips_dma_mapping_error,
 361         .dma_supported = mips_dma_supported
 362 };
 363
 364 struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
 365 EXPORT_SYMBOL(mips_dma_map_ops);
 366
 367 #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
 368
 369 static int __init mips_dma_init(void)
 370 {
 371         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
 372
 373         return 0;
 374 }
 375 fs_initcall(mips_dma_init);