arch/mips/pci/fixup-rbtx4927.c

   1 /*
   2  *
   3  * BRIEF MODULE DESCRIPTION
   4  *      Board specific pci fixups for the Toshiba rbtx4927
   5  *
   6  * Copyright 2001 MontaVista Software Inc.
   7  * Author: MontaVista Software, Inc.
   8  *              ppopov@mvista.com or source@mvista.com
   9  *
  10  * Copyright (C) 2000-2001 Toshiba Corporation
  11  *
  12  * Copyright (C) 2004 MontaVista Software Inc.
  13  * Author: Manish Lachwani (mlachwani@mvista.com)
  14  *
  15  *  This program is free software; you can redistribute  it and/or modify it
  16  *  under  the terms of  the GNU General  Public License as published by the
  17  *  Free Software Foundation;  either version 2 of the  License, or (at your
  18  *  option) any later version.
  19  *
  20  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  21  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  22  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  23  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  24  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  26  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  27  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  28  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  29  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  *  You should have received a copy of the  GNU General Public License along
  32  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  33  *  675 Mass Ave, Cambridge, MA 02139, USA.
  34  */
  35 #include <linux/types.h>
  36 #include <linux/pci.h>
  37 #include <linux/kernel.h>
  38 #include <linux/init.h>
  39
  40 #include <asm/txx9/tx4927.h>
  41
  42 #undef  DEBUG
  43 #ifdef  DEBUG
  44 #define DBG(x...)       printk(x)
  45 #else
  46 #define DBG(x...)
  47 #endif
  48
  49 /* look up table for backplane pci irq for slots 17-20 by pin # */
  50 static unsigned char backplane_pci_irq[4][4] = {
  51         /* PJ6 SLOT:  17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
  52                                      /* PJ6 SLOT:  17, PIN: 2 */
  53                                      TX4927_IRQ_IOC_PCIB,
  54                                      /* PJ6 SLOT:  17, PIN: 3 */
  55                                      TX4927_IRQ_IOC_PCIC,
  56                                      /* PJ6 SLOT:  17, PIN: 4 */
  57                                      TX4927_IRQ_IOC_PCID},
  58         /* SB  SLOT:  18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
  59                                      /* SB  SLOT:  18, PIN: 2 */
  60                                      TX4927_IRQ_IOC_PCIC,
  61                                      /* SB  SLOT:  18, PIN: 3 */
  62                                      TX4927_IRQ_IOC_PCID,
  63                                      /* SB  SLOT:  18, PIN: 4 */
  64                                      TX4927_IRQ_IOC_PCIA},
  65         /* PJ5 SLOT:  19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
  66                                      /* PJ5 SLOT:  19, PIN: 2 */
  67                                      TX4927_IRQ_IOC_PCID,
  68                                      /* PJ5 SLOT:  19, PIN: 3 */
  69                                      TX4927_IRQ_IOC_PCIA,
  70                                      /* PJ5 SLOT:  19, PIN: 4 */
  71                                      TX4927_IRQ_IOC_PCIB},
  72         /* PJ4 SLOT:  20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
  73                                      /* PJ4 SLOT:  20, PIN: 2 */
  74                                      TX4927_IRQ_IOC_PCIA,
  75                                      /* PJ4 SLOT:  20, PIN: 3 */
  76                                      TX4927_IRQ_IOC_PCIB,
  77                                      /* PJ4 SLOT:  20, PIN: 4 */
  78                                      TX4927_IRQ_IOC_PCIC}
  79 };
  80
  81 static int pci_get_irq(const struct pci_dev *dev, int pin)
  82 {
  83         unsigned char irq = pin;
  84
  85         DBG("pci_get_irq: pin is %d\n", pin);
  86         /* IRQ rotation */
  87         irq--;                  /* 0-3 */
  88         if (dev->bus->parent == NULL &&
  89             PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
  90                 printk("Onboard PCI_SLOT(dev->devfn) is %d\n",
  91                        PCI_SLOT(dev->devfn));
  92                 /* IDSEL=A23 is tx4927 onboard pci slot */
  93                 irq = (irq + PCI_SLOT(dev->devfn)) % 4;
  94                 irq++;          /* 1-4 */
  95                 DBG("irq is now %d\n", irq);
  96
  97                 switch (irq) {
  98                 case 1:
  99                         irq = TX4927_IRQ_IOC_PCIA;
 100                         break;
 101                 case 2:
 102                         irq = TX4927_IRQ_IOC_PCIB;
 103                         break;
 104                 case 3:
 105                         irq = TX4927_IRQ_IOC_PCIC;
 106                         break;
 107                 case 4:
 108                         irq = TX4927_IRQ_IOC_PCID;
 109                         break;
 110                 }
 111         } else {
 112                 /* PCI Backplane */
 113                 DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",
 114                     PCI_SLOT(dev->devfn));
 115                 irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
 116         }
 117         DBG("assigned irq %d\n", irq);
 118         return irq;
 119 }
 120
 121 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 122 {
 123         unsigned char irq;
 124
 125         printk("PCI Setup for pin %d \n", pin);
 126
 127         if (dev->device == 0x9130) /* IDE */
 128                 irq = 14;
 129         else
 130                 irq = pci_get_irq(dev, pin);
 131
 132         return irq;
 133 }
 134
 135 /* Do platform specific device initialization at pci_enable_device() time */
 136 int pcibios_plat_dev_init(struct pci_dev *dev)
 137 {
 138         return 0;
 139 }