arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c

   1 /*
   2  * This file define the irq handler for MSP SLM subsystem interrupts.
   3  *
   4  * Copyright 2005-2007 PMC-Sierra, Inc, derived from irq_cpu.c
   5  * Author: Andrew Hughes, Andrew_Hughes@pmc-sierra.com
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/kernel.h>
  16 #include <linux/bitops.h>
  17 #include <linux/irq.h>
  18
  19 #include <asm/system.h>
  20
  21 #include <msp_cic_int.h>
  22 #include <msp_regs.h>
  23
  24 /*
  25  * NOTE: We are only enabling support for VPE0 right now.
  26  */
  27
  28 static inline void unmask_msp_cic_irq(unsigned int irq)
  29 {
  30
  31         /* check for PER interrupt range */
  32         if (irq < MSP_PER_INTBASE)
  33                 *CIC_VPE0_MSK_REG |= (1 << (irq - MSP_CIC_INTBASE));
  34         else
  35                 *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
  36 }
  37
  38 static inline void mask_msp_cic_irq(unsigned int irq)
  39 {
  40         /* check for PER interrupt range */
  41         if (irq < MSP_PER_INTBASE)
  42                 *CIC_VPE0_MSK_REG &= ~(1 << (irq - MSP_CIC_INTBASE));
  43         else
  44                 *PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE));
  45 }
  46
  47 /*
  48  * While we ack the interrupt interrupts are disabled and thus we don't need
  49  * to deal with concurrency issues.  Same for msp_cic_irq_end.
  50  */
  51 static inline void ack_msp_cic_irq(unsigned int irq)
  52 {
  53         mask_msp_cic_irq(irq);
  54
  55         /*
  56          * only really necessary for 18, 16-14 and sometimes 3:0 (since
  57          * these can be edge sensitive) but it doesn't hurt for the others.
  58          */
  59
  60         /* check for PER interrupt range */
  61         if (irq < MSP_PER_INTBASE)
  62                 *CIC_STS_REG = (1 << (irq - MSP_CIC_INTBASE));
  63         else
  64                 *PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE));
  65 }
  66
  67 static struct irq_chip msp_cic_irq_controller = {
  68         .name = "MSP_CIC",
  69         .ack = ack_msp_cic_irq,
  70         .mask = ack_msp_cic_irq,
  71         .mask_ack = ack_msp_cic_irq,
  72         .unmask = unmask_msp_cic_irq,
  73 };
  74
  75
  76 void __init msp_cic_irq_init(void)
  77 {
  78         int i;
  79
  80         /* Mask/clear interrupts. */
  81         *CIC_VPE0_MSK_REG = 0x00000000;
  82         *PER_INT_MSK_REG  = 0x00000000;
  83         *CIC_STS_REG      = 0xFFFFFFFF;
  84         *PER_INT_STS_REG  = 0xFFFFFFFF;
  85
  86 #if defined(CONFIG_PMC_MSP7120_GW) || \
  87     defined(CONFIG_PMC_MSP7120_EVAL)
  88         /*
  89          * The MSP7120 RG and EVBD boards use IRQ[6:4] for PCI.
  90          * These inputs map to EXT_INT_POL[6:4] inside the CIC.
  91          * They are to be active low, level sensitive.
  92          */
  93         *CIC_EXT_CFG_REG &= 0xFFFF8F8F;
  94 #endif
  95
  96         /* initialize all the IRQ descriptors */
  97         for (i = MSP_CIC_INTBASE; i < MSP_PER_INTBASE + 32; i++)
  98                 set_irq_chip_and_handler(i, &msp_cic_irq_controller,
  99                                          handle_level_irq);
 100 }
 101
 102 void msp_cic_irq_dispatch(void)
 103 {
 104         u32 pending;
 105         int intbase;
 106
 107         intbase = MSP_CIC_INTBASE;
 108         pending = *CIC_STS_REG & *CIC_VPE0_MSK_REG;
 109
 110         /* check for PER interrupt */
 111         if (pending == (1 << (MSP_INT_PER - MSP_CIC_INTBASE))) {
 112                 intbase = MSP_PER_INTBASE;
 113                 pending = *PER_INT_STS_REG & *PER_INT_MSK_REG;
 114         }
 115
 116         /* check for spurious interrupt */
 117         if (pending == 0x00000000) {
 118                 printk(KERN_ERR
 119                         "Spurious %s interrupt? status %08x, mask %08x\n",
 120                         (intbase == MSP_CIC_INTBASE) ? "CIC" : "PER",
 121                         (intbase == MSP_CIC_INTBASE) ?
 122                                 *CIC_STS_REG : *PER_INT_STS_REG,
 123                         (intbase == MSP_CIC_INTBASE) ?
 124                                 *CIC_VPE0_MSK_REG : *PER_INT_MSK_REG);
 125                 return;
 126         }
 127
 128         /* check for the timer and dispatch it first */
 129         if ((intbase == MSP_CIC_INTBASE) &&
 130             (pending & (1 << (MSP_INT_VPE0_TIMER - MSP_CIC_INTBASE))))
 131                 do_IRQ(MSP_INT_VPE0_TIMER);
 132         else
 133                 do_IRQ(ffs(pending) + intbase - 1);
 134 }