arch/mips/pmc-sierra/yosemite/setup.c

   1 /*
   2  *  Copyright (C) 2003 PMC-Sierra Inc.
   3  *  Author: Manish Lachwani (lachwani@pmc-sierra.com)
   4  *
   5  * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
   6  *
   7  *  This program is free software; you can redistribute  it and/or modify it
   8  *  under  the terms of  the GNU General  Public License as published by the
   9  *  Free Software Foundation;  either version 2 of the  License, or (at your
  10  *  option) any later version.
  11  *
  12  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  13  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  14  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  15  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  16  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  17  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  18  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  19  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  20  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  21  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  22  *
  23  *  You should have received a copy of the  GNU General Public License along
  24  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  25  *  675 Mass Ave, Cambridge, MA 02139, USA.
  26  */
  27 #include <linux/bcd.h>
  28 #include <linux/init.h>
  29 #include <linux/kernel.h>
  30 #include <linux/types.h>
  31 #include <linux/mm.h>
  32 #include <linux/bootmem.h>
  33 #include <linux/swap.h>
  34 #include <linux/ioport.h>
  35 #include <linux/sched.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/timex.h>
  38 #include <linux/termios.h>
  39 #include <linux/tty.h>
  40 #include <linux/serial.h>
  41 #include <linux/serial_core.h>
  42
  43 #include <asm/time.h>
  44 #include <asm/bootinfo.h>
  45 #include <asm/page.h>
  46 #include <asm/io.h>
  47 #include <asm/irq.h>
  48 #include <asm/processor.h>
  49 #include <asm/ptrace.h>
  50 #include <asm/reboot.h>
  51 #include <asm/serial.h>
  52 #include <asm/titan_dep.h>
  53 #include <asm/m48t37.h>
  54
  55 #include "setup.h"
  56
  57 unsigned char titan_ge_mac_addr_base[6] = {
  58         // 0x00, 0x03, 0xcc, 0x1d, 0x22, 0x00
  59         0x00, 0xe0, 0x04, 0x00, 0x00, 0x21
  60 };
  61
  62 unsigned long cpu_clock;
  63 unsigned long yosemite_base;
  64
  65 static struct m48t37_rtc *m48t37_base;
  66
  67 void __init bus_error_init(void)
  68 {
  69         /* Do nothing */
  70 }
  71
  72
  73 unsigned long m48t37y_get_time(void)
  74 {
  75         unsigned int year, month, day, hour, min, sec;
  76
  77         /* Stop the update to the time */
  78         m48t37_base->control = 0x40;
  79
  80         year = BCD2BIN(m48t37_base->year);
  81         year += BCD2BIN(m48t37_base->century) * 100;
  82
  83         month = BCD2BIN(m48t37_base->month);
  84         day = BCD2BIN(m48t37_base->date);
  85         hour = BCD2BIN(m48t37_base->hour);
  86         min = BCD2BIN(m48t37_base->min);
  87         sec = BCD2BIN(m48t37_base->sec);
  88
  89         /* Start the update to the time again */
  90         m48t37_base->control = 0x00;
  91
  92         return mktime(year, month, day, hour, min, sec);
  93 }
  94
  95 int m48t37y_set_time(unsigned long sec)
  96 {
  97         struct rtc_time tm;
  98
  99         /* convert to a more useful format -- note months count from 0 */
 100         to_tm(sec, &tm);
 101         tm.tm_mon += 1;
 102
 103         /* enable writing */
 104         m48t37_base->control = 0x80;
 105
 106         /* year */
 107         m48t37_base->year = BIN2BCD(tm.tm_year % 100);
 108         m48t37_base->century = BIN2BCD(tm.tm_year / 100);
 109
 110         /* month */
 111         m48t37_base->month = BIN2BCD(tm.tm_mon);
 112
 113         /* day */
 114         m48t37_base->date = BIN2BCD(tm.tm_mday);
 115
 116         /* hour/min/sec */
 117         m48t37_base->hour = BIN2BCD(tm.tm_hour);
 118         m48t37_base->min = BIN2BCD(tm.tm_min);
 119         m48t37_base->sec = BIN2BCD(tm.tm_sec);
 120
 121         /* day of week -- not really used, but let's keep it up-to-date */
 122         m48t37_base->day = BIN2BCD(tm.tm_wday + 1);
 123
 124         /* disable writing */
 125         m48t37_base->control = 0x00;
 126
 127         return 0;
 128 }
 129
 130 void yosemite_timer_setup(struct irqaction *irq)
 131 {
 132         setup_irq(7, irq);
 133 }
 134
 135 void yosemite_time_init(void)
 136 {
 137         board_timer_setup = yosemite_timer_setup;
 138         mips_hpt_frequency = cpu_clock / 2;
 139 mips_hpt_frequency = 33000000 * 3 * 5;
 140 }
 141
 142 /* No other usable initialization hook than this ...  */
 143 extern void (*late_time_init)(void);
 144
 145 unsigned long ocd_base;
 146
 147 EXPORT_SYMBOL(ocd_base);
 148
 149 /*
 150  * Common setup before any secondaries are started
 151  */
 152
 153 #define TITAN_UART_CLK          3686400
 154 #define TITAN_SERIAL_BASE_BAUD  (TITAN_UART_CLK / 16)
 155 #define TITAN_SERIAL_IRQ        4
 156 #define TITAN_SERIAL_BASE       0xfd000008UL
 157
 158 static void __init py_map_ocd(void)
 159 {
 160         ocd_base = (unsigned long) ioremap(OCD_BASE, OCD_SIZE);
 161         if (!ocd_base)
 162                 panic("Mapping OCD failed - game over.  Your score is 0.");
 163
 164         /* Kludge for PMON bug ... */
 165         OCD_WRITE(0x0710, 0x0ffff029);
 166 }
 167
 168 static void __init py_uart_setup(void)
 169 {
 170         struct uart_port up;
 171
 172         /*
 173          * Register to interrupt zero because we share the interrupt with
 174          * the serial driver which we don't properly support yet.
 175          */
 176         memset(&up, 0, sizeof(up));
 177         up.membase      = (unsigned char *) ioremap(TITAN_SERIAL_BASE, 8);
 178         up.irq          = TITAN_SERIAL_IRQ;
 179         up.uartclk      = TITAN_UART_CLK;
 180         up.regshift     = 0;
 181         up.iotype       = UPIO_MEM;
 182         up.flags        = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
 183         up.line         = 0;
 184
 185         if (early_serial_setup(&up))
 186                 printk(KERN_ERR "Early serial init of port 0 failed\n");
 187 }
 188
 189 static void __init py_rtc_setup(void)
 190 {
 191         m48t37_base = ioremap(YOSEMITE_RTC_BASE, YOSEMITE_RTC_SIZE);
 192         if (!m48t37_base)
 193                 printk(KERN_ERR "Mapping the RTC failed\n");
 194
 195         rtc_get_time = m48t37y_get_time;
 196         rtc_set_time = m48t37y_set_time;
 197
 198         write_seqlock(&xtime_lock);
 199         xtime.tv_sec = m48t37y_get_time();
 200         xtime.tv_nsec = 0;
 201
 202         set_normalized_timespec(&wall_to_monotonic,
 203                                 -xtime.tv_sec, -xtime.tv_nsec);
 204         write_sequnlock(&xtime_lock);
 205 }
 206
 207 /* Not only time init but that's what the hook it's called through is named */
 208 static void __init py_late_time_init(void)
 209 {
 210         py_map_ocd();
 211         py_uart_setup();
 212         py_rtc_setup();
 213 }
 214
 215 static int __init pmc_yosemite_setup(void)
 216 {
 217         board_time_init = yosemite_time_init;
 218         late_time_init = py_late_time_init;
 219
 220         /* Add memory regions */
 221         add_memory_region(0x00000000, 0x10000000, BOOT_MEM_RAM);
 222
 223 #if 0 /* XXX Crash ...  */
 224         OCD_WRITE(RM9000x2_OCD_HTSC,
 225                   OCD_READ(RM9000x2_OCD_HTSC) | HYPERTRANSPORT_ENABLE);
 226
 227         /* Set the BAR. Shifted mode */
 228         OCD_WRITE(RM9000x2_OCD_HTBAR0, HYPERTRANSPORT_BAR0_ADDR);
 229         OCD_WRITE(RM9000x2_OCD_HTMASK0, HYPERTRANSPORT_SIZE0);
 230 #endif
 231
 232         return 0;
 233 }
 234
 235 early_initcall(pmc_yosemite_setup);