]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - arch/mips/rb532/prom.c
Merge branches 'for-4.11/upstream-fixes', 'for-4.12/accutouch', 'for-4.12/cp2112...
[mirror_ubuntu-artful-kernel.git] / arch / mips / rb532 / prom.c
1 /*
2 * RouterBoard 500 specific prom routines
3 *
4 * Copyright (C) 2003, Peter Sadik <peter.sadik@idt.com>
5 * Copyright (C) 2005-2006, P.Christeas <p_christ@hol.gr>
6 * Copyright (C) 2007, Gabor Juhos <juhosg@openwrt.org>
7 * Felix Fietkau <nbd@openwrt.org>
8 * Florian Fainelli <florian@openwrt.org>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the
22 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
23 * Boston, MA 02110-1301, USA.
24 *
25 */
26
27 #include <linux/init.h>
28 #include <linux/mm.h>
29 #include <linux/export.h>
30 #include <linux/string.h>
31 #include <linux/console.h>
32 #include <linux/bootmem.h>
33 #include <linux/ioport.h>
34 #include <linux/blkdev.h>
35
36 #include <asm/bootinfo.h>
37 #include <asm/mach-rc32434/ddr.h>
38 #include <asm/mach-rc32434/prom.h>
39
40 unsigned int idt_cpu_freq = 132000000;
41 EXPORT_SYMBOL(idt_cpu_freq);
42
43 static struct resource ddr_reg[] = {
44 {
45 .name = "ddr-reg",
46 .start = DDR0_PHYS_ADDR,
47 .end = DDR0_PHYS_ADDR + sizeof(struct ddr_ram),
48 .flags = IORESOURCE_MEM,
49 }
50 };
51
52 void __init prom_free_prom_memory(void)
53 {
54 /* No prom memory to free */
55 }
56
57 static inline int match_tag(char *arg, const char *tag)
58 {
59 return strncmp(arg, tag, strlen(tag)) == 0;
60 }
61
62 static inline unsigned long tag2ul(char *arg, const char *tag)
63 {
64 char *num;
65
66 num = arg + strlen(tag);
67 return simple_strtoul(num, 0, 10);
68 }
69
70 void __init prom_setup_cmdline(void)
71 {
72 static char cmd_line[COMMAND_LINE_SIZE] __initdata;
73 char *cp, *board;
74 int prom_argc;
75 char **prom_argv;
76 int i;
77
78 prom_argc = fw_arg0;
79 prom_argv = (char **) fw_arg1;
80
81 cp = cmd_line;
82 /* Note: it is common that parameters start
83 * at argv[1] and not argv[0],
84 * however, our elf loader starts at [0] */
85 for (i = 0; i < prom_argc; i++) {
86 if (match_tag(prom_argv[i], FREQ_TAG)) {
87 idt_cpu_freq = tag2ul(prom_argv[i], FREQ_TAG);
88 continue;
89 }
90 #ifdef IGNORE_CMDLINE_MEM
91 /* parses out the "mem=xx" arg */
92 if (match_tag(prom_argv[i], MEM_TAG))
93 continue;
94 #endif
95 if (i > 0)
96 *(cp++) = ' ';
97 if (match_tag(prom_argv[i], BOARD_TAG)) {
98 board = prom_argv[i] + strlen(BOARD_TAG);
99
100 if (match_tag(board, BOARD_RB532A))
101 mips_machtype = MACH_MIKROTIK_RB532A;
102 else
103 mips_machtype = MACH_MIKROTIK_RB532;
104 }
105
106 strcpy(cp, prom_argv[i]);
107 cp += strlen(prom_argv[i]);
108 }
109 *(cp++) = ' ';
110
111 i = strlen(arcs_cmdline);
112 if (i > 0) {
113 *(cp++) = ' ';
114 strcpy(cp, arcs_cmdline);
115 cp += strlen(arcs_cmdline);
116 }
117 cmd_line[COMMAND_LINE_SIZE - 1] = '\0';
118
119 strcpy(arcs_cmdline, cmd_line);
120 }
121
122 void __init prom_init(void)
123 {
124 struct ddr_ram __iomem *ddr;
125 phys_addr_t memsize;
126 phys_addr_t ddrbase;
127
128 ddr = ioremap_nocache(ddr_reg[0].start,
129 ddr_reg[0].end - ddr_reg[0].start);
130
131 if (!ddr) {
132 printk(KERN_ERR "Unable to remap DDR register\n");
133 return;
134 }
135
136 ddrbase = (phys_addr_t)&ddr->ddrbase;
137 memsize = (phys_addr_t)&ddr->ddrmask;
138 memsize = 0 - memsize;
139
140 prom_setup_cmdline();
141
142 /* give all RAM to boot allocator,
143 * except for the first 0x400 and the last 0x200 bytes */
144 add_memory_region(ddrbase + 0x400, memsize - 0x600, BOOT_MEM_RAM);
145 }