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[mirror_ubuntu-bionic-kernel.git] / arch / mips / sibyte / Kconfig
1 config SIBYTE_SB1250
2 bool
3 select CEVT_SB1250
4 select CSRC_SB1250
5 select HW_HAS_PCI
6 select IRQ_CPU
7 select SIBYTE_ENABLE_LDT_IF_PCI
8 select SIBYTE_HAS_ZBUS_PROFILING
9 select SIBYTE_SB1xxx_SOC
10 select SYS_SUPPORTS_SMP
11
12 config SIBYTE_BCM1120
13 bool
14 select CEVT_SB1250
15 select CSRC_SB1250
16 select IRQ_CPU
17 select SIBYTE_BCM112X
18 select SIBYTE_HAS_ZBUS_PROFILING
19 select SIBYTE_SB1xxx_SOC
20
21 config SIBYTE_BCM1125
22 bool
23 select CEVT_SB1250
24 select CSRC_SB1250
25 select HW_HAS_PCI
26 select IRQ_CPU
27 select SIBYTE_BCM112X
28 select SIBYTE_HAS_ZBUS_PROFILING
29 select SIBYTE_SB1xxx_SOC
30
31 config SIBYTE_BCM1125H
32 bool
33 select CEVT_SB1250
34 select CSRC_SB1250
35 select HW_HAS_PCI
36 select IRQ_CPU
37 select SIBYTE_BCM112X
38 select SIBYTE_ENABLE_LDT_IF_PCI
39 select SIBYTE_HAS_ZBUS_PROFILING
40 select SIBYTE_SB1xxx_SOC
41
42 config SIBYTE_BCM112X
43 bool
44 select CEVT_SB1250
45 select CSRC_SB1250
46 select IRQ_CPU
47 select SIBYTE_SB1xxx_SOC
48 select SIBYTE_HAS_ZBUS_PROFILING
49
50 config SIBYTE_BCM1x80
51 bool
52 select CEVT_BCM1480
53 select CSRC_BCM1480
54 select HW_HAS_PCI
55 select IRQ_CPU
56 select SIBYTE_HAS_ZBUS_PROFILING
57 select SIBYTE_SB1xxx_SOC
58 select SYS_SUPPORTS_SMP
59
60 config SIBYTE_BCM1x55
61 bool
62 select CEVT_BCM1480
63 select CSRC_BCM1480
64 select HW_HAS_PCI
65 select IRQ_CPU
66 select SIBYTE_SB1xxx_SOC
67 select SIBYTE_HAS_ZBUS_PROFILING
68 select SYS_SUPPORTS_SMP
69
70 config SIBYTE_SB1xxx_SOC
71 bool
72 select DMA_COHERENT
73 select IRQ_CPU
74 select SIBYTE_CFE
75 select SWAP_IO_SPACE
76 select SYS_SUPPORTS_32BIT_KERNEL
77 select SYS_SUPPORTS_64BIT_KERNEL
78 select CFE
79 select SYS_HAS_EARLY_PRINTK
80
81 choice
82 prompt "SiByte SOC Stepping"
83 depends on SIBYTE_SB1xxx_SOC
84
85 config CPU_SB1_PASS_1
86 bool "1250 Pass1"
87 depends on SIBYTE_SB1250
88 select CPU_HAS_PREFETCH
89
90 config CPU_SB1_PASS_2_1250
91 bool "1250 An"
92 depends on SIBYTE_SB1250
93 select CPU_SB1_PASS_2
94 help
95 Also called BCM1250 Pass 2
96
97 config CPU_SB1_PASS_2_2
98 bool "1250 Bn"
99 depends on SIBYTE_SB1250
100 select CPU_HAS_PREFETCH
101 help
102 Also called BCM1250 Pass 2.2
103
104 config CPU_SB1_PASS_4
105 bool "1250 Cn"
106 depends on SIBYTE_SB1250
107 select CPU_HAS_PREFETCH
108 help
109 Also called BCM1250 Pass 3
110
111 config CPU_SB1_PASS_2_112x
112 bool "112x Hybrid"
113 depends on SIBYTE_BCM112X
114 select CPU_SB1_PASS_2
115
116 config CPU_SB1_PASS_3
117 bool "112x An"
118 depends on SIBYTE_BCM112X
119 select CPU_HAS_PREFETCH
120
121 endchoice
122
123 config CPU_SB1_PASS_2
124 bool
125
126 config SIBYTE_HAS_LDT
127 bool
128
129 config SIBYTE_ENABLE_LDT_IF_PCI
130 bool
131 select SIBYTE_HAS_LDT if PCI
132
133 config SB1_CEX_ALWAYS_FATAL
134 bool "All cache exceptions considered fatal (no recovery attempted)"
135 depends on SIBYTE_SB1xxx_SOC
136
137 config SB1_CERR_STALL
138 bool "Stall (rather than panic) on fatal cache error"
139 depends on SIBYTE_SB1xxx_SOC
140
141 config SIBYTE_CFE_CONSOLE
142 bool "Use firmware console"
143 depends on SIBYTE_SB1xxx_SOC
144 help
145 Use the CFE API's console write routines during boot. Other console
146 options (VT console, sb1250 duart console, etc.) should not be
147 configured.
148
149 config SIBYTE_BUS_WATCHER
150 bool "Support for Bus Watcher statistics"
151 depends on SIBYTE_SB1xxx_SOC
152 help
153 Handle and keep statistics on the bus error interrupts (COR_ECC,
154 BAD_ECC, IO_BUS).
155
156 config SIBYTE_BW_TRACE
157 bool "Capture bus trace before bus error"
158 depends on SIBYTE_BUS_WATCHER
159 help
160 Run a continuous bus trace, dumping the raw data as soon as
161 a ZBbus error is detected. Cannot work if ZBbus profiling
162 is turned on, and also will interfere with JTAG-based trace
163 buffer activity. Raw buffer data is dumped to console, and
164 must be processed off-line.
165
166 config SIBYTE_TBPROF
167 tristate "Support for ZBbus profiling"
168 depends on SIBYTE_HAS_ZBUS_PROFILING
169
170 config SIBYTE_HAS_ZBUS_PROFILING
171 bool