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[MIPS] TXx9: Make tx3927-specific code more independent
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1 /*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
6 *
7 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
8 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
9 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
10 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
11 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
12 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
13 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
14 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
15 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
16 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Copyright 2001 MontaVista Software Inc.
23 * Author: MontaVista Software, Inc.
24 * ahennessy@mvista.com
25 *
26 * Copyright (C) 2000-2001 Toshiba Corporation
27 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
28 */
29
30 #include <linux/init.h>
31 #include <linux/kernel.h>
32 #include <linux/types.h>
33 #include <linux/ioport.h>
34 #include <linux/delay.h>
35 #include <linux/platform_device.h>
36 #include <linux/gpio.h>
37 #include <asm/reboot.h>
38 #include <asm/txx9pio.h>
39 #include <asm/txx9/generic.h>
40 #include <asm/txx9/pci.h>
41 #include <asm/txx9/jmr3927.h>
42 #include <asm/mipsregs.h>
43
44 static void jmr3927_machine_restart(char *command)
45 {
46 local_irq_disable();
47 #if 1 /* Resetting PCI bus */
48 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
49 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR);
50 (void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR); /* flush WB */
51 mdelay(1);
52 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
53 #endif
54 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR);
55 /* fallback */
56 (*_machine_halt)();
57 }
58
59 static void __init jmr3927_time_init(void)
60 {
61 tx3927_time_init(0, 1);
62 }
63
64 #define DO_WRITE_THROUGH
65 #define DO_ENABLE_CACHE
66
67 static void jmr3927_board_init(void);
68
69 static void __init jmr3927_mem_setup(void)
70 {
71 char *argptr;
72
73 set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
74
75 _machine_restart = jmr3927_machine_restart;
76
77 /* Reboot on panic */
78 panic_timeout = 180;
79
80 /* cache setup */
81 {
82 unsigned int conf;
83 #ifdef DO_ENABLE_CACHE
84 int mips_ic_disable = 0, mips_dc_disable = 0;
85 #else
86 int mips_ic_disable = 1, mips_dc_disable = 1;
87 #endif
88 #ifdef DO_WRITE_THROUGH
89 int mips_config_cwfon = 0;
90 int mips_config_wbon = 0;
91 #else
92 int mips_config_cwfon = 1;
93 int mips_config_wbon = 1;
94 #endif
95
96 conf = read_c0_conf();
97 conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON);
98 conf |= mips_ic_disable ? 0 : TX39_CONF_ICE;
99 conf |= mips_dc_disable ? 0 : TX39_CONF_DCE;
100 conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
101 conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
102
103 write_c0_conf(conf);
104 write_c0_cache(0);
105 }
106
107 /* initialize board */
108 jmr3927_board_init();
109
110 argptr = prom_getcmdline();
111 if ((argptr = strstr(argptr, "ip=")) == NULL) {
112 argptr = prom_getcmdline();
113 strcat(argptr, " ip=bootp");
114 }
115
116 tx3927_setup_serial(1 << 1); /* ch1: noCTS */
117 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
118 argptr = prom_getcmdline();
119 if ((argptr = strstr(argptr, "console=")) == NULL) {
120 argptr = prom_getcmdline();
121 strcat(argptr, " console=ttyS1,115200");
122 }
123 #endif
124 }
125
126 static void __init jmr3927_pci_setup(void)
127 {
128 #ifdef CONFIG_PCI
129 int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
130 struct pci_controller *c;
131
132 c = txx9_alloc_pci_controller(&txx9_primary_pcic,
133 JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
134 JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
135 register_pci_controller(c);
136 if (!extarb) {
137 /* Reset PCI Bus */
138 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
139 udelay(100);
140 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
141 JMR3927_IOC_RESET_ADDR);
142 udelay(100);
143 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
144 }
145 tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
146 tx3927_setup_pcierr_irq();
147 #endif /* CONFIG_PCI */
148 }
149
150 static void __init jmr3927_board_init(void)
151 {
152 txx9_cpu_clock = JMR3927_CORECLK;
153 /* SDRAMC are configured by PROM */
154
155 /* ROMC */
156 tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
157 tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
158 tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
159 tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
160
161 /* Pin selection */
162 tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
163 tx3927_ccfgptr->pcfg |=
164 TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
165 (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
166
167 tx3927_setup();
168
169 /* PIO[15:12] connected to LEDs */
170 __raw_writel(0x0000f000, &tx3927_pioptr->dir);
171 gpio_request(11, "dipsw1");
172 gpio_request(10, "dipsw2");
173
174 jmr3927_pci_setup();
175
176 /* SIO0 DTR on */
177 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
178
179 jmr3927_led_set(0);
180
181 printk(KERN_INFO
182 "JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
183 jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
184 jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
185 jmr3927_dipsw1(), jmr3927_dipsw2(),
186 jmr3927_dipsw3(), jmr3927_dipsw4());
187 }
188
189 /* This trick makes rtc-ds1742 driver usable as is. */
190 static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
191 {
192 if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
193 return port;
194 port = (port & 0xffff0000) | (port & 0x7fff << 1);
195 #ifdef __BIG_ENDIAN
196 return port;
197 #else
198 return port | 1;
199 #endif
200 }
201
202 static int __init jmr3927_rtc_init(void)
203 {
204 static struct resource __initdata res = {
205 .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
206 .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
207 .flags = IORESOURCE_MEM,
208 };
209 struct platform_device *dev;
210 dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1);
211 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
212 }
213
214 static void __init jmr3927_device_init(void)
215 {
216 __swizzle_addr_b = jmr3927_swizzle_addr_b;
217 jmr3927_rtc_init();
218 tx3927_wdt_init();
219 }
220
221 struct txx9_board_vec jmr3927_vec __initdata = {
222 .system = "Toshiba JMR_TX3927",
223 .prom_init = jmr3927_prom_init,
224 .mem_setup = jmr3927_mem_setup,
225 .irq_setup = jmr3927_irq_setup,
226 .time_init = jmr3927_time_init,
227 .device_init = jmr3927_device_init,
228 #ifdef CONFIG_PCI
229 .pci_map_irq = jmr3927_pci_map_irq,
230 #endif
231 };