arch/mips/txx9/jmr3927/setup.c

   1 /*
   2  *  This program is free software; you can redistribute  it and/or modify it
   3  *  under  the terms of  the GNU General  Public License as published by the
   4  *  Free Software Foundation;  either version 2 of the  License, or (at your
   5  *  option) any later version.
   6  *
   7  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
   8  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
   9  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  10  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  11  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  12  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  13  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  14  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  15  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  16  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  17  *
  18  *  You should have received a copy of the  GNU General Public License along
  19  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  20  *  675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Copyright 2001 MontaVista Software Inc.
  23  * Author: MontaVista Software, Inc.
  24  *              ahennessy@mvista.com
  25  *
  26  * Copyright (C) 2000-2001 Toshiba Corporation
  27  * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
  28  */
  29
  30 #include <linux/init.h>
  31 #include <linux/kernel.h>
  32 #include <linux/types.h>
  33 #include <linux/ioport.h>
  34 #include <linux/delay.h>
  35 #include <linux/platform_device.h>
  36 #include <linux/gpio.h>
  37 #include <asm/reboot.h>
  38 #include <asm/txx9pio.h>
  39 #include <asm/txx9/generic.h>
  40 #include <asm/txx9/pci.h>
  41 #include <asm/txx9/jmr3927.h>
  42 #include <asm/mipsregs.h>
  43
  44 static void jmr3927_machine_restart(char *command)
  45 {
  46         local_irq_disable();
  47 #if 1   /* Resetting PCI bus */
  48         jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
  49         jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR);
  50         (void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR);       /* flush WB */
  51         mdelay(1);
  52         jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
  53 #endif
  54         jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR);
  55         /* fallback */
  56         (*_machine_halt)();
  57 }
  58
  59 static void __init jmr3927_time_init(void)
  60 {
  61         tx3927_time_init(0, 1);
  62 }
  63
  64 #define DO_WRITE_THROUGH
  65 #define DO_ENABLE_CACHE
  66
  67 static void jmr3927_board_init(void);
  68
  69 static void __init jmr3927_mem_setup(void)
  70 {
  71         char *argptr;
  72
  73         set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
  74
  75         _machine_restart = jmr3927_machine_restart;
  76
  77         /* cache setup */
  78         {
  79                 unsigned int conf;
  80 #ifdef DO_ENABLE_CACHE
  81                 int mips_ic_disable = 0, mips_dc_disable = 0;
  82 #else
  83                 int mips_ic_disable = 1, mips_dc_disable = 1;
  84 #endif
  85 #ifdef DO_WRITE_THROUGH
  86                 int mips_config_cwfon = 0;
  87                 int mips_config_wbon = 0;
  88 #else
  89                 int mips_config_cwfon = 1;
  90                 int mips_config_wbon = 1;
  91 #endif
  92
  93                 conf = read_c0_conf();
  94                 conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE |
  95                           TX39_CONF_WBON | TX39_CONF_CWFON);
  96                 conf |= mips_ic_disable ? 0 : TX39_CONF_ICE;
  97                 conf |= mips_dc_disable ? 0 : TX39_CONF_DCE;
  98                 conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
  99                 conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
 100
 101                 write_c0_conf(conf);
 102                 write_c0_cache(0);
 103         }
 104
 105         /* initialize board */
 106         jmr3927_board_init();
 107
 108         tx3927_sio_init(0, 1 << 1); /* ch1: noCTS */
 109 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
 110         argptr = prom_getcmdline();
 111         if (!strstr(argptr, "console="))
 112                 strcat(argptr, " console=ttyS1,115200");
 113 #endif
 114 }
 115
 116 static void __init jmr3927_pci_setup(void)
 117 {
 118 #ifdef CONFIG_PCI
 119         int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
 120         struct pci_controller *c;
 121
 122         c = txx9_alloc_pci_controller(&txx9_primary_pcic,
 123                                       JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
 124                                       JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
 125         register_pci_controller(c);
 126         if (!extarb) {
 127                 /* Reset PCI Bus */
 128                 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
 129                 udelay(100);
 130                 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
 131                                     JMR3927_IOC_RESET_ADDR);
 132                 udelay(100);
 133                 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
 134         }
 135         tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
 136         tx3927_setup_pcierr_irq();
 137 #endif /* CONFIG_PCI */
 138 }
 139
 140 static void __init jmr3927_board_init(void)
 141 {
 142         txx9_cpu_clock = JMR3927_CORECLK;
 143         /* SDRAMC are configured by PROM */
 144
 145         /* ROMC */
 146         tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
 147         tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
 148         tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
 149         tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
 150
 151         /* Pin selection */
 152         tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
 153         tx3927_ccfgptr->pcfg |=
 154                 TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
 155                 (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
 156
 157         tx3927_setup();
 158
 159         /* PIO[15:12] connected to LEDs */
 160         __raw_writel(0x0000f000, &tx3927_pioptr->dir);
 161         gpio_request(11, "dipsw1");
 162         gpio_request(10, "dipsw2");
 163
 164         jmr3927_pci_setup();
 165
 166         /* SIO0 DTR on */
 167         jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
 168
 169         jmr3927_led_set(0);
 170
 171         printk(KERN_INFO
 172                "JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
 173                jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
 174                jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
 175                jmr3927_dipsw1(), jmr3927_dipsw2(),
 176                jmr3927_dipsw3(), jmr3927_dipsw4());
 177 }
 178
 179 /* This trick makes rtc-ds1742 driver usable as is. */
 180 static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
 181 {
 182         if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
 183                 return port;
 184         port = (port & 0xffff0000) | (port & 0x7fff << 1);
 185 #ifdef __BIG_ENDIAN
 186         return port;
 187 #else
 188         return port | 1;
 189 #endif
 190 }
 191
 192 static void __init jmr3927_rtc_init(void)
 193 {
 194         static struct resource __initdata res = {
 195                 .start  = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
 196                 .end    = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
 197                 .flags  = IORESOURCE_MEM,
 198         };
 199         platform_device_register_simple("rtc-ds1742", -1, &res, 1);
 200 }
 201
 202 static void __init jmr3927_device_init(void)
 203 {
 204         __swizzle_addr_b = jmr3927_swizzle_addr_b;
 205         jmr3927_rtc_init();
 206         tx3927_wdt_init();
 207 }
 208
 209 struct txx9_board_vec jmr3927_vec __initdata = {
 210         .system = "Toshiba JMR_TX3927",
 211         .prom_init = jmr3927_prom_init,
 212         .mem_setup = jmr3927_mem_setup,
 213         .irq_setup = jmr3927_irq_setup,
 214         .time_init = jmr3927_time_init,
 215         .device_init = jmr3927_device_init,
 216 #ifdef CONFIG_PCI
 217         .pci_map_irq = jmr3927_pci_map_irq,
 218 #endif
 219 };