arch/mn10300/mm/Kconfig.cache

   1 # SPDX-License-Identifier: GPL-2.0
   2 #
   3 # MN10300 CPU cache options
   4 #
   5
   6 choice
   7         prompt "CPU Caching mode"
   8         default MN10300_CACHE_WBACK
   9         help
  10           This option determines the caching mode for the kernel.
  11
  12           Write-Back caching mode involves the all reads and writes causing
  13           the affected cacheline to be read into the cache first before being
  14           operated upon. Memory is not then updated by a write until the cache
  15           is filled and a cacheline needs to be displaced from the cache to
  16           make room. Only at that point is it written back.
  17
  18           Write-Through caching only fetches cachelines from memory on a
  19           read. Writes always get written directly to memory. If the affected
  20           cacheline is also in cache, it will be updated too.
  21
  22           The final option is to turn of caching entirely.
  23
  24 config MN10300_CACHE_WBACK
  25         bool "Write-Back"
  26         help
  27           The dcache operates in delayed write-back mode.  It must be manually
  28           flushed if writes are made that subsequently need to be executed or
  29           to be DMA'd by a device.
  30
  31 config MN10300_CACHE_WTHRU
  32         bool "Write-Through"
  33         help
  34           The dcache operates in immediate write-through mode.  Writes are
  35           committed to RAM immediately in addition to being stored in the
  36           cache.  This means that the written data is immediately available for
  37           execution or DMA.
  38
  39           This is not available for use with an SMP kernel if cache flushing
  40           and invalidation by automatic purge register is not selected.
  41
  42 config MN10300_CACHE_DISABLED
  43         bool "Disabled"
  44         help
  45           The icache and dcache are disabled.
  46
  47 endchoice
  48
  49 config MN10300_CACHE_ENABLED
  50         def_bool y if !MN10300_CACHE_DISABLED
  51
  52
  53 choice
  54         prompt "CPU cache flush/invalidate method"
  55         default MN10300_CACHE_MANAGE_BY_TAG if !AM34_2
  56         default MN10300_CACHE_MANAGE_BY_REG if AM34_2
  57         depends on MN10300_CACHE_ENABLED
  58         help
  59           This determines the method by which CPU cache flushing and
  60           invalidation is performed.
  61
  62 config MN10300_CACHE_MANAGE_BY_TAG
  63         bool "Use the cache tag registers directly"
  64         depends on !(SMP && MN10300_CACHE_WTHRU)
  65
  66 config MN10300_CACHE_MANAGE_BY_REG
  67         bool "Flush areas by way of automatic purge registers (AM34 only)"
  68         depends on AM34_2
  69
  70 endchoice
  71
  72 config MN10300_CACHE_INV_BY_TAG
  73         def_bool y if MN10300_CACHE_MANAGE_BY_TAG && MN10300_CACHE_ENABLED
  74
  75 config MN10300_CACHE_INV_BY_REG
  76         def_bool y if MN10300_CACHE_MANAGE_BY_REG && MN10300_CACHE_ENABLED
  77
  78 config MN10300_CACHE_FLUSH_BY_TAG
  79         def_bool y if MN10300_CACHE_MANAGE_BY_TAG && MN10300_CACHE_WBACK
  80
  81 config MN10300_CACHE_FLUSH_BY_REG
  82         def_bool y if MN10300_CACHE_MANAGE_BY_REG && MN10300_CACHE_WBACK
  83
  84
  85 config MN10300_HAS_CACHE_SNOOP
  86         def_bool n
  87
  88 config MN10300_CACHE_SNOOP
  89         bool "Use CPU Cache Snooping"
  90         depends on MN10300_CACHE_ENABLED && MN10300_HAS_CACHE_SNOOP
  91         default y
  92
  93 config MN10300_CACHE_FLUSH_ICACHE
  94         def_bool y if MN10300_CACHE_WBACK && !MN10300_CACHE_SNOOP
  95         help
  96           Set if we need the dcache flushing before the icache is invalidated.
  97
  98 config MN10300_CACHE_INV_ICACHE
  99         def_bool y if MN10300_CACHE_WTHRU && !MN10300_CACHE_SNOOP
 100         help
 101           Set if we need the icache to be invalidated, even if the dcache is in
 102           write-through mode and doesn't need flushing.
 103
 104 #
 105 # The kernel debugger gets its own separate cache flushing functions
 106 #
 107 config MN10300_DEBUGGER_CACHE_FLUSH_BY_TAG
 108         def_bool y if KERNEL_DEBUGGER && \
 109                         MN10300_CACHE_WBACK && \
 110                         !MN10300_CACHE_SNOOP && \
 111                         MN10300_CACHE_MANAGE_BY_TAG
 112         help
 113           Set if the debugger needs to flush the dcache and invalidate the
 114           icache using the cache tag registers to make breakpoints work.
 115
 116 config MN10300_DEBUGGER_CACHE_FLUSH_BY_REG
 117         def_bool y if KERNEL_DEBUGGER && \
 118                         MN10300_CACHE_WBACK && \
 119                         !MN10300_CACHE_SNOOP && \
 120                         MN10300_CACHE_MANAGE_BY_REG
 121         help
 122           Set if the debugger needs to flush the dcache and invalidate the
 123           icache using automatic purge registers to make breakpoints work.
 124
 125 config MN10300_DEBUGGER_CACHE_INV_BY_TAG
 126         def_bool y if KERNEL_DEBUGGER && \
 127                         MN10300_CACHE_WTHRU && \
 128                         !MN10300_CACHE_SNOOP && \
 129                         MN10300_CACHE_MANAGE_BY_TAG
 130         help
 131           Set if the debugger needs to invalidate the icache using the cache
 132           tag registers to make breakpoints work.
 133
 134 config MN10300_DEBUGGER_CACHE_INV_BY_REG
 135         def_bool y if KERNEL_DEBUGGER && \
 136                         MN10300_CACHE_WTHRU && \
 137                         !MN10300_CACHE_SNOOP && \
 138                         MN10300_CACHE_MANAGE_BY_REG
 139         help
 140           Set if the debugger needs to invalidate the icache using automatic
 141           purge registers to make breakpoints work.
 142
 143 config MN10300_DEBUGGER_CACHE_NO_FLUSH
 144         def_bool y if KERNEL_DEBUGGER && \
 145                         (MN10300_CACHE_DISABLED || MN10300_CACHE_SNOOP)
 146         help
 147           Set if the debugger does not need to flush the dcache and/or
 148           invalidate the icache to make breakpoints work.