arch/openrisc/Kconfig

   1 # SPDX-License-Identifier: GPL-2.0
   2 #
   3 # For a description of the syntax of this configuration file,
   4 # see Documentation/kbuild/kconfig-language.rst.
   5 #
   6
   7 config OPENRISC
   8         def_bool y
   9         select ARCH_32BIT_OFF_T
  10         select ARCH_HAS_DMA_SET_UNCACHED
  11         select ARCH_HAS_DMA_CLEAR_UNCACHED
  12         select ARCH_HAS_SYNC_DMA_FOR_DEVICE
  13         select OF
  14         select OF_EARLY_FLATTREE
  15         select IRQ_DOMAIN
  16         select GPIOLIB
  17         select HAVE_ARCH_TRACEHOOK
  18         select SPARSE_IRQ
  19         select GENERIC_IRQ_CHIP
  20         select GENERIC_IRQ_PROBE
  21         select GENERIC_IRQ_SHOW
  22         select GENERIC_IOMAP
  23         select GENERIC_CPU_DEVICES
  24         select HAVE_UID16
  25         select GENERIC_ATOMIC64
  26         select GENERIC_CLOCKEVENTS_BROADCAST
  27         select GENERIC_SMP_IDLE_THREAD
  28         select MODULES_USE_ELF_RELA
  29         select HAVE_DEBUG_STACKOVERFLOW
  30         select OR1K_PIC
  31         select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1
  32         select ARCH_USE_QUEUED_SPINLOCKS
  33         select ARCH_USE_QUEUED_RWLOCKS
  34         select OMPIC if SMP
  35         select ARCH_WANT_FRAME_POINTERS
  36         select GENERIC_IRQ_MULTI_HANDLER
  37         select MMU_GATHER_NO_RANGE if MMU
  38         select SET_FS
  39         select TRACE_IRQFLAGS_SUPPORT
  40
  41 config CPU_BIG_ENDIAN
  42         def_bool y
  43
  44 config MMU
  45         def_bool y
  46
  47 config GENERIC_HWEIGHT
  48         def_bool y
  49
  50 config NO_IOPORT_MAP
  51         def_bool y
  52
  53 # For now, use generic checksum functions
  54 #These can be reimplemented in assembly later if so inclined
  55 config GENERIC_CSUM
  56         def_bool y
  57
  58 config STACKTRACE_SUPPORT
  59         def_bool y
  60
  61 config LOCKDEP_SUPPORT
  62         def_bool  y
  63
  64 menu "Processor type and features"
  65
  66 choice
  67         prompt "Subarchitecture"
  68         default OR1K_1200
  69
  70 config OR1K_1200
  71         bool "OR1200"
  72         help
  73           Generic OpenRISC 1200 architecture
  74
  75 endchoice
  76
  77 config DCACHE_WRITETHROUGH
  78         bool "Have write through data caches"
  79         default n
  80         help
  81           Select this if your implementation features write through data caches.
  82           Selecting 'N' here will allow the kernel to force flushing of data
  83           caches at relevant times. Most OpenRISC implementations support write-
  84           through data caches.
  85
  86           If unsure say N here
  87
  88 config OPENRISC_BUILTIN_DTB
  89         string "Builtin DTB"
  90         default ""
  91
  92 menu "Class II Instructions"
  93
  94 config OPENRISC_HAVE_INST_FF1
  95         bool "Have instruction l.ff1"
  96         default y
  97         help
  98           Select this if your implementation has the Class II instruction l.ff1
  99
 100 config OPENRISC_HAVE_INST_FL1
 101         bool "Have instruction l.fl1"
 102         default y
 103         help
 104           Select this if your implementation has the Class II instruction l.fl1
 105
 106 config OPENRISC_HAVE_INST_MUL
 107         bool "Have instruction l.mul for hardware multiply"
 108         default y
 109         help
 110           Select this if your implementation has a hardware multiply instruction
 111
 112 config OPENRISC_HAVE_INST_DIV
 113         bool "Have instruction l.div for hardware divide"
 114         default y
 115         help
 116           Select this if your implementation has a hardware divide instruction
 117 endmenu
 118
 119 config NR_CPUS
 120         int "Maximum number of CPUs (2-32)"
 121         range 2 32
 122         depends on SMP
 123         default "2"
 124
 125 config SMP
 126         bool "Symmetric Multi-Processing support"
 127         help
 128           This enables support for systems with more than one CPU. If you have
 129           a system with only one CPU, say N. If you have a system with more
 130           than one CPU, say Y.
 131
 132           If you don't know what to do here, say N.
 133
 134 source "kernel/Kconfig.hz"
 135
 136 config OPENRISC_NO_SPR_SR_DSX
 137         bool "use SPR_SR_DSX software emulation" if OR1K_1200
 138         default y
 139         help
 140           SPR_SR_DSX bit is status register bit indicating whether
 141           the last exception has happened in delay slot.
 142
 143           OpenRISC architecture makes it optional to have it implemented
 144           in hardware and the OR1200 does not have it.
 145
 146           Say N here if you know that your OpenRISC processor has
 147           SPR_SR_DSX bit implemented. Say Y if you are unsure.
 148
 149 config OPENRISC_HAVE_SHADOW_GPRS
 150         bool "Support for shadow gpr files" if !SMP
 151         default y if SMP
 152         help
 153           Say Y here if your OpenRISC processor features shadowed
 154           register files. They will in such case be used as a
 155           scratch reg storage on exception entry.
 156
 157           On SMP systems, this feature is mandatory.
 158           On a unicore system it's safe to say N here if you are unsure.
 159
 160 config CMDLINE
 161         string "Default kernel command string"
 162         default ""
 163         help
 164           On some architectures there is currently no way for the boot loader
 165           to pass arguments to the kernel. For these architectures, you should
 166           supply some command-line options at build time by entering them
 167           here.
 168
 169 menu "Debugging options"
 170
 171 config JUMP_UPON_UNHANDLED_EXCEPTION
 172         bool "Try to die gracefully"
 173         default y
 174         help
 175           Now this puts kernel into infinite loop after first oops. Till
 176           your kernel crashes this doesn't have any influence.
 177
 178           Say Y if you are unsure.
 179
 180 config OPENRISC_ESR_EXCEPTION_BUG_CHECK
 181         bool "Check for possible ESR exception bug"
 182         default n
 183         help
 184           This option enables some checks that might expose some problems
 185           in kernel.
 186
 187           Say N if you are unsure.
 188
 189 endmenu
 190
 191 endmenu