4 * Linux architectural port borrowing liberally from similar works of
5 * others. All original copyrights apply as per the original source
8 * Modifications for the OpenRISC architecture:
9 * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
10 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
17 * This file handles the architecture-dependent parts of initialization
20 #include <linux/errno.h>
21 #include <linux/sched.h>
22 #include <linux/kernel.h>
24 #include <linux/stddef.h>
25 #include <linux/unistd.h>
26 #include <linux/ptrace.h>
27 #include <linux/slab.h>
28 #include <linux/tty.h>
29 #include <linux/ioport.h>
30 #include <linux/delay.h>
31 #include <linux/console.h>
32 #include <linux/init.h>
33 #include <linux/memblock.h>
34 #include <linux/seq_file.h>
35 #include <linux/serial.h>
36 #include <linux/initrd.h>
37 #include <linux/of_fdt.h>
39 #include <linux/device.h>
41 #include <asm/sections.h>
42 #include <asm/pgtable.h>
43 #include <asm/types.h>
44 #include <asm/setup.h>
46 #include <asm/cpuinfo.h>
47 #include <asm/delay.h>
51 static void __init
setup_memory(void)
53 unsigned long ram_start_pfn
;
54 unsigned long ram_end_pfn
;
55 phys_addr_t memory_start
, memory_end
;
56 struct memblock_region
*region
;
58 memory_end
= memory_start
= 0;
60 /* Find main memory where is the kernel, we assume its the only one */
61 for_each_memblock(memory
, region
) {
62 memory_start
= region
->base
;
63 memory_end
= region
->base
+ region
->size
;
64 printk(KERN_INFO
"%s: Memory: 0x%x-0x%x\n", __func__
,
65 memory_start
, memory_end
);
72 ram_start_pfn
= PFN_UP(memory_start
);
73 ram_end_pfn
= PFN_DOWN(memblock_end_of_DRAM());
75 /* setup bootmem globals (we use no_bootmem, but mm still depends on this) */
76 min_low_pfn
= ram_start_pfn
;
77 max_low_pfn
= ram_end_pfn
;
78 max_pfn
= ram_end_pfn
;
81 * initialize the boot-time allocator (with low memory only).
83 * This makes the memory from the end of the kernel to the end of
86 memblock_reserve(__pa(_stext
), _end
- _stext
);
88 early_init_fdt_reserve_self();
89 early_init_fdt_scan_reserved_mem();
94 struct cpuinfo_or1k cpuinfo_or1k
[NR_CPUS
];
96 static void print_cpuinfo(void)
98 unsigned long upr
= mfspr(SPR_UPR
);
99 unsigned long vr
= mfspr(SPR_VR
);
100 unsigned int version
;
101 unsigned int revision
;
102 struct cpuinfo_or1k
*cpuinfo
= &cpuinfo_or1k
[smp_processor_id()];
104 version
= (vr
& SPR_VR_VER
) >> 24;
105 revision
= (vr
& SPR_VR_REV
);
107 printk(KERN_INFO
"CPU: OpenRISC-%x (revision %d) @%d MHz\n",
108 version
, revision
, cpuinfo
->clock_frequency
/ 1000000);
110 if (!(upr
& SPR_UPR_UP
)) {
112 "-- no UPR register... unable to detect configuration\n");
116 if (upr
& SPR_UPR_DCP
)
118 "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
119 cpuinfo
->dcache_size
, cpuinfo
->dcache_block_size
,
120 cpuinfo
->dcache_ways
);
122 printk(KERN_INFO
"-- dcache disabled\n");
123 if (upr
& SPR_UPR_ICP
)
125 "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
126 cpuinfo
->icache_size
, cpuinfo
->icache_block_size
,
127 cpuinfo
->icache_ways
);
129 printk(KERN_INFO
"-- icache disabled\n");
131 if (upr
& SPR_UPR_DMP
)
132 printk(KERN_INFO
"-- dmmu: %4d entries, %lu way(s)\n",
133 1 << ((mfspr(SPR_DMMUCFGR
) & SPR_DMMUCFGR_NTS
) >> 2),
134 1 + (mfspr(SPR_DMMUCFGR
) & SPR_DMMUCFGR_NTW
));
135 if (upr
& SPR_UPR_IMP
)
136 printk(KERN_INFO
"-- immu: %4d entries, %lu way(s)\n",
137 1 << ((mfspr(SPR_IMMUCFGR
) & SPR_IMMUCFGR_NTS
) >> 2),
138 1 + (mfspr(SPR_IMMUCFGR
) & SPR_IMMUCFGR_NTW
));
140 printk(KERN_INFO
"-- additional features:\n");
141 if (upr
& SPR_UPR_DUP
)
142 printk(KERN_INFO
"-- debug unit\n");
143 if (upr
& SPR_UPR_PCUP
)
144 printk(KERN_INFO
"-- performance counters\n");
145 if (upr
& SPR_UPR_PMP
)
146 printk(KERN_INFO
"-- power management\n");
147 if (upr
& SPR_UPR_PICP
)
148 printk(KERN_INFO
"-- PIC\n");
149 if (upr
& SPR_UPR_TTP
)
150 printk(KERN_INFO
"-- timer\n");
151 if (upr
& SPR_UPR_CUP
)
152 printk(KERN_INFO
"-- custom unit(s)\n");
155 static struct device_node
*setup_find_cpu_node(int cpu
)
158 struct device_node
*cpun
;
160 for_each_of_cpu_node(cpun
) {
161 if (of_property_read_u32(cpun
, "reg", &hwid
))
170 void __init
setup_cpuinfo(void)
172 struct device_node
*cpu
;
173 unsigned long iccfgr
, dccfgr
;
174 unsigned long cache_set_size
;
175 int cpu_id
= smp_processor_id();
176 struct cpuinfo_or1k
*cpuinfo
= &cpuinfo_or1k
[cpu_id
];
178 cpu
= setup_find_cpu_node(cpu_id
);
180 panic("Couldn't find CPU%d in device tree...\n", cpu_id
);
182 iccfgr
= mfspr(SPR_ICCFGR
);
183 cpuinfo
->icache_ways
= 1 << (iccfgr
& SPR_ICCFGR_NCW
);
184 cache_set_size
= 1 << ((iccfgr
& SPR_ICCFGR_NCS
) >> 3);
185 cpuinfo
->icache_block_size
= 16 << ((iccfgr
& SPR_ICCFGR_CBS
) >> 7);
186 cpuinfo
->icache_size
=
187 cache_set_size
* cpuinfo
->icache_ways
* cpuinfo
->icache_block_size
;
189 dccfgr
= mfspr(SPR_DCCFGR
);
190 cpuinfo
->dcache_ways
= 1 << (dccfgr
& SPR_DCCFGR_NCW
);
191 cache_set_size
= 1 << ((dccfgr
& SPR_DCCFGR_NCS
) >> 3);
192 cpuinfo
->dcache_block_size
= 16 << ((dccfgr
& SPR_DCCFGR_CBS
) >> 7);
193 cpuinfo
->dcache_size
=
194 cache_set_size
* cpuinfo
->dcache_ways
* cpuinfo
->dcache_block_size
;
196 if (of_property_read_u32(cpu
, "clock-frequency",
197 &cpuinfo
->clock_frequency
)) {
199 "Device tree missing CPU 'clock-frequency' parameter."
200 "Assuming frequency 25MHZ"
201 "This is probably not what you want.");
204 cpuinfo
->coreid
= mfspr(SPR_COREID
);
214 * Handles the pointer to the device tree that this kernel is to use
215 * for establishing the available platform devices.
217 * Falls back on built-in device tree in case null pointer is passed.
220 void __init
or32_early_setup(void *fdt
)
223 pr_info("FDT at %p\n", fdt
);
226 pr_info("Compiled-in FDT at %p\n", fdt
);
228 early_init_devtree(fdt
);
231 static inline unsigned long extract_value_bits(unsigned long reg
,
232 short bit_nr
, short width
)
234 return (reg
>> bit_nr
) & (0 << width
);
237 static inline unsigned long extract_value(unsigned long reg
, unsigned long mask
)
239 while (!(mask
& 0x1)) {
246 void __init
detect_unit_config(unsigned long upr
, unsigned long mask
,
247 char *text
, void (*func
) (void))
258 printk("not present\n");
264 * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
265 * from the clock frequency passed in via the device tree
269 void calibrate_delay(void)
272 struct device_node
*cpu
= setup_find_cpu_node(smp_processor_id());
274 val
= of_get_property(cpu
, "clock-frequency", NULL
);
276 panic("no cpu 'clock-frequency' parameter in device tree");
277 loops_per_jiffy
= *val
/ HZ
;
278 pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
279 loops_per_jiffy
/ (500000 / HZ
),
280 (loops_per_jiffy
/ (5000 / HZ
)) % 100, loops_per_jiffy
);
283 void __init
setup_arch(char **cmdline_p
)
285 unflatten_and_copy_device_tree();
293 /* process 1's initial memory region is the kernel code/data */
294 init_mm
.start_code
= (unsigned long)_stext
;
295 init_mm
.end_code
= (unsigned long)_etext
;
296 init_mm
.end_data
= (unsigned long)_edata
;
297 init_mm
.brk
= (unsigned long)_end
;
299 #ifdef CONFIG_BLK_DEV_INITRD
300 initrd_start
= (unsigned long)&__initrd_start
;
301 initrd_end
= (unsigned long)&__initrd_end
;
302 if (initrd_start
== initrd_end
) {
306 initrd_below_start_ok
= 1;
309 /* setup memblock allocator */
312 /* paging_init() sets up the MMU and marks all pages as reserved */
315 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
317 conswitchp
= &dummy_con
;
320 *cmdline_p
= boot_command_line
;
322 printk(KERN_INFO
"OpenRISC Linux -- http://openrisc.io\n");
325 static int show_cpuinfo(struct seq_file
*m
, void *v
)
327 unsigned int vr
, cpucfgr
;
329 unsigned int version
;
330 struct cpuinfo_or1k
*cpuinfo
= v
;
333 cpucfgr
= mfspr(SPR_CPUCFGR
);
336 seq_printf(m
, "processor\t\t: %d\n", cpuinfo
->coreid
);
338 if (vr
& SPR_VR_UVRP
) {
340 version
= vr
& SPR_VR2_VER
;
341 avr
= mfspr(SPR_AVR
);
342 seq_printf(m
, "cpu architecture\t: "
343 "OpenRISC 1000 (%d.%d-rev%d)\n",
347 seq_printf(m
, "cpu implementation id\t: 0x%x\n",
348 (vr
& SPR_VR2_CPUID
) >> 24);
349 seq_printf(m
, "cpu version\t\t: 0x%x\n", version
);
351 version
= (vr
& SPR_VR_VER
) >> 24;
352 seq_printf(m
, "cpu\t\t\t: OpenRISC-%x\n", version
);
353 seq_printf(m
, "revision\t\t: %d\n", vr
& SPR_VR_REV
);
355 seq_printf(m
, "frequency\t\t: %ld\n", loops_per_jiffy
* HZ
);
356 seq_printf(m
, "dcache size\t\t: %d bytes\n", cpuinfo
->dcache_size
);
357 seq_printf(m
, "dcache block size\t: %d bytes\n",
358 cpuinfo
->dcache_block_size
);
359 seq_printf(m
, "dcache ways\t\t: %d\n", cpuinfo
->dcache_ways
);
360 seq_printf(m
, "icache size\t\t: %d bytes\n", cpuinfo
->icache_size
);
361 seq_printf(m
, "icache block size\t: %d bytes\n",
362 cpuinfo
->icache_block_size
);
363 seq_printf(m
, "icache ways\t\t: %d\n", cpuinfo
->icache_ways
);
364 seq_printf(m
, "immu\t\t\t: %d entries, %lu ways\n",
365 1 << ((mfspr(SPR_DMMUCFGR
) & SPR_DMMUCFGR_NTS
) >> 2),
366 1 + (mfspr(SPR_DMMUCFGR
) & SPR_DMMUCFGR_NTW
));
367 seq_printf(m
, "dmmu\t\t\t: %d entries, %lu ways\n",
368 1 << ((mfspr(SPR_IMMUCFGR
) & SPR_IMMUCFGR_NTS
) >> 2),
369 1 + (mfspr(SPR_IMMUCFGR
) & SPR_IMMUCFGR_NTW
));
370 seq_printf(m
, "bogomips\t\t: %lu.%02lu\n",
371 (loops_per_jiffy
* HZ
) / 500000,
372 ((loops_per_jiffy
* HZ
) / 5000) % 100);
374 seq_puts(m
, "features\t\t: ");
375 seq_printf(m
, "%s ", cpucfgr
& SPR_CPUCFGR_OB32S
? "orbis32" : "");
376 seq_printf(m
, "%s ", cpucfgr
& SPR_CPUCFGR_OB64S
? "orbis64" : "");
377 seq_printf(m
, "%s ", cpucfgr
& SPR_CPUCFGR_OF32S
? "orfpx32" : "");
378 seq_printf(m
, "%s ", cpucfgr
& SPR_CPUCFGR_OF64S
? "orfpx64" : "");
379 seq_printf(m
, "%s ", cpucfgr
& SPR_CPUCFGR_OV64S
? "orvdx64" : "");
387 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
389 *pos
= cpumask_next(*pos
- 1, cpu_online_mask
);
390 if ((*pos
) < nr_cpu_ids
)
391 return &cpuinfo_or1k
[*pos
];
395 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
398 return c_start(m
, pos
);
401 static void c_stop(struct seq_file
*m
, void *v
)
405 const struct seq_operations cpuinfo_op
= {
409 .show
= show_cpuinfo
,