arch/openrisc/kernel/setup.c

   1 /*
   2  * OpenRISC setup.c
   3  *
   4  * Linux architectural port borrowing liberally from similar works of
   5  * others.  All original copyrights apply as per the original source
   6  * declaration.
   7  *
   8  * Modifications for the OpenRISC architecture:
   9  * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
  10  * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  *
  17  * This file handles the architecture-dependent parts of initialization
  18  */
  19
  20 #include <linux/errno.h>
  21 #include <linux/sched.h>
  22 #include <linux/kernel.h>
  23 #include <linux/mm.h>
  24 #include <linux/stddef.h>
  25 #include <linux/unistd.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/slab.h>
  28 #include <linux/tty.h>
  29 #include <linux/ioport.h>
  30 #include <linux/delay.h>
  31 #include <linux/console.h>
  32 #include <linux/init.h>
  33 #include <linux/bootmem.h>
  34 #include <linux/seq_file.h>
  35 #include <linux/serial.h>
  36 #include <linux/initrd.h>
  37 #include <linux/of_fdt.h>
  38 #include <linux/of.h>
  39 #include <linux/memblock.h>
  40 #include <linux/device.h>
  41
  42 #include <asm/sections.h>
  43 #include <asm/segment.h>
  44 #include <asm/pgtable.h>
  45 #include <asm/types.h>
  46 #include <asm/setup.h>
  47 #include <asm/io.h>
  48 #include <asm/cpuinfo.h>
  49 #include <asm/delay.h>
  50
  51 #include "vmlinux.h"
  52
  53 static void __init setup_memory(void)
  54 {
  55         unsigned long ram_start_pfn;
  56         unsigned long ram_end_pfn;
  57         phys_addr_t memory_start, memory_end;
  58         struct memblock_region *region;
  59
  60         memory_end = memory_start = 0;
  61
  62         /* Find main memory where is the kernel, we assume its the only one */
  63         for_each_memblock(memory, region) {
  64                 memory_start = region->base;
  65                 memory_end = region->base + region->size;
  66                 printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
  67                        memory_start, memory_end);
  68         }
  69
  70         if (!memory_end) {
  71                 panic("No memory!");
  72         }
  73
  74         ram_start_pfn = PFN_UP(memory_start);
  75         ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
  76
  77         /* setup bootmem globals (we use no_bootmem, but mm still depends on this) */
  78         min_low_pfn = ram_start_pfn;
  79         max_low_pfn = ram_end_pfn;
  80         max_pfn = ram_end_pfn;
  81
  82         /*
  83          * initialize the boot-time allocator (with low memory only).
  84          *
  85          * This makes the memory from the end of the kernel to the end of
  86          * RAM usable.
  87          */
  88         memblock_reserve(__pa(_stext), _end - _stext);
  89
  90         early_init_fdt_reserve_self();
  91         early_init_fdt_scan_reserved_mem();
  92
  93         memblock_dump_all();
  94 }
  95
  96 struct cpuinfo cpuinfo;
  97
  98 static void print_cpuinfo(void)
  99 {
 100         unsigned long upr = mfspr(SPR_UPR);
 101         unsigned long vr = mfspr(SPR_VR);
 102         unsigned int version;
 103         unsigned int revision;
 104
 105         version = (vr & SPR_VR_VER) >> 24;
 106         revision = (vr & SPR_VR_REV);
 107
 108         printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
 109                version, revision, cpuinfo.clock_frequency / 1000000);
 110
 111         if (!(upr & SPR_UPR_UP)) {
 112                 printk(KERN_INFO
 113                        "-- no UPR register... unable to detect configuration\n");
 114                 return;
 115         }
 116
 117         if (upr & SPR_UPR_DCP)
 118                 printk(KERN_INFO
 119                        "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
 120                        cpuinfo.dcache_size, cpuinfo.dcache_block_size, 1);
 121         else
 122                 printk(KERN_INFO "-- dcache disabled\n");
 123         if (upr & SPR_UPR_ICP)
 124                 printk(KERN_INFO
 125                        "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
 126                        cpuinfo.icache_size, cpuinfo.icache_block_size, 1);
 127         else
 128                 printk(KERN_INFO "-- icache disabled\n");
 129
 130         if (upr & SPR_UPR_DMP)
 131                 printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
 132                        1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
 133                        1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
 134         if (upr & SPR_UPR_IMP)
 135                 printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
 136                        1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
 137                        1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
 138
 139         printk(KERN_INFO "-- additional features:\n");
 140         if (upr & SPR_UPR_DUP)
 141                 printk(KERN_INFO "-- debug unit\n");
 142         if (upr & SPR_UPR_PCUP)
 143                 printk(KERN_INFO "-- performance counters\n");
 144         if (upr & SPR_UPR_PMP)
 145                 printk(KERN_INFO "-- power management\n");
 146         if (upr & SPR_UPR_PICP)
 147                 printk(KERN_INFO "-- PIC\n");
 148         if (upr & SPR_UPR_TTP)
 149                 printk(KERN_INFO "-- timer\n");
 150         if (upr & SPR_UPR_CUP)
 151                 printk(KERN_INFO "-- custom unit(s)\n");
 152 }
 153
 154 void __init setup_cpuinfo(void)
 155 {
 156         struct device_node *cpu;
 157         unsigned long iccfgr, dccfgr;
 158         unsigned long cache_set_size, cache_ways;
 159
 160         cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
 161         if (!cpu)
 162                 panic("No compatible CPU found in device tree...\n");
 163
 164         iccfgr = mfspr(SPR_ICCFGR);
 165         cache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
 166         cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
 167         cpuinfo.icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
 168         cpuinfo.icache_size =
 169             cache_set_size * cache_ways * cpuinfo.icache_block_size;
 170
 171         dccfgr = mfspr(SPR_DCCFGR);
 172         cache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
 173         cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
 174         cpuinfo.dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
 175         cpuinfo.dcache_size =
 176             cache_set_size * cache_ways * cpuinfo.dcache_block_size;
 177
 178         if (of_property_read_u32(cpu, "clock-frequency",
 179                                  &cpuinfo.clock_frequency)) {
 180                 printk(KERN_WARNING
 181                        "Device tree missing CPU 'clock-frequency' parameter."
 182                        "Assuming frequency 25MHZ"
 183                        "This is probably not what you want.");
 184         }
 185
 186         of_node_put(cpu);
 187
 188         print_cpuinfo();
 189 }
 190
 191 /**
 192  * or32_early_setup
 193  *
 194  * Handles the pointer to the device tree that this kernel is to use
 195  * for establishing the available platform devices.
 196  *
 197  * Falls back on built-in device tree in case null pointer is passed.
 198  */
 199
 200 void __init or32_early_setup(void *fdt)
 201 {
 202         if (fdt)
 203                 pr_info("FDT at %p\n", fdt);
 204         else {
 205                 fdt = __dtb_start;
 206                 pr_info("Compiled-in FDT at %p\n", fdt);
 207         }
 208         early_init_devtree(fdt);
 209 }
 210
 211 static inline unsigned long extract_value_bits(unsigned long reg,
 212                                                short bit_nr, short width)
 213 {
 214         return (reg >> bit_nr) & (0 << width);
 215 }
 216
 217 static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
 218 {
 219         while (!(mask & 0x1)) {
 220                 reg = reg >> 1;
 221                 mask = mask >> 1;
 222         }
 223         return mask & reg;
 224 }
 225
 226 void __init detect_unit_config(unsigned long upr, unsigned long mask,
 227                                char *text, void (*func) (void))
 228 {
 229         if (text != NULL)
 230                 printk("%s", text);
 231
 232         if (upr & mask) {
 233                 if (func != NULL)
 234                         func();
 235                 else
 236                         printk("present\n");
 237         } else
 238                 printk("not present\n");
 239 }
 240
 241 /*
 242  * calibrate_delay
 243  *
 244  * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
 245  * from the clock frequency passed in via the device tree
 246  *
 247  */
 248
 249 void calibrate_delay(void)
 250 {
 251         const int *val;
 252         struct device_node *cpu = NULL;
 253         cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
 254         val = of_get_property(cpu, "clock-frequency", NULL);
 255         if (!val)
 256                 panic("no cpu 'clock-frequency' parameter in device tree");
 257         loops_per_jiffy = *val / HZ;
 258         pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
 259                 loops_per_jiffy / (500000 / HZ),
 260                 (loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
 261 }
 262
 263 void __init setup_arch(char **cmdline_p)
 264 {
 265         unflatten_and_copy_device_tree();
 266
 267         setup_cpuinfo();
 268
 269         /* process 1's initial memory region is the kernel code/data */
 270         init_mm.start_code = (unsigned long)_stext;
 271         init_mm.end_code = (unsigned long)_etext;
 272         init_mm.end_data = (unsigned long)_edata;
 273         init_mm.brk = (unsigned long)_end;
 274
 275 #ifdef CONFIG_BLK_DEV_INITRD
 276         initrd_start = (unsigned long)&__initrd_start;
 277         initrd_end = (unsigned long)&__initrd_end;
 278         if (initrd_start == initrd_end) {
 279                 initrd_start = 0;
 280                 initrd_end = 0;
 281         }
 282         initrd_below_start_ok = 1;
 283 #endif
 284
 285         /* setup memblock allocator */
 286         setup_memory();
 287
 288         /* paging_init() sets up the MMU and marks all pages as reserved */
 289         paging_init();
 290
 291 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 292         if (!conswitchp)
 293                 conswitchp = &dummy_con;
 294 #endif
 295
 296         *cmdline_p = boot_command_line;
 297
 298         printk(KERN_INFO "OpenRISC Linux -- http://openrisc.io\n");
 299 }
 300
 301 static int show_cpuinfo(struct seq_file *m, void *v)
 302 {
 303         unsigned long vr;
 304         int version, revision;
 305
 306         vr = mfspr(SPR_VR);
 307         version = (vr & SPR_VR_VER) >> 24;
 308         revision = vr & SPR_VR_REV;
 309
 310         seq_printf(m,
 311                    "cpu\t\t: OpenRISC-%x\n"
 312                    "revision\t: %d\n"
 313                    "frequency\t: %ld\n"
 314                    "dcache size\t: %d bytes\n"
 315                    "dcache block size\t: %d bytes\n"
 316                    "icache size\t: %d bytes\n"
 317                    "icache block size\t: %d bytes\n"
 318                    "immu\t\t: %d entries, %lu ways\n"
 319                    "dmmu\t\t: %d entries, %lu ways\n"
 320                    "bogomips\t: %lu.%02lu\n",
 321                    version,
 322                    revision,
 323                    loops_per_jiffy * HZ,
 324                    cpuinfo.dcache_size,
 325                    cpuinfo.dcache_block_size,
 326                    cpuinfo.icache_size,
 327                    cpuinfo.icache_block_size,
 328                    1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
 329                    1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW),
 330                    1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
 331                    1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW),
 332                    (loops_per_jiffy * HZ) / 500000,
 333                    ((loops_per_jiffy * HZ) / 5000) % 100);
 334
 335         return 0;
 336 }
 337
 338 static void *c_start(struct seq_file *m, loff_t * pos)
 339 {
 340         /* We only have one CPU... */
 341         return *pos < 1 ? (void *)1 : NULL;
 342 }
 343
 344 static void *c_next(struct seq_file *m, void *v, loff_t * pos)
 345 {
 346         ++*pos;
 347         return NULL;
 348 }
 349
 350 static void c_stop(struct seq_file *m, void *v)
 351 {
 352 }
 353
 354 const struct seq_operations cpuinfo_op = {
 355         .start = c_start,
 356         .next = c_next,
 357         .stop = c_stop,
 358         .show = show_cpuinfo,
 359 };