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1 /*
2 * HPMC (High Priority Machine Check) handler.
3 *
4 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
5 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
6 * Copyright (C) 2000 Hewlett-Packard (John Marvin)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23
24 /*
25 * This HPMC handler retrieves the HPMC pim data, resets IO and
26 * returns to the default trap handler with code set to 1 (HPMC).
27 * The default trap handler calls handle interruption, which
28 * does a stack and register dump. This at least allows kernel
29 * developers to get back to C code in virtual mode, where they
30 * have the option to examine and print values from memory that
31 * would help in debugging an HPMC caused by a software bug.
32 *
33 * There is more to do here:
34 *
35 * 1) On MP systems we need to synchronize processors
36 * before calling pdc/iodc.
37 * 2) We should be checking the system state and not
38 * returning to the fault handler if things are really
39 * bad.
40 *
41 */
42
43 .level 1.1
44
45 #include <asm/assembly.h>
46 #include <asm/pdc.h>
47 #include <asm/psw.h>
48
49 #include <linux/linkage.h>
50 #include <linux/init.h>
51
52 /*
53 * stack for os_hpmc, the HPMC handler.
54 * buffer for IODC procedures (for the HPMC handler).
55 *
56 * IODC requires 7K byte stack. That leaves 1K byte for os_hpmc.
57 */
58
59 __PAGE_ALIGNED_BSS
60 .align 4096
61 hpmc_stack:
62 .block 16384
63
64 #define HPMC_IODC_BUF_SIZE 0x8000
65
66 __PAGE_ALIGNED_BSS
67 .align 4096
68 hpmc_iodc_buf:
69 .block HPMC_IODC_BUF_SIZE
70
71 .section .bss
72 .align 8
73 hpmc_raddr:
74 .block 128
75
76 #define HPMC_PIM_DATA_SIZE 896 /* Enough to hold all architected 2.0 state */
77
78 .section .bss
79 .align 8
80 ENTRY(hpmc_pim_data)
81 .block HPMC_PIM_DATA_SIZE
82 END(hpmc_pim_data)
83
84 .text
85
86 .import intr_save, code
87 ENTRY_CFI(os_hpmc)
88 .os_hpmc:
89
90 /*
91 * registers modified:
92 *
93 * Using callee saves registers without saving them. The
94 * original values are in the pim dump if we need them.
95 *
96 * r2 (rp) return pointer
97 * r3 address of PDCE_PROC
98 * r4 scratch
99 * r5 scratch
100 * r23 (arg3) procedure arg
101 * r24 (arg2) procedure arg
102 * r25 (arg1) procedure arg
103 * r26 (arg0) procedure arg
104 * r30 (sp) stack pointer
105 *
106 * registers read:
107 *
108 * r26 contains address of PDCE_PROC on entry
109 * r28 (ret0) return value from procedure
110 */
111
112 copy arg0, %r3 /* save address of PDCE_PROC */
113
114 /*
115 * disable nested HPMCs
116 *
117 * Increment os_hpmc checksum to invalidate it.
118 * Do this before turning the PSW M bit off.
119 */
120
121 mfctl %cr14, %r4
122 ldw 52(%r4),%r5
123 addi 1,%r5,%r5
124 stw %r5,52(%r4)
125
126 /* MP_FIXME: synchronize all processors. */
127
128 /* Setup stack pointer. */
129
130 load32 PA(hpmc_stack),sp
131
132 ldo 128(sp),sp /* leave room for arguments */
133
134 /*
135 * Most PDC routines require that the M bit be off.
136 * So turn on the Q bit and turn off the M bit.
137 */
138
139 ldi PSW_SM_Q,%r4 /* PSW Q on, PSW M off */
140 mtctl %r4,ipsw
141 mtctl %r0,pcsq
142 mtctl %r0,pcsq
143 load32 PA(os_hpmc_1),%r4
144 mtctl %r4,pcoq
145 ldo 4(%r4),%r4
146 mtctl %r4,pcoq
147 rfi
148 nop
149
150 os_hpmc_1:
151
152 /* Call PDC_PIM to get HPMC pim info */
153
154 /*
155 * Note that on some newer boxes, PDC_PIM must be called
156 * before PDC_IO if you want IO to be reset. PDC_PIM sets
157 * a flag that PDC_IO examines.
158 */
159
160 ldo PDC_PIM(%r0), arg0
161 ldo PDC_PIM_HPMC(%r0),arg1 /* Transfer HPMC data */
162 load32 PA(hpmc_raddr),arg2
163 load32 PA(hpmc_pim_data),arg3
164 load32 HPMC_PIM_DATA_SIZE,%r4
165 stw %r4,-52(sp)
166
167 ldil L%PA(os_hpmc_2), rp
168 bv (r3) /* call pdce_proc */
169 ldo R%PA(os_hpmc_2)(rp), rp
170
171 os_hpmc_2:
172 comib,<> 0,ret0, os_hpmc_fail
173
174 /* Reset IO by calling the hversion dependent PDC_IO routine */
175
176 ldo PDC_IO(%r0),arg0
177 ldo 0(%r0),arg1 /* log IO errors */
178 ldo 0(%r0),arg2 /* reserved */
179 ldo 0(%r0),arg3 /* reserved */
180 stw %r0,-52(sp) /* reserved */
181
182 ldil L%PA(os_hpmc_3),rp
183 bv (%r3) /* call pdce_proc */
184 ldo R%PA(os_hpmc_3)(rp),rp
185
186 os_hpmc_3:
187
188 /* FIXME? Check for errors from PDC_IO (-1 might be OK) */
189
190 /*
191 * Initialize the IODC console device (HPA,SPA, path etc.
192 * are stored on page 0.
193 */
194
195 /*
196 * Load IODC into hpmc_iodc_buf by calling PDC_IODC.
197 * Note that PDC_IODC handles flushing the appropriate
198 * data and instruction cache lines.
199 */
200
201 ldo PDC_IODC(%r0),arg0
202 ldo PDC_IODC_READ(%r0),arg1
203 load32 PA(hpmc_raddr),arg2
204 ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg3 /* console hpa */
205 ldo PDC_IODC_RI_INIT(%r0),%r4
206 stw %r4,-52(sp)
207 load32 PA(hpmc_iodc_buf),%r4
208 stw %r4,-56(sp)
209 load32 HPMC_IODC_BUF_SIZE,%r4
210 stw %r4,-60(sp)
211
212 ldil L%PA(os_hpmc_4),rp
213 bv (%r3) /* call pdce_proc */
214 ldo R%PA(os_hpmc_4)(rp),rp
215
216 os_hpmc_4:
217 comib,<> 0,ret0,os_hpmc_fail
218
219 /* Call the entry init (just loaded by PDC_IODC) */
220
221 ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg0 /* console hpa */
222 ldo ENTRY_INIT_MOD_DEV(%r0), arg1
223 ldw BOOT_CONSOLE_SPA_OFFSET(%r0),arg2 /* console spa */
224 depi 0,31,11,arg2 /* clear bits 21-31 */
225 ldo BOOT_CONSOLE_PATH_OFFSET(%r0),arg3 /* console path */
226 load32 PA(hpmc_raddr),%r4
227 stw %r4, -52(sp)
228 stw %r0, -56(sp) /* HV */
229 stw %r0, -60(sp) /* HV */
230 stw %r0, -64(sp) /* HV */
231 stw %r0, -68(sp) /* lang, must be zero */
232
233 load32 PA(hpmc_iodc_buf),%r5
234 ldil L%PA(os_hpmc_5),rp
235 bv (%r5)
236 ldo R%PA(os_hpmc_5)(rp),rp
237
238 os_hpmc_5:
239 comib,<> 0,ret0,os_hpmc_fail
240
241 /* Prepare to call intr_save */
242
243 /*
244 * Load kernel page directory (load into user also, since
245 * we don't intend to ever return to user land anyway)
246 */
247
248 load32 PA(swapper_pg_dir),%r4
249 mtctl %r4,%cr24 /* Initialize kernel root pointer */
250 mtctl %r4,%cr25 /* Initialize user root pointer */
251
252 /* Clear sr4-sr7 */
253
254 mtsp %r0, %sr4
255 mtsp %r0, %sr5
256 mtsp %r0, %sr6
257 mtsp %r0, %sr7
258
259 tovirt_r1 %r30 /* make sp virtual */
260
261 rsm PSW_SM_Q,%r0 /* Clear Q bit */
262 ldi 1,%r8 /* Set trap code to "1" for HPMC */
263 load32 PA(intr_save),%r1
264 be 0(%sr7,%r1)
265 nop
266
267 os_hpmc_fail:
268
269 /*
270 * Reset the system
271 *
272 * Some systems may lockup from a broadcast reset, so try the
273 * hversion PDC_BROADCAST_RESET() first.
274 * MP_FIXME: reset all processors if more than one central bus.
275 */
276
277 /* PDC_BROADCAST_RESET() */
278
279 ldo PDC_BROADCAST_RESET(%r0),arg0
280 ldo 0(%r0),arg1 /* do reset */
281
282 ldil L%PA(os_hpmc_6),rp
283 bv (%r3) /* call pdce_proc */
284 ldo R%PA(os_hpmc_6)(rp),rp
285
286 os_hpmc_6:
287
288 /*
289 * possible return values:
290 * -1 non-existent procedure
291 * -2 non-existent option
292 * -16 unaligned stack
293 *
294 * If call returned, do a broadcast reset.
295 */
296
297 ldil L%0xfffc0000,%r4 /* IO_BROADCAST */
298 ldo 5(%r0),%r5
299 stw %r5,48(%r4) /* CMD_RESET to IO_COMMAND offset */
300
301 b .
302 nop
303 ENDPROC_CFI(os_hpmc)
304 .os_hpmc_end:
305
306
307 __INITRODATA
308 .align 4
309 .export os_hpmc_size
310 os_hpmc_size:
311 .word .os_hpmc_end-.os_hpmc