arch/parisc/kernel/time.c

   1 /*
   2  *  linux/arch/parisc/kernel/time.c
   3  *
   4  *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
   5  *  Modifications for ARM (C) 1994, 1995, 1996,1997 Russell King
   6  *  Copyright (C) 1999 SuSE GmbH, (Philipp Rumpf, prumpf@tux.org)
   7  *
   8  * 1994-07-02  Alan Modra
   9  *             fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
  10  * 1998-12-20  Updated NTP code according to technical memorandum Jan '96
  11  *             "A Kernel Model for Precision Timekeeping" by Dave Mills
  12  */
  13 #include <linux/errno.h>
  14 #include <linux/module.h>
  15 #include <linux/rtc.h>
  16 #include <linux/sched.h>
  17 #include <linux/sched_clock.h>
  18 #include <linux/kernel.h>
  19 #include <linux/param.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/time.h>
  24 #include <linux/init.h>
  25 #include <linux/smp.h>
  26 #include <linux/profile.h>
  27 #include <linux/clocksource.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/ftrace.h>
  30
  31 #include <linux/uaccess.h>
  32 #include <asm/io.h>
  33 #include <asm/irq.h>
  34 #include <asm/page.h>
  35 #include <asm/param.h>
  36 #include <asm/pdc.h>
  37 #include <asm/led.h>
  38
  39 #include <linux/timex.h>
  40
  41 static unsigned long clocktick __read_mostly;   /* timer cycles per tick */
  42
  43 /*
  44  * We keep time on PA-RISC Linux by using the Interval Timer which is
  45  * a pair of registers; one is read-only and one is write-only; both
  46  * accessed through CR16.  The read-only register is 32 or 64 bits wide,
  47  * and increments by 1 every CPU clock tick.  The architecture only
  48  * guarantees us a rate between 0.5 and 2, but all implementations use a
  49  * rate of 1.  The write-only register is 32-bits wide.  When the lowest
  50  * 32 bits of the read-only register compare equal to the write-only
  51  * register, it raises a maskable external interrupt.  Each processor has
  52  * an Interval Timer of its own and they are not synchronised.
  53  *
  54  * We want to generate an interrupt every 1/HZ seconds.  So we program
  55  * CR16 to interrupt every @clocktick cycles.  The it_value in cpu_data
  56  * is programmed with the intended time of the next tick.  We can be
  57  * held off for an arbitrarily long period of time by interrupts being
  58  * disabled, so we may miss one or more ticks.
  59  */
  60 irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
  61 {
  62         unsigned long now;
  63         unsigned long next_tick;
  64         unsigned long ticks_elapsed = 0;
  65         unsigned int cpu = smp_processor_id();
  66         struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
  67
  68         /* gcc can optimize for "read-only" case with a local clocktick */
  69         unsigned long cpt = clocktick;
  70
  71         profile_tick(CPU_PROFILING);
  72
  73         /* Initialize next_tick to the old expected tick time. */
  74         next_tick = cpuinfo->it_value;
  75
  76         /* Calculate how many ticks have elapsed. */
  77         do {
  78                 ++ticks_elapsed;
  79                 next_tick += cpt;
  80                 now = mfctl(16);
  81         } while (next_tick - now > cpt);
  82
  83         /* Store (in CR16 cycles) up to when we are accounting right now. */
  84         cpuinfo->it_value = next_tick;
  85
  86         /* Go do system house keeping. */
  87         if (cpu == 0)
  88                 xtime_update(ticks_elapsed);
  89
  90         update_process_times(user_mode(get_irq_regs()));
  91
  92         /* Skip clockticks on purpose if we know we would miss those.
  93          * The new CR16 must be "later" than current CR16 otherwise
  94          * itimer would not fire until CR16 wrapped - e.g 4 seconds
  95          * later on a 1Ghz processor. We'll account for the missed
  96          * ticks on the next timer interrupt.
  97          * We want IT to fire modulo clocktick even if we miss/skip some.
  98          * But those interrupts don't in fact get delivered that regularly.
  99          *
 100          * "next_tick - now" will always give the difference regardless
 101          * if one or the other wrapped. If "now" is "bigger" we'll end up
 102          * with a very large unsigned number.
 103          */
 104         while (next_tick - mfctl(16) > cpt)
 105                 next_tick += cpt;
 106
 107         /* Program the IT when to deliver the next interrupt.
 108          * Only bottom 32-bits of next_tick are writable in CR16!
 109          * Timer interrupt will be delivered at least a few hundred cycles
 110          * after the IT fires, so if we are too close (<= 500 cycles) to the
 111          * next cycle, simply skip it.
 112          */
 113         if (next_tick - mfctl(16) <= 500)
 114                 next_tick += cpt;
 115         mtctl(next_tick, 16);
 116
 117         return IRQ_HANDLED;
 118 }
 119
 120
 121 unsigned long profile_pc(struct pt_regs *regs)
 122 {
 123         unsigned long pc = instruction_pointer(regs);
 124
 125         if (regs->gr[0] & PSW_N)
 126                 pc -= 4;
 127
 128 #ifdef CONFIG_SMP
 129         if (in_lock_functions(pc))
 130                 pc = regs->gr[2];
 131 #endif
 132
 133         return pc;
 134 }
 135 EXPORT_SYMBOL(profile_pc);
 136
 137
 138 /* clock source code */
 139
 140 static cycle_t notrace read_cr16(struct clocksource *cs)
 141 {
 142         return get_cycles();
 143 }
 144
 145 static struct clocksource clocksource_cr16 = {
 146         .name                   = "cr16",
 147         .rating                 = 300,
 148         .read                   = read_cr16,
 149         .mask                   = CLOCKSOURCE_MASK(BITS_PER_LONG),
 150         .flags                  = CLOCK_SOURCE_IS_CONTINUOUS,
 151 };
 152
 153 void __init start_cpu_itimer(void)
 154 {
 155         unsigned int cpu = smp_processor_id();
 156         unsigned long next_tick = mfctl(16) + clocktick;
 157
 158         mtctl(next_tick, 16);           /* kick off Interval Timer (CR16) */
 159
 160         per_cpu(cpu_data, cpu).it_value = next_tick;
 161 }
 162
 163 #if IS_ENABLED(CONFIG_RTC_DRV_GENERIC)
 164 static int rtc_generic_get_time(struct device *dev, struct rtc_time *tm)
 165 {
 166         struct pdc_tod tod_data;
 167
 168         memset(tm, 0, sizeof(*tm));
 169         if (pdc_tod_read(&tod_data) < 0)
 170                 return -EOPNOTSUPP;
 171
 172         /* we treat tod_sec as unsigned, so this can work until year 2106 */
 173         rtc_time64_to_tm(tod_data.tod_sec, tm);
 174         return rtc_valid_tm(tm);
 175 }
 176
 177 static int rtc_generic_set_time(struct device *dev, struct rtc_time *tm)
 178 {
 179         time64_t secs = rtc_tm_to_time64(tm);
 180
 181         if (pdc_tod_set(secs, 0) < 0)
 182                 return -EOPNOTSUPP;
 183
 184         return 0;
 185 }
 186
 187 static const struct rtc_class_ops rtc_generic_ops = {
 188         .read_time = rtc_generic_get_time,
 189         .set_time = rtc_generic_set_time,
 190 };
 191
 192 static int __init rtc_init(void)
 193 {
 194         struct platform_device *pdev;
 195
 196         pdev = platform_device_register_data(NULL, "rtc-generic", -1,
 197                                              &rtc_generic_ops,
 198                                              sizeof(rtc_generic_ops));
 199
 200         return PTR_ERR_OR_ZERO(pdev);
 201 }
 202 device_initcall(rtc_init);
 203 #endif
 204
 205 void read_persistent_clock(struct timespec *ts)
 206 {
 207         static struct pdc_tod tod_data;
 208         if (pdc_tod_read(&tod_data) == 0) {
 209                 ts->tv_sec = tod_data.tod_sec;
 210                 ts->tv_nsec = tod_data.tod_usec * 1000;
 211         } else {
 212                 printk(KERN_ERR "Error reading tod clock\n");
 213                 ts->tv_sec = 0;
 214                 ts->tv_nsec = 0;
 215         }
 216 }
 217
 218
 219 static u64 notrace read_cr16_sched_clock(void)
 220 {
 221         return get_cycles();
 222 }
 223
 224
 225 /*
 226  * timer interrupt and sched_clock() initialization
 227  */
 228
 229 void __init time_init(void)
 230 {
 231         unsigned long cr16_hz;
 232
 233         clocktick = (100 * PAGE0->mem_10msec) / HZ;
 234         start_cpu_itimer();     /* get CPU 0 started */
 235
 236         cr16_hz = 100 * PAGE0->mem_10msec;  /* Hz */
 237
 238         /* register at clocksource framework */
 239         clocksource_register_hz(&clocksource_cr16, cr16_hz);
 240
 241         /* register as sched_clock source */
 242         sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_hz);
 243 }