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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * linux/arch/parisc/traps.c
4 *
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org>
7 */
8
9 /*
10 * 'Traps.c' handles hardware traps and faults after we have saved some
11 * state in 'asm.s'.
12 */
13
14 #include <linux/sched.h>
15 #include <linux/sched/debug.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/ptrace.h>
20 #include <linux/timer.h>
21 #include <linux/delay.h>
22 #include <linux/mm.h>
23 #include <linux/module.h>
24 #include <linux/smp.h>
25 #include <linux/spinlock.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/console.h>
29 #include <linux/bug.h>
30 #include <linux/ratelimit.h>
31 #include <linux/uaccess.h>
32
33 #include <asm/assembly.h>
34 #include <asm/io.h>
35 #include <asm/irq.h>
36 #include <asm/traps.h>
37 #include <asm/unaligned.h>
38 #include <linux/atomic.h>
39 #include <asm/smp.h>
40 #include <asm/pdc.h>
41 #include <asm/pdc_chassis.h>
42 #include <asm/unwind.h>
43 #include <asm/tlbflush.h>
44 #include <asm/cacheflush.h>
45
46 #include "../math-emu/math-emu.h" /* for handle_fpe() */
47
48 static void parisc_show_stack(struct task_struct *task, unsigned long *sp,
49 struct pt_regs *regs);
50
51 static int printbinary(char *buf, unsigned long x, int nbits)
52 {
53 unsigned long mask = 1UL << (nbits - 1);
54 while (mask != 0) {
55 *buf++ = (mask & x ? '1' : '0');
56 mask >>= 1;
57 }
58 *buf = '\0';
59
60 return nbits;
61 }
62
63 #ifdef CONFIG_64BIT
64 #define RFMT "%016lx"
65 #else
66 #define RFMT "%08lx"
67 #endif
68 #define FFMT "%016llx" /* fpregs are 64-bit always */
69
70 #define PRINTREGS(lvl,r,f,fmt,x) \
71 printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \
72 lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \
73 (r)[(x)+2], (r)[(x)+3])
74
75 static void print_gr(char *level, struct pt_regs *regs)
76 {
77 int i;
78 char buf[64];
79
80 printk("%s\n", level);
81 printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level);
82 printbinary(buf, regs->gr[0], 32);
83 printk("%sPSW: %s %s\n", level, buf, print_tainted());
84
85 for (i = 0; i < 32; i += 4)
86 PRINTREGS(level, regs->gr, "r", RFMT, i);
87 }
88
89 static void print_fr(char *level, struct pt_regs *regs)
90 {
91 int i;
92 char buf[64];
93 struct { u32 sw[2]; } s;
94
95 /* FR are 64bit everywhere. Need to use asm to get the content
96 * of fpsr/fper1, and we assume that we won't have a FP Identify
97 * in our way, otherwise we're screwed.
98 * The fldd is used to restore the T-bit if there was one, as the
99 * store clears it anyway.
100 * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */
101 asm volatile ("fstd %%fr0,0(%1) \n\t"
102 "fldd 0(%1),%%fr0 \n\t"
103 : "=m" (s) : "r" (&s) : "r0");
104
105 printk("%s\n", level);
106 printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level);
107 printbinary(buf, s.sw[0], 32);
108 printk("%sFPSR: %s\n", level, buf);
109 printk("%sFPER1: %08x\n", level, s.sw[1]);
110
111 /* here we'll print fr0 again, tho it'll be meaningless */
112 for (i = 0; i < 32; i += 4)
113 PRINTREGS(level, regs->fr, "fr", FFMT, i);
114 }
115
116 void show_regs(struct pt_regs *regs)
117 {
118 int i, user;
119 char *level;
120 unsigned long cr30, cr31;
121
122 user = user_mode(regs);
123 level = user ? KERN_DEBUG : KERN_CRIT;
124
125 show_regs_print_info(level);
126
127 print_gr(level, regs);
128
129 for (i = 0; i < 8; i += 4)
130 PRINTREGS(level, regs->sr, "sr", RFMT, i);
131
132 if (user)
133 print_fr(level, regs);
134
135 cr30 = mfctl(30);
136 cr31 = mfctl(31);
137 printk("%s\n", level);
138 printk("%sIASQ: " RFMT " " RFMT " IAOQ: " RFMT " " RFMT "\n",
139 level, regs->iasq[0], regs->iasq[1], regs->iaoq[0], regs->iaoq[1]);
140 printk("%s IIR: %08lx ISR: " RFMT " IOR: " RFMT "\n",
141 level, regs->iir, regs->isr, regs->ior);
142 printk("%s CPU: %8d CR30: " RFMT " CR31: " RFMT "\n",
143 level, current_thread_info()->cpu, cr30, cr31);
144 printk("%s ORIG_R28: " RFMT "\n", level, regs->orig_r28);
145
146 if (user) {
147 printk("%s IAOQ[0]: " RFMT "\n", level, regs->iaoq[0]);
148 printk("%s IAOQ[1]: " RFMT "\n", level, regs->iaoq[1]);
149 printk("%s RP(r2): " RFMT "\n", level, regs->gr[2]);
150 } else {
151 printk("%s IAOQ[0]: %pS\n", level, (void *) regs->iaoq[0]);
152 printk("%s IAOQ[1]: %pS\n", level, (void *) regs->iaoq[1]);
153 printk("%s RP(r2): %pS\n", level, (void *) regs->gr[2]);
154
155 parisc_show_stack(current, NULL, regs);
156 }
157 }
158
159 static DEFINE_RATELIMIT_STATE(_hppa_rs,
160 DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST);
161
162 #define parisc_printk_ratelimited(critical, regs, fmt, ...) { \
163 if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \
164 printk(fmt, ##__VA_ARGS__); \
165 show_regs(regs); \
166 } \
167 }
168
169
170 static void do_show_stack(struct unwind_frame_info *info)
171 {
172 int i = 1;
173
174 printk(KERN_CRIT "Backtrace:\n");
175 while (i <= 16) {
176 if (unwind_once(info) < 0 || info->ip == 0)
177 break;
178
179 if (__kernel_text_address(info->ip)) {
180 printk(KERN_CRIT " [<" RFMT ">] %pS\n",
181 info->ip, (void *) info->ip);
182 i++;
183 }
184 }
185 printk(KERN_CRIT "\n");
186 }
187
188 static void parisc_show_stack(struct task_struct *task, unsigned long *sp,
189 struct pt_regs *regs)
190 {
191 struct unwind_frame_info info;
192 struct task_struct *t;
193
194 t = task ? task : current;
195 if (regs) {
196 unwind_frame_init(&info, t, regs);
197 goto show_stack;
198 }
199
200 if (t == current) {
201 unsigned long sp;
202
203 HERE:
204 asm volatile ("copy %%r30, %0" : "=r"(sp));
205 {
206 struct pt_regs r;
207
208 memset(&r, 0, sizeof(struct pt_regs));
209 r.iaoq[0] = (unsigned long)&&HERE;
210 r.gr[2] = (unsigned long)__builtin_return_address(0);
211 r.gr[30] = sp;
212
213 unwind_frame_init(&info, current, &r);
214 }
215 } else {
216 unwind_frame_init_from_blocked_task(&info, t);
217 }
218
219 show_stack:
220 do_show_stack(&info);
221 }
222
223 void show_stack(struct task_struct *t, unsigned long *sp)
224 {
225 return parisc_show_stack(t, sp, NULL);
226 }
227
228 int is_valid_bugaddr(unsigned long iaoq)
229 {
230 return 1;
231 }
232
233 void die_if_kernel(char *str, struct pt_regs *regs, long err)
234 {
235 if (user_mode(regs)) {
236 if (err == 0)
237 return; /* STFU */
238
239 parisc_printk_ratelimited(1, regs,
240 KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n",
241 current->comm, task_pid_nr(current), str, err, regs->iaoq[0]);
242
243 return;
244 }
245
246 oops_in_progress = 1;
247
248 oops_enter();
249
250 /* Amuse the user in a SPARC fashion */
251 if (err) printk(KERN_CRIT
252 " _______________________________ \n"
253 " < Your System ate a SPARC! Gah! >\n"
254 " ------------------------------- \n"
255 " \\ ^__^\n"
256 " (__)\\ )\\/\\\n"
257 " U ||----w |\n"
258 " || ||\n");
259
260 /* unlock the pdc lock if necessary */
261 pdc_emergency_unlock();
262
263 /* maybe the kernel hasn't booted very far yet and hasn't been able
264 * to initialize the serial or STI console. In that case we should
265 * re-enable the pdc console, so that the user will be able to
266 * identify the problem. */
267 if (!console_drivers)
268 pdc_console_restart();
269
270 if (err)
271 printk(KERN_CRIT "%s (pid %d): %s (code %ld)\n",
272 current->comm, task_pid_nr(current), str, err);
273
274 /* Wot's wrong wif bein' racy? */
275 if (current->thread.flags & PARISC_KERNEL_DEATH) {
276 printk(KERN_CRIT "%s() recursion detected.\n", __func__);
277 local_irq_enable();
278 while (1);
279 }
280 current->thread.flags |= PARISC_KERNEL_DEATH;
281
282 show_regs(regs);
283 dump_stack();
284 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
285
286 if (in_interrupt())
287 panic("Fatal exception in interrupt");
288
289 if (panic_on_oops)
290 panic("Fatal exception");
291
292 oops_exit();
293 do_exit(SIGSEGV);
294 }
295
296 /* gdb uses break 4,8 */
297 #define GDB_BREAK_INSN 0x10004
298 static void handle_gdb_break(struct pt_regs *regs, int wot)
299 {
300 struct siginfo si;
301
302 clear_siginfo(&si);
303 si.si_signo = SIGTRAP;
304 si.si_errno = 0;
305 si.si_code = wot;
306 si.si_addr = (void __user *) (regs->iaoq[0] & ~3);
307 force_sig_info(SIGTRAP, &si, current);
308 }
309
310 static void handle_break(struct pt_regs *regs)
311 {
312 unsigned iir = regs->iir;
313
314 if (unlikely(iir == PARISC_BUG_BREAK_INSN && !user_mode(regs))) {
315 /* check if a BUG() or WARN() trapped here. */
316 enum bug_trap_type tt;
317 tt = report_bug(regs->iaoq[0] & ~3, regs);
318 if (tt == BUG_TRAP_TYPE_WARN) {
319 regs->iaoq[0] += 4;
320 regs->iaoq[1] += 4;
321 return; /* return to next instruction when WARN_ON(). */
322 }
323 die_if_kernel("Unknown kernel breakpoint", regs,
324 (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0);
325 }
326
327 if (unlikely(iir != GDB_BREAK_INSN))
328 parisc_printk_ratelimited(0, regs,
329 KERN_DEBUG "break %d,%d: pid=%d command='%s'\n",
330 iir & 31, (iir>>13) & ((1<<13)-1),
331 task_pid_nr(current), current->comm);
332
333 /* send standard GDB signal */
334 handle_gdb_break(regs, TRAP_BRKPT);
335 }
336
337 static void default_trap(int code, struct pt_regs *regs)
338 {
339 printk(KERN_ERR "Trap %d on CPU %d\n", code, smp_processor_id());
340 show_regs(regs);
341 }
342
343 void (*cpu_lpmc) (int code, struct pt_regs *regs) __read_mostly = default_trap;
344
345
346 void transfer_pim_to_trap_frame(struct pt_regs *regs)
347 {
348 register int i;
349 extern unsigned int hpmc_pim_data[];
350 struct pdc_hpmc_pim_11 *pim_narrow;
351 struct pdc_hpmc_pim_20 *pim_wide;
352
353 if (boot_cpu_data.cpu_type >= pcxu) {
354
355 pim_wide = (struct pdc_hpmc_pim_20 *)hpmc_pim_data;
356
357 /*
358 * Note: The following code will probably generate a
359 * bunch of truncation error warnings from the compiler.
360 * Could be handled with an ifdef, but perhaps there
361 * is a better way.
362 */
363
364 regs->gr[0] = pim_wide->cr[22];
365
366 for (i = 1; i < 32; i++)
367 regs->gr[i] = pim_wide->gr[i];
368
369 for (i = 0; i < 32; i++)
370 regs->fr[i] = pim_wide->fr[i];
371
372 for (i = 0; i < 8; i++)
373 regs->sr[i] = pim_wide->sr[i];
374
375 regs->iasq[0] = pim_wide->cr[17];
376 regs->iasq[1] = pim_wide->iasq_back;
377 regs->iaoq[0] = pim_wide->cr[18];
378 regs->iaoq[1] = pim_wide->iaoq_back;
379
380 regs->sar = pim_wide->cr[11];
381 regs->iir = pim_wide->cr[19];
382 regs->isr = pim_wide->cr[20];
383 regs->ior = pim_wide->cr[21];
384 }
385 else {
386 pim_narrow = (struct pdc_hpmc_pim_11 *)hpmc_pim_data;
387
388 regs->gr[0] = pim_narrow->cr[22];
389
390 for (i = 1; i < 32; i++)
391 regs->gr[i] = pim_narrow->gr[i];
392
393 for (i = 0; i < 32; i++)
394 regs->fr[i] = pim_narrow->fr[i];
395
396 for (i = 0; i < 8; i++)
397 regs->sr[i] = pim_narrow->sr[i];
398
399 regs->iasq[0] = pim_narrow->cr[17];
400 regs->iasq[1] = pim_narrow->iasq_back;
401 regs->iaoq[0] = pim_narrow->cr[18];
402 regs->iaoq[1] = pim_narrow->iaoq_back;
403
404 regs->sar = pim_narrow->cr[11];
405 regs->iir = pim_narrow->cr[19];
406 regs->isr = pim_narrow->cr[20];
407 regs->ior = pim_narrow->cr[21];
408 }
409
410 /*
411 * The following fields only have meaning if we came through
412 * another path. So just zero them here.
413 */
414
415 regs->ksp = 0;
416 regs->kpc = 0;
417 regs->orig_r28 = 0;
418 }
419
420
421 /*
422 * This routine is called as a last resort when everything else
423 * has gone clearly wrong. We get called for faults in kernel space,
424 * and HPMC's.
425 */
426 void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long offset)
427 {
428 static DEFINE_SPINLOCK(terminate_lock);
429
430 oops_in_progress = 1;
431
432 set_eiem(0);
433 local_irq_disable();
434 spin_lock(&terminate_lock);
435
436 /* unlock the pdc lock if necessary */
437 pdc_emergency_unlock();
438
439 /* restart pdc console if necessary */
440 if (!console_drivers)
441 pdc_console_restart();
442
443 /* Not all paths will gutter the processor... */
444 switch(code){
445
446 case 1:
447 transfer_pim_to_trap_frame(regs);
448 break;
449
450 default:
451 /* Fall through */
452 break;
453
454 }
455
456 {
457 /* show_stack(NULL, (unsigned long *)regs->gr[30]); */
458 struct unwind_frame_info info;
459 unwind_frame_init(&info, current, regs);
460 do_show_stack(&info);
461 }
462
463 printk("\n");
464 pr_crit("%s: Code=%d (%s) regs=%p (Addr=" RFMT ")\n",
465 msg, code, trap_name(code), regs, offset);
466 show_regs(regs);
467
468 spin_unlock(&terminate_lock);
469
470 /* put soft power button back under hardware control;
471 * if the user had pressed it once at any time, the
472 * system will shut down immediately right here. */
473 pdc_soft_power_button(0);
474
475 /* Call kernel panic() so reboot timeouts work properly
476 * FIXME: This function should be on the list of
477 * panic notifiers, and we should call panic
478 * directly from the location that we wish.
479 * e.g. We should not call panic from
480 * parisc_terminate, but rather the oter way around.
481 * This hack works, prints the panic message twice,
482 * and it enables reboot timers!
483 */
484 panic(msg);
485 }
486
487 void notrace handle_interruption(int code, struct pt_regs *regs)
488 {
489 unsigned long fault_address = 0;
490 unsigned long fault_space = 0;
491 struct siginfo si;
492
493 clear_siginfo(&si);
494 if (code == 1)
495 pdc_console_restart(); /* switch back to pdc if HPMC */
496 else
497 local_irq_enable();
498
499 /* Security check:
500 * If the priority level is still user, and the
501 * faulting space is not equal to the active space
502 * then the user is attempting something in a space
503 * that does not belong to them. Kill the process.
504 *
505 * This is normally the situation when the user
506 * attempts to jump into the kernel space at the
507 * wrong offset, be it at the gateway page or a
508 * random location.
509 *
510 * We cannot normally signal the process because it
511 * could *be* on the gateway page, and processes
512 * executing on the gateway page can't have signals
513 * delivered.
514 *
515 * We merely readjust the address into the users
516 * space, at a destination address of zero, and
517 * allow processing to continue.
518 */
519 if (((unsigned long)regs->iaoq[0] & 3) &&
520 ((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) {
521 /* Kill the user process later */
522 regs->iaoq[0] = 0 | 3;
523 regs->iaoq[1] = regs->iaoq[0] + 4;
524 regs->iasq[0] = regs->iasq[1] = regs->sr[7];
525 regs->gr[0] &= ~PSW_B;
526 return;
527 }
528
529 #if 0
530 printk(KERN_CRIT "Interruption # %d\n", code);
531 #endif
532
533 switch(code) {
534
535 case 1:
536 /* High-priority machine check (HPMC) */
537
538 /* set up a new led state on systems shipped with a LED State panel */
539 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC);
540
541 parisc_terminate("High Priority Machine Check (HPMC)",
542 regs, code, 0);
543 /* NOT REACHED */
544
545 case 2:
546 /* Power failure interrupt */
547 printk(KERN_CRIT "Power failure interrupt !\n");
548 return;
549
550 case 3:
551 /* Recovery counter trap */
552 regs->gr[0] &= ~PSW_R;
553 if (user_space(regs))
554 handle_gdb_break(regs, TRAP_TRACE);
555 /* else this must be the start of a syscall - just let it run */
556 return;
557
558 case 5:
559 /* Low-priority machine check */
560 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC);
561
562 flush_cache_all();
563 flush_tlb_all();
564 cpu_lpmc(5, regs);
565 return;
566
567 case 6:
568 /* Instruction TLB miss fault/Instruction page fault */
569 fault_address = regs->iaoq[0];
570 fault_space = regs->iasq[0];
571 break;
572
573 case 8:
574 /* Illegal instruction trap */
575 die_if_kernel("Illegal instruction", regs, code);
576 si.si_code = ILL_ILLOPC;
577 goto give_sigill;
578
579 case 9:
580 /* Break instruction trap */
581 handle_break(regs);
582 return;
583
584 case 10:
585 /* Privileged operation trap */
586 die_if_kernel("Privileged operation", regs, code);
587 si.si_code = ILL_PRVOPC;
588 goto give_sigill;
589
590 case 11:
591 /* Privileged register trap */
592 if ((regs->iir & 0xffdfffe0) == 0x034008a0) {
593
594 /* This is a MFCTL cr26/cr27 to gr instruction.
595 * PCXS traps on this, so we need to emulate it.
596 */
597
598 if (regs->iir & 0x00200000)
599 regs->gr[regs->iir & 0x1f] = mfctl(27);
600 else
601 regs->gr[regs->iir & 0x1f] = mfctl(26);
602
603 regs->iaoq[0] = regs->iaoq[1];
604 regs->iaoq[1] += 4;
605 regs->iasq[0] = regs->iasq[1];
606 return;
607 }
608
609 die_if_kernel("Privileged register usage", regs, code);
610 si.si_code = ILL_PRVREG;
611 give_sigill:
612 si.si_signo = SIGILL;
613 si.si_errno = 0;
614 si.si_addr = (void __user *) regs->iaoq[0];
615 force_sig_info(SIGILL, &si, current);
616 return;
617
618 case 12:
619 /* Overflow Trap, let the userland signal handler do the cleanup */
620 si.si_signo = SIGFPE;
621 si.si_code = FPE_INTOVF;
622 si.si_addr = (void __user *) regs->iaoq[0];
623 force_sig_info(SIGFPE, &si, current);
624 return;
625
626 case 13:
627 /* Conditional Trap
628 The condition succeeds in an instruction which traps
629 on condition */
630 if(user_mode(regs)){
631 si.si_signo = SIGFPE;
632 /* Let userspace app figure it out from the insn pointed
633 * to by si_addr.
634 */
635 si.si_code = FPE_CONDTRAP;
636 si.si_addr = (void __user *) regs->iaoq[0];
637 force_sig_info(SIGFPE, &si, current);
638 return;
639 }
640 /* The kernel doesn't want to handle condition codes */
641 break;
642
643 case 14:
644 /* Assist Exception Trap, i.e. floating point exception. */
645 die_if_kernel("Floating point exception", regs, 0); /* quiet */
646 __inc_irq_stat(irq_fpassist_count);
647 handle_fpe(regs);
648 return;
649
650 case 15:
651 /* Data TLB miss fault/Data page fault */
652 /* Fall through */
653 case 16:
654 /* Non-access instruction TLB miss fault */
655 /* The instruction TLB entry needed for the target address of the FIC
656 is absent, and hardware can't find it, so we get to cleanup */
657 /* Fall through */
658 case 17:
659 /* Non-access data TLB miss fault/Non-access data page fault */
660 /* FIXME:
661 Still need to add slow path emulation code here!
662 If the insn used a non-shadow register, then the tlb
663 handlers could not have their side-effect (e.g. probe
664 writing to a target register) emulated since rfir would
665 erase the changes to said register. Instead we have to
666 setup everything, call this function we are in, and emulate
667 by hand. Technically we need to emulate:
668 fdc,fdce,pdc,"fic,4f",prober,probeir,probew, probeiw
669 */
670 fault_address = regs->ior;
671 fault_space = regs->isr;
672 break;
673
674 case 18:
675 /* PCXS only -- later cpu's split this into types 26,27 & 28 */
676 /* Check for unaligned access */
677 if (check_unaligned(regs)) {
678 handle_unaligned(regs);
679 return;
680 }
681 /* Fall Through */
682 case 26:
683 /* PCXL: Data memory access rights trap */
684 fault_address = regs->ior;
685 fault_space = regs->isr;
686 break;
687
688 case 19:
689 /* Data memory break trap */
690 regs->gr[0] |= PSW_X; /* So we can single-step over the trap */
691 /* fall thru */
692 case 21:
693 /* Page reference trap */
694 handle_gdb_break(regs, TRAP_HWBKPT);
695 return;
696
697 case 25:
698 /* Taken branch trap */
699 regs->gr[0] &= ~PSW_T;
700 if (user_space(regs))
701 handle_gdb_break(regs, TRAP_BRANCH);
702 /* else this must be the start of a syscall - just let it
703 * run.
704 */
705 return;
706
707 case 7:
708 /* Instruction access rights */
709 /* PCXL: Instruction memory protection trap */
710
711 /*
712 * This could be caused by either: 1) a process attempting
713 * to execute within a vma that does not have execute
714 * permission, or 2) an access rights violation caused by a
715 * flush only translation set up by ptep_get_and_clear().
716 * So we check the vma permissions to differentiate the two.
717 * If the vma indicates we have execute permission, then
718 * the cause is the latter one. In this case, we need to
719 * call do_page_fault() to fix the problem.
720 */
721
722 if (user_mode(regs)) {
723 struct vm_area_struct *vma;
724
725 down_read(&current->mm->mmap_sem);
726 vma = find_vma(current->mm,regs->iaoq[0]);
727 if (vma && (regs->iaoq[0] >= vma->vm_start)
728 && (vma->vm_flags & VM_EXEC)) {
729
730 fault_address = regs->iaoq[0];
731 fault_space = regs->iasq[0];
732
733 up_read(&current->mm->mmap_sem);
734 break; /* call do_page_fault() */
735 }
736 up_read(&current->mm->mmap_sem);
737 }
738 /* Fall Through */
739 case 27:
740 /* Data memory protection ID trap */
741 if (code == 27 && !user_mode(regs) &&
742 fixup_exception(regs))
743 return;
744
745 die_if_kernel("Protection id trap", regs, code);
746 si.si_code = SEGV_MAPERR;
747 si.si_signo = SIGSEGV;
748 si.si_errno = 0;
749 if (code == 7)
750 si.si_addr = (void __user *) regs->iaoq[0];
751 else
752 si.si_addr = (void __user *) regs->ior;
753 force_sig_info(SIGSEGV, &si, current);
754 return;
755
756 case 28:
757 /* Unaligned data reference trap */
758 handle_unaligned(regs);
759 return;
760
761 default:
762 if (user_mode(regs)) {
763 parisc_printk_ratelimited(0, regs, KERN_DEBUG
764 "handle_interruption() pid=%d command='%s'\n",
765 task_pid_nr(current), current->comm);
766 /* SIGBUS, for lack of a better one. */
767 si.si_signo = SIGBUS;
768 si.si_code = BUS_OBJERR;
769 si.si_errno = 0;
770 si.si_addr = (void __user *) regs->ior;
771 force_sig_info(SIGBUS, &si, current);
772 return;
773 }
774 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
775
776 parisc_terminate("Unexpected interruption", regs, code, 0);
777 /* NOT REACHED */
778 }
779
780 if (user_mode(regs)) {
781 if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) {
782 parisc_printk_ratelimited(0, regs, KERN_DEBUG
783 "User fault %d on space 0x%08lx, pid=%d command='%s'\n",
784 code, fault_space,
785 task_pid_nr(current), current->comm);
786 si.si_signo = SIGSEGV;
787 si.si_errno = 0;
788 si.si_code = SEGV_MAPERR;
789 si.si_addr = (void __user *) regs->ior;
790 force_sig_info(SIGSEGV, &si, current);
791 return;
792 }
793 }
794 else {
795
796 /*
797 * The kernel should never fault on its own address space,
798 * unless pagefault_disable() was called before.
799 */
800
801 if (fault_space == 0 && !faulthandler_disabled())
802 {
803 /* Clean up and return if in exception table. */
804 if (fixup_exception(regs))
805 return;
806 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
807 parisc_terminate("Kernel Fault", regs, code, fault_address);
808 }
809 }
810
811 do_page_fault(regs, code, fault_address);
812 }
813
814
815 void __init initialize_ivt(const void *iva)
816 {
817 extern u32 os_hpmc_size;
818 extern const u32 os_hpmc[];
819
820 int i;
821 u32 check = 0;
822 u32 *ivap;
823 u32 *hpmcp;
824 u32 length, instr;
825
826 if (strcmp((const char *)iva, "cows can fly"))
827 panic("IVT invalid");
828
829 ivap = (u32 *)iva;
830
831 for (i = 0; i < 8; i++)
832 *ivap++ = 0;
833
834 /*
835 * Use PDC_INSTR firmware function to get instruction that invokes
836 * PDCE_CHECK in HPMC handler. See programming note at page 1-31 of
837 * the PA 1.1 Firmware Architecture document.
838 */
839 if (pdc_instr(&instr) == PDC_OK)
840 ivap[0] = instr;
841
842 /* Compute Checksum for HPMC handler */
843 length = os_hpmc_size;
844 ivap[7] = length;
845
846 hpmcp = (u32 *)os_hpmc;
847
848 for (i=0; i<length/4; i++)
849 check += *hpmcp++;
850
851 for (i=0; i<8; i++)
852 check += ivap[i];
853
854 ivap[5] = -check;
855 }
856
857
858 /* early_trap_init() is called before we set up kernel mappings and
859 * write-protect the kernel */
860 void __init early_trap_init(void)
861 {
862 extern const void fault_vector_20;
863
864 #ifndef CONFIG_64BIT
865 extern const void fault_vector_11;
866 initialize_ivt(&fault_vector_11);
867 #endif
868
869 initialize_ivt(&fault_vector_20);
870 }
871
872 void __init trap_init(void)
873 {
874 }