arch/parisc/mm/fault.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  *
   7  * Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
   8  * Copyright 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
   9  * Copyright 1999 Hewlett Packard Co.
  10  *
  11  */
  12
  13 #include <linux/mm.h>
  14 #include <linux/ptrace.h>
  15 #include <linux/sched.h>
  16 #include <linux/sched/debug.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/extable.h>
  19 #include <linux/uaccess.h>
  20
  21 #include <asm/traps.h>
  22
  23 /* Various important other fields */
  24 #define bit22set(x)             (x & 0x00000200)
  25 #define bits23_25set(x)         (x & 0x000001c0)
  26 #define isGraphicsFlushRead(x)  ((x & 0xfc003fdf) == 0x04001a80)
  27                                 /* extended opcode is 0x6a */
  28
  29 #define BITSSET         0x1c0   /* for identifying LDCW */
  30
  31
  32 DEFINE_PER_CPU(struct exception_data, exception_data);
  33
  34 int show_unhandled_signals = 1;
  35
  36 /*
  37  * parisc_acctyp(unsigned int inst) --
  38  *    Given a PA-RISC memory access instruction, determine if the
  39  *    the instruction would perform a memory read or memory write
  40  *    operation.
  41  *
  42  *    This function assumes that the given instruction is a memory access
  43  *    instruction (i.e. you should really only call it if you know that
  44  *    the instruction has generated some sort of a memory access fault).
  45  *
  46  * Returns:
  47  *   VM_READ  if read operation
  48  *   VM_WRITE if write operation
  49  *   VM_EXEC  if execute operation
  50  */
  51 static unsigned long
  52 parisc_acctyp(unsigned long code, unsigned int inst)
  53 {
  54         if (code == 6 || code == 16)
  55             return VM_EXEC;
  56
  57         switch (inst & 0xf0000000) {
  58         case 0x40000000: /* load */
  59         case 0x50000000: /* new load */
  60                 return VM_READ;
  61
  62         case 0x60000000: /* store */
  63         case 0x70000000: /* new store */
  64                 return VM_WRITE;
  65
  66         case 0x20000000: /* coproc */
  67         case 0x30000000: /* coproc2 */
  68                 if (bit22set(inst))
  69                         return VM_WRITE;
  70
  71         case 0x0: /* indexed/memory management */
  72                 if (bit22set(inst)) {
  73                         /*
  74                          * Check for the 'Graphics Flush Read' instruction.
  75                          * It resembles an FDC instruction, except for bits
  76                          * 20 and 21. Any combination other than zero will
  77                          * utilize the block mover functionality on some
  78                          * older PA-RISC platforms.  The case where a block
  79                          * move is performed from VM to graphics IO space
  80                          * should be treated as a READ.
  81                          *
  82                          * The significance of bits 20,21 in the FDC
  83                          * instruction is:
  84                          *
  85                          *   00  Flush data cache (normal instruction behavior)
  86                          *   01  Graphics flush write  (IO space -> VM)
  87                          *   10  Graphics flush read   (VM -> IO space)
  88                          *   11  Graphics flush read/write (VM <-> IO space)
  89                          */
  90                         if (isGraphicsFlushRead(inst))
  91                                 return VM_READ;
  92                         return VM_WRITE;
  93                 } else {
  94                         /*
  95                          * Check for LDCWX and LDCWS (semaphore instructions).
  96                          * If bits 23 through 25 are all 1's it is one of
  97                          * the above two instructions and is a write.
  98                          *
  99                          * Note: With the limited bits we are looking at,
 100                          * this will also catch PROBEW and PROBEWI. However,
 101                          * these should never get in here because they don't
 102                          * generate exceptions of the type:
 103                          *   Data TLB miss fault/data page fault
 104                          *   Data memory protection trap
 105                          */
 106                         if (bits23_25set(inst) == BITSSET)
 107                                 return VM_WRITE;
 108                 }
 109                 return VM_READ; /* Default */
 110         }
 111         return VM_READ; /* Default */
 112 }
 113
 114 #undef bit22set
 115 #undef bits23_25set
 116 #undef isGraphicsFlushRead
 117 #undef BITSSET
 118
 119
 120 #if 0
 121 /* This is the treewalk to find a vma which is the highest that has
 122  * a start < addr.  We're using find_vma_prev instead right now, but
 123  * we might want to use this at some point in the future.  Probably
 124  * not, but I want it committed to CVS so I don't lose it :-)
 125  */
 126                         while (tree != vm_avl_empty) {
 127                                 if (tree->vm_start > addr) {
 128                                         tree = tree->vm_avl_left;
 129                                 } else {
 130                                         prev = tree;
 131                                         if (prev->vm_next == NULL)
 132                                                 break;
 133                                         if (prev->vm_next->vm_start > addr)
 134                                                 break;
 135                                         tree = tree->vm_avl_right;
 136                                 }
 137                         }
 138 #endif
 139
 140 int fixup_exception(struct pt_regs *regs)
 141 {
 142         const struct exception_table_entry *fix;
 143
 144         fix = search_exception_tables(regs->iaoq[0]);
 145         if (fix) {
 146                 struct exception_data *d;
 147                 d = this_cpu_ptr(&exception_data);
 148                 d->fault_ip = regs->iaoq[0];
 149                 d->fault_gp = regs->gr[27];
 150                 d->fault_space = regs->isr;
 151                 d->fault_addr = regs->ior;
 152
 153                 regs->iaoq[0] = (unsigned long)&fix->fixup + fix->fixup;
 154                 regs->iaoq[0] &= ~3;
 155                 /*
 156                  * NOTE: In some cases the faulting instruction
 157                  * may be in the delay slot of a branch. We
 158                  * don't want to take the branch, so we don't
 159                  * increment iaoq[1], instead we set it to be
 160                  * iaoq[0]+4, and clear the B bit in the PSW
 161                  */
 162                 regs->iaoq[1] = regs->iaoq[0] + 4;
 163                 regs->gr[0] &= ~PSW_B; /* IPSW in gr[0] */
 164
 165                 return 1;
 166         }
 167
 168         return 0;
 169 }
 170
 171 /*
 172  * parisc hardware trap list
 173  *
 174  * Documented in section 3 "Addressing and Access Control" of the
 175  * "PA-RISC 1.1 Architecture and Instruction Set Reference Manual"
 176  * https://parisc.wiki.kernel.org/index.php/File:Pa11_acd.pdf
 177  *
 178  * For implementation see handle_interruption() in traps.c
 179  */
 180 static const char * const trap_description[] = {
 181         [1] "High-priority machine check (HPMC)",
 182         [2] "Power failure interrupt",
 183         [3] "Recovery counter trap",
 184         [5] "Low-priority machine check",
 185         [6] "Instruction TLB miss fault",
 186         [7] "Instruction access rights / protection trap",
 187         [8] "Illegal instruction trap",
 188         [9] "Break instruction trap",
 189         [10] "Privileged operation trap",
 190         [11] "Privileged register trap",
 191         [12] "Overflow trap",
 192         [13] "Conditional trap",
 193         [14] "FP Assist Exception trap",
 194         [15] "Data TLB miss fault",
 195         [16] "Non-access ITLB miss fault",
 196         [17] "Non-access DTLB miss fault",
 197         [18] "Data memory protection/unaligned access trap",
 198         [19] "Data memory break trap",
 199         [20] "TLB dirty bit trap",
 200         [21] "Page reference trap",
 201         [22] "Assist emulation trap",
 202         [25] "Taken branch trap",
 203         [26] "Data memory access rights trap",
 204         [27] "Data memory protection ID trap",
 205         [28] "Unaligned data reference trap",
 206 };
 207
 208 const char *trap_name(unsigned long code)
 209 {
 210         const char *t = NULL;
 211
 212         if (code < ARRAY_SIZE(trap_description))
 213                 t = trap_description[code];
 214
 215         return t ? t : "Unknown trap";
 216 }
 217
 218 /*
 219  * Print out info about fatal segfaults, if the show_unhandled_signals
 220  * sysctl is set:
 221  */
 222 static inline void
 223 show_signal_msg(struct pt_regs *regs, unsigned long code,
 224                 unsigned long address, struct task_struct *tsk,
 225                 struct vm_area_struct *vma)
 226 {
 227         if (!unhandled_signal(tsk, SIGSEGV))
 228                 return;
 229
 230         if (!printk_ratelimit())
 231                 return;
 232
 233         pr_warn("\n");
 234         pr_warn("do_page_fault() command='%s' type=%lu address=0x%08lx",
 235             tsk->comm, code, address);
 236         print_vma_addr(KERN_CONT " in ", regs->iaoq[0]);
 237
 238         pr_cont("\ntrap #%lu: %s%c", code, trap_name(code),
 239                 vma ? ',':'\n');
 240
 241         if (vma)
 242                 pr_cont(" vm_start = 0x%08lx, vm_end = 0x%08lx\n",
 243                         vma->vm_start, vma->vm_end);
 244
 245         show_regs(regs);
 246 }
 247
 248 void do_page_fault(struct pt_regs *regs, unsigned long code,
 249                               unsigned long address)
 250 {
 251         struct vm_area_struct *vma, *prev_vma;
 252         struct task_struct *tsk;
 253         struct mm_struct *mm;
 254         unsigned long acc_type;
 255         int fault;
 256         unsigned int flags;
 257
 258         if (faulthandler_disabled())
 259                 goto no_context;
 260
 261         tsk = current;
 262         mm = tsk->mm;
 263         if (!mm)
 264                 goto no_context;
 265
 266         flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
 267         if (user_mode(regs))
 268                 flags |= FAULT_FLAG_USER;
 269
 270         acc_type = parisc_acctyp(code, regs->iir);
 271         if (acc_type & VM_WRITE)
 272                 flags |= FAULT_FLAG_WRITE;
 273 retry:
 274         down_read(&mm->mmap_sem);
 275         vma = find_vma_prev(mm, address, &prev_vma);
 276         if (!vma || address < vma->vm_start)
 277                 goto check_expansion;
 278 /*
 279  * Ok, we have a good vm_area for this memory access. We still need to
 280  * check the access permissions.
 281  */
 282
 283 good_area:
 284
 285         if ((vma->vm_flags & acc_type) != acc_type)
 286                 goto bad_area;
 287
 288         /*
 289          * If for any reason at all we couldn't handle the fault, make
 290          * sure we exit gracefully rather than endlessly redo the
 291          * fault.
 292          */
 293
 294         fault = handle_mm_fault(vma, address, flags);
 295
 296         if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
 297                 return;
 298
 299         if (unlikely(fault & VM_FAULT_ERROR)) {
 300                 /*
 301                  * We hit a shared mapping outside of the file, or some
 302                  * other thing happened to us that made us unable to
 303                  * handle the page fault gracefully.
 304                  */
 305                 if (fault & VM_FAULT_OOM)
 306                         goto out_of_memory;
 307                 else if (fault & VM_FAULT_SIGSEGV)
 308                         goto bad_area;
 309                 else if (fault & VM_FAULT_SIGBUS)
 310                         goto bad_area;
 311                 BUG();
 312         }
 313         if (flags & FAULT_FLAG_ALLOW_RETRY) {
 314                 if (fault & VM_FAULT_MAJOR)
 315                         current->maj_flt++;
 316                 else
 317                         current->min_flt++;
 318                 if (fault & VM_FAULT_RETRY) {
 319                         flags &= ~FAULT_FLAG_ALLOW_RETRY;
 320
 321                         /*
 322                          * No need to up_read(&mm->mmap_sem) as we would
 323                          * have already released it in __lock_page_or_retry
 324                          * in mm/filemap.c.
 325                          */
 326
 327                         goto retry;
 328                 }
 329         }
 330         up_read(&mm->mmap_sem);
 331         return;
 332
 333 check_expansion:
 334         vma = prev_vma;
 335         if (vma && (expand_stack(vma, address) == 0))
 336                 goto good_area;
 337
 338 /*
 339  * Something tried to access memory that isn't in our memory map..
 340  */
 341 bad_area:
 342         up_read(&mm->mmap_sem);
 343
 344         if (user_mode(regs)) {
 345                 struct siginfo si;
 346
 347                 show_signal_msg(regs, code, address, tsk, vma);
 348
 349                 switch (code) {
 350                 case 15:        /* Data TLB miss fault/Data page fault */
 351                         /* send SIGSEGV when outside of vma */
 352                         if (!vma ||
 353                             address < vma->vm_start || address > vma->vm_end) {
 354                                 si.si_signo = SIGSEGV;
 355                                 si.si_code = SEGV_MAPERR;
 356                                 break;
 357                         }
 358
 359                         /* send SIGSEGV for wrong permissions */
 360                         if ((vma->vm_flags & acc_type) != acc_type) {
 361                                 si.si_signo = SIGSEGV;
 362                                 si.si_code = SEGV_ACCERR;
 363                                 break;
 364                         }
 365
 366                         /* probably address is outside of mapped file */
 367                         /* fall through */
 368                 case 17:        /* NA data TLB miss / page fault */
 369                 case 18:        /* Unaligned access - PCXS only */
 370                         si.si_signo = SIGBUS;
 371                         si.si_code = (code == 18) ? BUS_ADRALN : BUS_ADRERR;
 372                         break;
 373                 case 16:        /* Non-access instruction TLB miss fault */
 374                 case 26:        /* PCXL: Data memory access rights trap */
 375                 default:
 376                         si.si_signo = SIGSEGV;
 377                         si.si_code = (code == 26) ? SEGV_ACCERR : SEGV_MAPERR;
 378                         break;
 379                 }
 380                 si.si_errno = 0;
 381                 si.si_addr = (void __user *) address;
 382                 force_sig_info(si.si_signo, &si, current);
 383                 return;
 384         }
 385
 386 no_context:
 387
 388         if (!user_mode(regs) && fixup_exception(regs)) {
 389                 return;
 390         }
 391
 392         parisc_terminate("Bad Address (null pointer deref?)", regs, code, address);
 393
 394   out_of_memory:
 395         up_read(&mm->mmap_sem);
 396         if (!user_mode(regs))
 397                 goto no_context;
 398         pagefault_out_of_memory();
 399 }