arch/powerpc/boot/dts/akebono.dts

   1 /*
   2  * Device Tree Source for IBM Embedded PPC 476 Platform
   3  *
   4  * Copyright © 2013 Tony Breeds IBM Corporation
   5  * Copyright © 2013 Alistair Popple IBM Corporation
   6  *
   7  * This file is licensed under the terms of the GNU General Public
   8  * License version 2.  This program is licensed "as is" without
   9  * any warranty of any kind, whether express or implied.
  10  */
  11
  12 /dts-v1/;
  13
  14 /memreserve/ 0x01f00000 0x00100000;     // spin table
  15
  16 / {
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19         model = "ibm,akebono";
  20         compatible = "ibm,akebono", "ibm,476gtr";
  21         dcr-parent = <&{/cpus/cpu@0}>;
  22
  23         aliases {
  24                 serial0 = &UART0;
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 cpu@0 {
  32                         device_type = "cpu";
  33                         model = "PowerPC,476";
  34                         reg = <0>;
  35                         clock-frequency = <1600000000>; // 1.6 GHz
  36                         timebase-frequency = <100000000>; // 100Mhz
  37                         i-cache-line-size = <32>;
  38                         d-cache-line-size = <32>;
  39                         i-cache-size = <32768>;
  40                         d-cache-size = <32768>;
  41                         dcr-controller;
  42                         dcr-access-method = "native";
  43                         status = "ok";
  44                 };
  45                 cpu@1 {
  46                         device_type = "cpu";
  47                         model = "PowerPC,476";
  48                         reg = <1>;
  49                         clock-frequency = <1600000000>; // 1.6 GHz
  50                         timebase-frequency = <100000000>; // 100Mhz
  51                         i-cache-line-size = <32>;
  52                         d-cache-line-size = <32>;
  53                         i-cache-size = <32768>;
  54                         d-cache-size = <32768>;
  55                         dcr-controller;
  56                         dcr-access-method = "native";
  57                         status = "disabled";
  58                         enable-method = "spin-table";
  59                         cpu-release-addr = <0x0 0x01f00000>;
  60                 };
  61         };
  62
  63         memory {
  64                 device_type = "memory";
  65                 reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
  66         };
  67
  68         MPIC: interrupt-controller {
  69                 compatible = "chrp,open-pic";
  70                 interrupt-controller;
  71                 dcr-reg = <0xffc00000 0x00040000>;
  72                 #address-cells = <0>;
  73                 #size-cells = <0>;
  74                 #interrupt-cells = <2>;
  75                 single-cpu-affinity;
  76         };
  77
  78         plb {
  79                 compatible = "ibm,plb6";
  80                 #address-cells = <2>;
  81                 #size-cells = <2>;
  82                 ranges;
  83                 clock-frequency = <200000000>; // 200Mhz
  84
  85                 MAL0: mcmal {
  86                         compatible = "ibm,mcmal-476gtr", "ibm,mcmal2";
  87                         dcr-reg = <0xc0000000 0x062>;
  88                         num-tx-chans = <1>;
  89                         num-rx-chans = <1>;
  90                         #address-cells = <0>;
  91                         #size-cells = <0>;
  92                         interrupt-parent = <&MPIC>;
  93                         interrupts = <  /*TXEOB*/ 77 0x4
  94                                         /*RXEOB*/ 78 0x4
  95                                         /*SERR*/  76 0x4
  96                                         /*TXDE*/  79 0x4
  97                                         /*RXDE*/  80 0x4>;
  98                 };
  99
 100                 SATA0: sata@30000010000 {
 101                         compatible = "ibm,476gtr-ahci";
 102                         reg = <0x300 0x00010000 0x0 0x10000>;
 103                         interrupt-parent = <&MPIC>;
 104                         interrupts = <93 2>;
 105                 };
 106
 107                 EHCI0: ehci@30010000000 {
 108                         compatible = "ibm,476gtr-ehci", "generic-ehci";
 109                         reg = <0x300 0x10000000 0x0 0x10000>;
 110                         interrupt-parent = <&MPIC>;
 111                         interrupts = <85 2>;
 112                 };
 113
 114                 SD0: sd@30000000000 {
 115                         compatible = "ibm,476gtr-sdhci", "generic-sdhci";
 116                         reg = <0x300 0x00000000 0x0 0x10000>;
 117                         interrupts = <91 2>;
 118                         interrupt-parent = <&MPIC>;
 119                 };
 120
 121                 OHCI0: ohci@30010010000 {
 122                         compatible = "ibm,476gtr-ohci", "generic-ohci";
 123                         reg = <0x300 0x10010000 0x0 0x10000>;
 124                         interrupt-parent = <&MPIC>;
 125                         interrupts = <89 1>;
 126                         };
 127
 128                 OHCI1: ohci@30010020000 {
 129                         compatible = "ibm,476gtr-ohci", "generic-ohci";
 130                         reg = <0x300 0x10020000 0x0 0x10000>;
 131                         interrupt-parent = <&MPIC>;
 132                         interrupts = <88 1>;
 133                         };
 134
 135                 POB0: opb {
 136                         compatible = "ibm,opb-4xx", "ibm,opb";
 137                         #address-cells = <1>;
 138                         #size-cells = <1>;
 139                         /* Wish there was a nicer way of specifying a full
 140                          * 32-bit range
 141                          */
 142                         ranges = <0x00000000 0x0000033f 0x00000000 0x80000000
 143                                   0x80000000 0x0000033f 0x80000000 0x80000000>;
 144                         clock-frequency = <100000000>;
 145
 146                         RGMII0: emac-rgmii-wol@50004 {
 147                                 compatible = "ibm,rgmii-wol-476gtr", "ibm,rgmii-wol";
 148                                 reg = <0x50004 0x00000008>;
 149                                 has-mdio;
 150                         };
 151
 152                         EMAC0: ethernet@30000 {
 153                                 device_type = "network";
 154                                 compatible = "ibm,emac-476gtr", "ibm,emac4sync";
 155                                 interrupt-parent = <&EMAC0>;
 156                                 interrupts = <0x0 0x1>;
 157                                 #interrupt-cells = <1>;
 158                                 #address-cells = <0>;
 159                                 #size-cells = <0>;
 160                                 interrupt-map = </*Status*/ 0x0 &MPIC 81 0x4
 161                                                  /*Wake*/   0x1 &MPIC 82 0x4>;
 162                                 reg = <0x30000 0x78>;
 163
 164                                 /* local-mac-address will normally be added by
 165                                  * the wrapper. If your device doesn't support
 166                                  * passing data to the wrapper (in the form
 167                                  * local-mac-addr=<hwaddr>) then you will need
 168                                  * to set it manually here. */
 169                                 //local-mac-address = [000000000000];
 170
 171                                 mal-device = <&MAL0>;
 172                                 mal-tx-channel = <0>;
 173                                 mal-rx-channel = <0>;
 174                                 cell-index = <0>;
 175                                 max-frame-size = <9000>;
 176                                 rx-fifo-size = <4096>;
 177                                 tx-fifo-size = <2048>;
 178                                 rx-fifo-size-gige = <16384>;
 179                                 phy-mode = "rgmii";
 180                                 phy-map = <0x00000000>;
 181                                 rgmii-wol-device = <&RGMII0>;
 182                                 has-inverted-stacr-oc;
 183                                 has-new-stacr-staopc;
 184                         };
 185
 186                         UART0: serial@10000 {
 187                                 device_type = "serial";
 188                                 compatible = "ns16750", "ns16550";
 189                                 reg = <0x10000 0x00000008>;
 190                                 virtual-reg = <0xe8010000>;
 191                                 clock-frequency = <1851851>;
 192                                 current-speed = <38400>;
 193                                 interrupt-parent = <&MPIC>;
 194                                 interrupts = <39 2>;
 195                         };
 196
 197                         IIC0: i2c@00000000 {
 198                                 compatible = "ibm,iic-476gtr", "ibm,iic";
 199                                 reg = <0x0 0x00000020>;
 200                                 interrupt-parent = <&MPIC>;
 201                                 interrupts = <37 2>;
 202                                 #address-cells = <1>;
 203                                 #size-cells = <0>;
 204                                 rtc@68 {
 205                                         compatible = "stm,m41t80", "m41st85";
 206                                         reg = <0x68>;
 207                                 };
 208                         };
 209
 210                         IIC1: i2c@00000100 {
 211                                 compatible = "ibm,iic-476gtr", "ibm,iic";
 212                                 reg = <0x100 0x00000020>;
 213                                 interrupt-parent = <&MPIC>;
 214                                 interrupts = <38 2>;
 215                                 #address-cells = <1>;
 216                                 #size-cells = <0>;
 217                                 avr@58 {
 218                                         compatible = "ibm,akebono-avr";
 219                                         reg = <0x58>;
 220                                 };
 221                         };
 222
 223                         FPGA0: fpga@ebc00000 {
 224                                 compatible = "ibm,akebono-fpga";
 225                                 reg = <0xebc00000 0x8>;
 226                         };
 227                 };
 228
 229                 PCIE0: pciex@10100000000 {
 230                         device_type = "pci";
 231                         #interrupt-cells = <1>;
 232                         #size-cells = <2>;
 233                         #address-cells = <3>;
 234                         compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
 235                         primary;
 236                         port = <0x0>; /* port number */
 237                         reg = <0x00000101 0x00000000 0x0 0x10000000            /* Config space access */
 238                                0x00000100 0x00000000 0x0 0x00001000>;   /* UTL Registers space access */
 239                         dcr-reg = <0xc0 0x20>;
 240
 241 //                                pci_space  < pci_addr          > < cpu_addr          > < size       >
 242                         ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000
 243                                   0x01000000 0x0        0x0        0x00000140 0x0        0x0 0x00010000>;
 244
 245                         /* Inbound starting at 0 to memsize filled in by zImage */
 246                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
 247
 248                         /* This drives busses 0 to 0xf */
 249                         bus-range = <0x0 0xf>;
 250
 251                         /* Legacy interrupts (note the weird polarity, the bridge seems
 252                          * to invert PCIe legacy interrupts).
 253                          * We are de-swizzling here because the numbers are actually for
 254                          * port of the root complex virtual P2P bridge. But I want
 255                          * to avoid putting a node for it in the tree, so the numbers
 256                          * below are basically de-swizzled numbers.
 257                          * The real slot is on idsel 0, so the swizzling is 1:1
 258                          */
 259                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 260                         interrupt-map = <
 261                                 0x0 0x0 0x0 0x1 &MPIC 45 0x2 /* int A */
 262                                 0x0 0x0 0x0 0x2 &MPIC 46 0x2 /* int B */
 263                                 0x0 0x0 0x0 0x3 &MPIC 47 0x2 /* int C */
 264                                 0x0 0x0 0x0 0x4 &MPIC 48 0x2 /* int D */>;
 265                 };
 266
 267                 PCIE1: pciex@20100000000 {
 268                         device_type = "pci";
 269                         #interrupt-cells = <1>;
 270                         #size-cells = <2>;
 271                         #address-cells = <3>;
 272                         compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
 273                         primary;
 274                         port = <0x1>; /* port number */
 275                         reg = <0x00000201 0x00000000 0x0 0x10000000            /* Config space access */
 276                                0x00000200 0x00000000 0x0 0x00001000>;   /* UTL Registers space access */
 277                         dcr-reg = <0x100 0x20>;
 278
 279 //                                pci_space  < pci_addr          > < cpu_addr          > < size       >
 280                         ranges = <0x02000000 0x00000000 0x80000000 0x00000210 0x80000000 0x0 0x80000000
 281                                   0x01000000 0x0        0x0        0x00000240 0x0        0x0 0x00010000>;
 282
 283                         /* Inbound starting at 0 to memsize filled in by zImage */
 284                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
 285
 286                         /* This drives busses 0 to 0xf */
 287                         bus-range = <0x0 0xf>;
 288
 289                         /* Legacy interrupts (note the weird polarity, the bridge seems
 290                          * to invert PCIe legacy interrupts).
 291                          * We are de-swizzling here because the numbers are actually for
 292                          * port of the root complex virtual P2P bridge. But I want
 293                          * to avoid putting a node for it in the tree, so the numbers
 294                          * below are basically de-swizzled numbers.
 295                          * The real slot is on idsel 0, so the swizzling is 1:1
 296                          */
 297                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 298                         interrupt-map = <
 299                                 0x0 0x0 0x0 0x1 &MPIC 53 0x2 /* int A */
 300                                 0x0 0x0 0x0 0x2 &MPIC 54 0x2 /* int B */
 301                                 0x0 0x0 0x0 0x3 &MPIC 55 0x2 /* int C */
 302                                 0x0 0x0 0x0 0x4 &MPIC 56 0x2 /* int D */>;
 303                 };
 304
 305                 PCIE2: pciex@18100000000 {
 306                         device_type = "pci";
 307                         #interrupt-cells = <1>;
 308                         #size-cells = <2>;
 309                         #address-cells = <3>;
 310                         compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
 311                         primary;
 312                         port = <0x2>; /* port number */
 313                         reg = <0x00000181 0x00000000 0x0 0x10000000            /* Config space access */
 314                                0x00000180 0x00000000 0x0 0x00001000>;   /* UTL Registers space access */
 315                         dcr-reg = <0xe0 0x20>;
 316
 317 //                                pci_space  < pci_addr          > < cpu_addr          > < size       >
 318                         ranges = <0x02000000 0x00000000 0x80000000 0x00000190 0x80000000 0x0 0x80000000
 319                                   0x01000000 0x0        0x0        0x000001c0 0x0        0x0 0x00010000>;
 320
 321                         /* Inbound starting at 0 to memsize filled in by zImage */
 322                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
 323
 324                         /* This drives busses 0 to 0xf */
 325                         bus-range = <0x0 0xf>;
 326
 327                         /* Legacy interrupts (note the weird polarity, the bridge seems
 328                          * to invert PCIe legacy interrupts).
 329                          * We are de-swizzling here because the numbers are actually for
 330                          * port of the root complex virtual P2P bridge. But I want
 331                          * to avoid putting a node for it in the tree, so the numbers
 332                          * below are basically de-swizzled numbers.
 333                          * The real slot is on idsel 0, so the swizzling is 1:1
 334                          */
 335                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 336                         interrupt-map = <
 337                                 0x0 0x0 0x0 0x1 &MPIC 61 0x2 /* int A */
 338                                 0x0 0x0 0x0 0x2 &MPIC 62 0x2 /* int B */
 339                                 0x0 0x0 0x0 0x3 &MPIC 63 0x2 /* int C */
 340                                 0x0 0x0 0x0 0x4 &MPIC 64 0x2 /* int D */>;
 341                 };
 342
 343                 PCIE3: pciex@28100000000 {
 344                         device_type = "pci";
 345                         #interrupt-cells = <1>;
 346                         #size-cells = <2>;
 347                         #address-cells = <3>;
 348                         compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
 349                         primary;
 350                         port = <0x3>; /* port number */
 351                         reg = <0x00000281 0x00000000 0x0 0x10000000            /* Config space access */
 352                                0x00000280 0x00000000 0x0 0x00001000>;   /* UTL Registers space access */
 353                         dcr-reg = <0x120 0x20>;
 354
 355 //                                pci_space  < pci_addr          > < cpu_addr          > < size       >
 356                         ranges = <0x02000000 0x00000000 0x80000000 0x00000290 0x80000000 0x0 0x80000000
 357                                   0x01000000 0x0        0x0        0x000002c0 0x0        0x0 0x00010000>;
 358
 359                         /* Inbound starting at 0 to memsize filled in by zImage */
 360                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
 361
 362                         /* This drives busses 0 to 0xf */
 363                         bus-range = <0x0 0xf>;
 364
 365                         /* Legacy interrupts (note the weird polarity, the bridge seems
 366                          * to invert PCIe legacy interrupts).
 367                          * We are de-swizzling here because the numbers are actually for
 368                          * port of the root complex virtual P2P bridge. But I want
 369                          * to avoid putting a node for it in the tree, so the numbers
 370                          * below are basically de-swizzled numbers.
 371                          * The real slot is on idsel 0, so the swizzling is 1:1
 372                          */
 373                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 374                         interrupt-map = <
 375                                 0x0 0x0 0x0 0x1 &MPIC 69 0x2 /* int A */
 376                                 0x0 0x0 0x0 0x2 &MPIC 70 0x2 /* int B */
 377                                 0x0 0x0 0x0 0x3 &MPIC 71 0x2 /* int C */
 378                                 0x0 0x0 0x0 0x4 &MPIC 72 0x2 /* int D */>;
 379                 };
 380         };
 381
 382         chosen {
 383                 linux,stdout-path = &UART0;
 384         };
 385 };