arch/powerpc/boot/dts/bluestone.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Device Tree for Bluestone (APM821xx) board.
   4  *
   5  * Copyright (c) 2010, Applied Micro Circuits Corporation
   6  * Author: Tirumala R Marri <tmarri@apm.com>
   7  */
   8
   9 /dts-v1/;
  10
  11 / {
  12         #address-cells = <2>;
  13         #size-cells = <1>;
  14         model = "apm,bluestone";
  15         compatible = "apm,bluestone";
  16         dcr-parent = <&{/cpus/cpu@0}>;
  17
  18         aliases {
  19                 ethernet0 = &EMAC0;
  20                 serial0 = &UART0;
  21                 serial1 = &UART1;
  22         };
  23
  24         cpus {
  25                 #address-cells = <1>;
  26                 #size-cells = <0>;
  27
  28                 cpu@0 {
  29                         device_type = "cpu";
  30                         model = "PowerPC,apm821xx";
  31                         reg = <0x00000000>;
  32                         clock-frequency = <0>; /* Filled in by U-Boot */
  33                         timebase-frequency = <0>; /* Filled in by U-Boot */
  34                         i-cache-line-size = <32>;
  35                         d-cache-line-size = <32>;
  36                         i-cache-size = <32768>;
  37                         d-cache-size = <32768>;
  38                         dcr-controller;
  39                         dcr-access-method = "native";
  40                         next-level-cache = <&L2C0>;
  41                 };
  42         };
  43
  44         memory {
  45                 device_type = "memory";
  46                 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
  47         };
  48
  49         UIC0: interrupt-controller0 {
  50                 compatible = "ibm,uic";
  51                 interrupt-controller;
  52                 cell-index = <0>;
  53                 dcr-reg = <0x0c0 0x009>;
  54                 #address-cells = <0>;
  55                 #size-cells = <0>;
  56                 #interrupt-cells = <2>;
  57         };
  58
  59         UIC1: interrupt-controller1 {
  60                 compatible = "ibm,uic";
  61                 interrupt-controller;
  62                 cell-index = <1>;
  63                 dcr-reg = <0x0d0 0x009>;
  64                 #address-cells = <0>;
  65                 #size-cells = <0>;
  66                 #interrupt-cells = <2>;
  67                 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  68                 interrupt-parent = <&UIC0>;
  69         };
  70
  71         UIC2: interrupt-controller2 {
  72                 compatible = "ibm,uic";
  73                 interrupt-controller;
  74                 cell-index = <2>;
  75                 dcr-reg = <0x0e0 0x009>;
  76                 #address-cells = <0>;
  77                 #size-cells = <0>;
  78                 #interrupt-cells = <2>;
  79                 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
  80                 interrupt-parent = <&UIC0>;
  81         };
  82
  83         UIC3: interrupt-controller3 {
  84                 compatible = "ibm,uic";
  85                 interrupt-controller;
  86                 cell-index = <3>;
  87                 dcr-reg = <0x0f0 0x009>;
  88                 #address-cells = <0>;
  89                 #size-cells = <0>;
  90                 #interrupt-cells = <2>;
  91                 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
  92                 interrupt-parent = <&UIC0>;
  93         };
  94
  95         OCM: ocm@400040000 {
  96                 compatible = "ibm,ocm";
  97                 status = "okay";
  98                 cell-index = <1>;
  99                 /* configured in U-Boot */
 100                 reg = <4 0x00040000 0x8000>; /* 32K */
 101         };
 102
 103         SDR0: sdr {
 104                 compatible = "ibm,sdr-apm821xx";
 105                 dcr-reg = <0x00e 0x002>;
 106         };
 107
 108         CPR0: cpr {
 109                 compatible = "ibm,cpr-apm821xx";
 110                 dcr-reg = <0x00c 0x002>;
 111         };
 112
 113         L2C0: l2c {
 114                 compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
 115                 dcr-reg = <0x020 0x008
 116                            0x030 0x008>;
 117                 cache-line-size = <32>;
 118                 cache-size = <262144>;
 119                 interrupt-parent = <&UIC1>;
 120                 interrupts = <11 1>;
 121         };
 122
 123         plb {
 124                 compatible = "ibm,plb4";
 125                 #address-cells = <2>;
 126                 #size-cells = <1>;
 127                 ranges;
 128                 clock-frequency = <0>; /* Filled in by U-Boot */
 129
 130                 SDRAM0: sdram {
 131                         compatible = "ibm,sdram-apm821xx";
 132                         dcr-reg = <0x010 0x002>;
 133                 };
 134
 135                 MAL0: mcmal {
 136                         compatible = "ibm,mcmal2";
 137                         descriptor-memory = "ocm";
 138                         dcr-reg = <0x180 0x062>;
 139                         num-tx-chans = <1>;
 140                         num-rx-chans = <1>;
 141                         #address-cells = <0>;
 142                         #size-cells = <0>;
 143                         interrupt-parent = <&UIC2>;
 144                         interrupts = <  /*TXEOB*/ 0x6 0x4
 145                                         /*RXEOB*/ 0x7 0x4
 146                                         /*SERR*/  0x3 0x4
 147                                         /*TXDE*/  0x4 0x4
 148                                         /*RXDE*/  0x5 0x4>;
 149                 };
 150
 151                 POB0: opb {
 152                         compatible = "ibm,opb";
 153                         #address-cells = <1>;
 154                         #size-cells = <1>;
 155                         ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
 156                         clock-frequency = <0>; /* Filled in by U-Boot */
 157
 158                         EBC0: ebc {
 159                                 compatible = "ibm,ebc";
 160                                 dcr-reg = <0x012 0x002>;
 161                                 #address-cells = <2>;
 162                                 #size-cells = <1>;
 163                                 clock-frequency = <0>; /* Filled in by U-Boot */
 164                                 /* ranges property is supplied by U-Boot */
 165                                 ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>;
 166                                 interrupts = <0x6 0x4>;
 167                                 interrupt-parent = <&UIC1>;
 168
 169                                 nor_flash@0,0 {
 170                                         compatible = "amd,s29gl512n", "cfi-flash";
 171                                         bank-width = <2>;
 172                                         reg = <0x00000000 0x00000000 0x00400000>;
 173                                         #address-cells = <1>;
 174                                         #size-cells = <1>;
 175                                         partition@0 {
 176                                                 label = "kernel";
 177                                                 reg = <0x00000000 0x00180000>;
 178                                         };
 179                                         partition@180000 {
 180                                                 label = "env";
 181                                                 reg = <0x00180000 0x00020000>;
 182                                         };
 183                                         partition@1a0000 {
 184                                                 label = "u-boot";
 185                                                 reg = <0x001a0000 0x00060000>;
 186                                         };
 187                                 };
 188
 189                                 ndfc@1,0 {
 190                                         compatible = "ibm,ndfc";
 191                                         reg = <0x00000003 0x00000000 0x00002000>;
 192                                         ccr = <0x00001000>;
 193                                         bank-settings = <0x80002222>;
 194                                         #address-cells = <1>;
 195                                         #size-cells = <1>;
 196                                         /* 2Gb Nand Flash */
 197                                         nand {
 198                                                 #address-cells = <1>;
 199                                                 #size-cells = <1>;
 200
 201                                                 partition@0 {
 202                                                         label = "firmware";
 203                                                         reg   = <0x00000000 0x00C00000>;
 204                                                 };
 205                                                 partition@c00000 {
 206                                                         label = "environment";
 207                                                         reg   = <0x00C00000 0x00B00000>;
 208                                                 };
 209                                                 partition@1700000 {
 210                                                         label = "kernel";
 211                                                         reg   = <0x01700000 0x00E00000>;
 212                                                 };
 213                                                 partition@2500000 {
 214                                                         label = "root";
 215                                                         reg   = <0x02500000 0x08200000>;
 216                                                 };
 217                                                 partition@a700000 {
 218                                                         label = "device-tree";
 219                                                         reg   = <0x0A700000 0x00B00000>;
 220                                                 };
 221                                                 partition@b200000 {
 222                                                         label = "config";
 223                                                         reg   = <0x0B200000 0x00D00000>;
 224                                                 };
 225                                                 partition@bf00000 {
 226                                                         label = "diag";
 227                                                         reg   = <0x0BF00000 0x00C00000>;
 228                                                 };
 229                                                 partition@cb00000 {
 230                                                         label = "vendor";
 231                                                         reg   = <0x0CB00000 0x3500000>;
 232                                                 };
 233                                         };
 234                                 };
 235                         };
 236
 237                         UART0: serial@ef600300 {
 238                                 device_type = "serial";
 239                                 compatible = "ns16550";
 240                                 reg = <0xef600300 0x00000008>;
 241                                 virtual-reg = <0xef600300>;
 242                                 clock-frequency = <0>; /* Filled in by U-Boot */
 243                                 current-speed = <0>; /* Filled in by U-Boot */
 244                                 interrupt-parent = <&UIC1>;
 245                                 interrupts = <0x1 0x4>;
 246                         };
 247
 248                         UART1: serial@ef600400 {
 249                                 device_type = "serial";
 250                                 compatible = "ns16550";
 251                                 reg = <0xef600400 0x00000008>;
 252                                 virtual-reg = <0xef600400>;
 253                                 clock-frequency = <0>; /* Filled in by U-Boot */
 254                                 current-speed = <0>; /* Filled in by U-Boot */
 255                                 interrupt-parent = <&UIC0>;
 256                                 interrupts = <0x1 0x4>;
 257                         };
 258
 259                         IIC0: i2c@ef600700 {
 260                                 compatible = "ibm,iic";
 261                                 reg = <0xef600700 0x00000014>;
 262                                 interrupt-parent = <&UIC0>;
 263                                 interrupts = <0x2 0x4>;
 264                                 #address-cells = <1>;
 265                                 #size-cells = <0>;
 266                                 rtc@68 {
 267                                         compatible = "st,m41t80";
 268                                         reg = <0x68>;
 269                                         interrupt-parent = <&UIC0>;
 270                                         interrupts = <0x9 0x8>;
 271                                 };
 272                                 sttm@4C {
 273                                         compatible = "adm,adm1032";
 274                                         reg = <0x4C>;
 275                                         interrupt-parent = <&UIC1>;
 276                                         interrupts = <0x1E 0x8>; /* CPU_THERNAL_L */
 277                                 };
 278                         };
 279
 280                         IIC1: i2c@ef600800 {
 281                                 compatible = "ibm,iic";
 282                                 reg = <0xef600800 0x00000014>;
 283                                 interrupt-parent = <&UIC0>;
 284                                 interrupts = <0x3 0x4>;
 285                         };
 286
 287                         RGMII0: emac-rgmii@ef601500 {
 288                                 compatible = "ibm,rgmii";
 289                                 reg = <0xef601500 0x00000008>;
 290                                 has-mdio;
 291                         };
 292
 293                         TAH0: emac-tah@ef601350 {
 294                                 compatible = "ibm,tah";
 295                                 reg = <0xef601350 0x00000030>;
 296                         };
 297
 298                         EMAC0: ethernet@ef600c00 {
 299                                 device_type = "network";
 300                                 compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
 301                                 interrupt-parent = <&EMAC0>;
 302                                 interrupts = <0x0 0x1>;
 303                                 #interrupt-cells = <1>;
 304                                 #address-cells = <0>;
 305                                 #size-cells = <0>;
 306                                 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
 307                                                  /*Wake*/   0x1 &UIC2 0x14 0x4>;
 308                                 reg = <0xef600c00 0x000000c4>;
 309                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 310                                 mal-device = <&MAL0>;
 311                                 mal-tx-channel = <0>;
 312                                 mal-rx-channel = <0>;
 313                                 cell-index = <0>;
 314                                 max-frame-size = <9000>;
 315                                 rx-fifo-size = <16384>;
 316                                 tx-fifo-size = <2048>;
 317                                 phy-mode = "rgmii";
 318                                 phy-map = <0x00000000>;
 319                                 rgmii-device = <&RGMII0>;
 320                                 rgmii-channel = <0>;
 321                                 tah-device = <&TAH0>;
 322                                 tah-channel = <0>;
 323                                 has-inverted-stacr-oc;
 324                                 has-new-stacr-staopc;
 325                         };
 326                 };
 327
 328                 PCIE0: pciex@d00000000 {
 329                         device_type = "pci";
 330                         #interrupt-cells = <1>;
 331                         #size-cells = <2>;
 332                         #address-cells = <3>;
 333                         compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
 334                         primary;
 335                         port = <0x0>; /* port number */
 336                         reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
 337                                0x0000000c 0x08010000 0x00001000>;       /* Registers */
 338                         dcr-reg = <0x100 0x020>;
 339                         sdr-base = <0x300>;
 340
 341                         /* Outbound ranges, one memory and one IO,
 342                          * later cannot be changed
 343                          */
 344                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
 345                                   0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
 346                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
 347
 348                         /* Inbound 2GB range starting at 0 */
 349                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 350
 351                         /* This drives busses 40 to 0x7f */
 352                         bus-range = <0x40 0x7f>;
 353
 354                         /* Legacy interrupts (note the weird polarity, the bridge seems
 355                          * to invert PCIe legacy interrupts).
 356                          * We are de-swizzling here because the numbers are actually for
 357                          * port of the root complex virtual P2P bridge. But I want
 358                          * to avoid putting a node for it in the tree, so the numbers
 359                          * below are basically de-swizzled numbers.
 360                          * The real slot is on idsel 0, so the swizzling is 1:1
 361                          */
 362                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 363                         interrupt-map = <
 364                                 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
 365                                 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
 366                                 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
 367                                 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
 368                 };
 369
 370                 MSI: ppc4xx-msi@C10000000 {
 371                         compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
 372                         reg = < 0xC 0x10000000 0x100
 373                                 0xC 0x10000000 0x100>;
 374                         sdr-base = <0x36C>;
 375                         msi-data = <0x00004440>;
 376                         msi-mask = <0x0000ffe0>;
 377                         interrupts =<0 1 2 3 4 5 6 7>;
 378                         interrupt-parent = <&MSI>;
 379                         #interrupt-cells = <1>;
 380                         #address-cells = <0>;
 381                         #size-cells = <0>;
 382                         msi-available-ranges = <0x0 0x100>;
 383                         interrupt-map = <
 384                                 0 &UIC3 0x18 1
 385                                 1 &UIC3 0x19 1
 386                                 2 &UIC3 0x1A 1
 387                                 3 &UIC3 0x1B 1
 388                                 4 &UIC3 0x1C 1
 389                                 5 &UIC3 0x1D 1
 390                                 6 &UIC3 0x1E 1
 391                                 7 &UIC3 0x1F 1
 392                         >;
 393                 };
 394         };
 395 };