arch/powerpc/boot/dts/fsl/mpc8560ads.dts

   1 /*
   2  * MPC8560 ADS Device Tree Source
   3  *
   4  * Copyright 2006, 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 /include/ "e500v2_power_isa.dtsi"
  15
  16 / {
  17         model = "MPC8560ADS";
  18         compatible = "MPC8560ADS", "MPC85xxADS";
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21
  22         aliases {
  23                 ethernet0 = &enet0;
  24                 ethernet1 = &enet1;
  25                 ethernet2 = &enet2;
  26                 ethernet3 = &enet3;
  27                 serial0 = &serial0;
  28                 serial1 = &serial1;
  29                 pci0 = &pci0;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 PowerPC,8560@0 {
  37                         device_type = "cpu";
  38                         reg = <0x0>;
  39                         d-cache-line-size = <32>;       // 32 bytes
  40                         i-cache-line-size = <32>;       // 32 bytes
  41                         d-cache-size = <0x8000>;                // L1, 32K
  42                         i-cache-size = <0x8000>;                // L1, 32K
  43                         timebase-frequency = <82500000>;
  44                         bus-frequency = <330000000>;
  45                         clock-frequency = <825000000>;
  46                 };
  47         };
  48
  49         memory {
  50                 device_type = "memory";
  51                 reg = <0x0 0x10000000>;
  52         };
  53
  54         soc8560@e0000000 {
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57                 device_type = "soc";
  58                 compatible = "simple-bus";
  59                 ranges = <0x0 0xe0000000 0x100000>;
  60                 bus-frequency = <330000000>;
  61
  62                 ecm-law@0 {
  63                         compatible = "fsl,ecm-law";
  64                         reg = <0x0 0x1000>;
  65                         fsl,num-laws = <8>;
  66                 };
  67
  68                 ecm@1000 {
  69                         compatible = "fsl,mpc8560-ecm", "fsl,ecm";
  70                         reg = <0x1000 0x1000>;
  71                         interrupts = <17 2>;
  72                         interrupt-parent = <&mpic>;
  73                 };
  74
  75                 memory-controller@2000 {
  76                         compatible = "fsl,mpc8540-memory-controller";
  77                         reg = <0x2000 0x1000>;
  78                         interrupt-parent = <&mpic>;
  79                         interrupts = <18 2>;
  80                 };
  81
  82                 L2: l2-cache-controller@20000 {
  83                         compatible = "fsl,mpc8540-l2-cache-controller";
  84                         reg = <0x20000 0x1000>;
  85                         cache-line-size = <32>; // 32 bytes
  86                         cache-size = <0x40000>; // L2, 256K
  87                         interrupt-parent = <&mpic>;
  88                         interrupts = <16 2>;
  89                 };
  90
  91                 dma@21300 {
  92                         #address-cells = <1>;
  93                         #size-cells = <1>;
  94                         compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
  95                         reg = <0x21300 0x4>;
  96                         ranges = <0x0 0x21100 0x200>;
  97                         cell-index = <0>;
  98                         dma-channel@0 {
  99                                 compatible = "fsl,mpc8560-dma-channel",
 100                                                 "fsl,eloplus-dma-channel";
 101                                 reg = <0x0 0x80>;
 102                                 cell-index = <0>;
 103                                 interrupt-parent = <&mpic>;
 104                                 interrupts = <20 2>;
 105                         };
 106                         dma-channel@80 {
 107                                 compatible = "fsl,mpc8560-dma-channel",
 108                                                 "fsl,eloplus-dma-channel";
 109                                 reg = <0x80 0x80>;
 110                                 cell-index = <1>;
 111                                 interrupt-parent = <&mpic>;
 112                                 interrupts = <21 2>;
 113                         };
 114                         dma-channel@100 {
 115                                 compatible = "fsl,mpc8560-dma-channel",
 116                                                 "fsl,eloplus-dma-channel";
 117                                 reg = <0x100 0x80>;
 118                                 cell-index = <2>;
 119                                 interrupt-parent = <&mpic>;
 120                                 interrupts = <22 2>;
 121                         };
 122                         dma-channel@180 {
 123                                 compatible = "fsl,mpc8560-dma-channel",
 124                                                 "fsl,eloplus-dma-channel";
 125                                 reg = <0x180 0x80>;
 126                                 cell-index = <3>;
 127                                 interrupt-parent = <&mpic>;
 128                                 interrupts = <23 2>;
 129                         };
 130                 };
 131
 132                 enet0: ethernet@24000 {
 133                         #address-cells = <1>;
 134                         #size-cells = <1>;
 135                         cell-index = <0>;
 136                         device_type = "network";
 137                         model = "TSEC";
 138                         compatible = "gianfar";
 139                         reg = <0x24000 0x1000>;
 140                         ranges = <0x0 0x24000 0x1000>;
 141                         local-mac-address = [ 00 00 00 00 00 00 ];
 142                         interrupts = <29 2 30 2 34 2>;
 143                         interrupt-parent = <&mpic>;
 144                         tbi-handle = <&tbi0>;
 145                         phy-handle = <&phy0>;
 146
 147                         mdio@520 {
 148                                 #address-cells = <1>;
 149                                 #size-cells = <0>;
 150                                 compatible = "fsl,gianfar-mdio";
 151                                 reg = <0x520 0x20>;
 152
 153                                 phy0: ethernet-phy@0 {
 154                                         interrupt-parent = <&mpic>;
 155                                         interrupts = <5 1>;
 156                                         reg = <0x0>;
 157                                 };
 158                                 phy1: ethernet-phy@1 {
 159                                         interrupt-parent = <&mpic>;
 160                                         interrupts = <5 1>;
 161                                         reg = <0x1>;
 162                                 };
 163                                 phy2: ethernet-phy@2 {
 164                                         interrupt-parent = <&mpic>;
 165                                         interrupts = <7 1>;
 166                                         reg = <0x2>;
 167                                 };
 168                                 phy3: ethernet-phy@3 {
 169                                         interrupt-parent = <&mpic>;
 170                                         interrupts = <7 1>;
 171                                         reg = <0x3>;
 172                                 };
 173                                 tbi0: tbi-phy@11 {
 174                                         reg = <0x11>;
 175                                         device_type = "tbi-phy";
 176                                 };
 177                         };
 178                 };
 179
 180                 enet1: ethernet@25000 {
 181                         #address-cells = <1>;
 182                         #size-cells = <1>;
 183                         cell-index = <1>;
 184                         device_type = "network";
 185                         model = "TSEC";
 186                         compatible = "gianfar";
 187                         reg = <0x25000 0x1000>;
 188                         ranges = <0x0 0x25000 0x1000>;
 189                         local-mac-address = [ 00 00 00 00 00 00 ];
 190                         interrupts = <35 2 36 2 40 2>;
 191                         interrupt-parent = <&mpic>;
 192                         tbi-handle = <&tbi1>;
 193                         phy-handle = <&phy1>;
 194
 195                         mdio@520 {
 196                                 #address-cells = <1>;
 197                                 #size-cells = <0>;
 198                                 compatible = "fsl,gianfar-tbi";
 199                                 reg = <0x520 0x20>;
 200
 201                                 tbi1: tbi-phy@11 {
 202                                         reg = <0x11>;
 203                                         device_type = "tbi-phy";
 204                                 };
 205                         };
 206                 };
 207
 208                 mpic: pic@40000 {
 209                         interrupt-controller;
 210                         #address-cells = <0>;
 211                         #interrupt-cells = <2>;
 212                         reg = <0x40000 0x40000>;
 213                         compatible = "chrp,open-pic";
 214                         device_type = "open-pic";
 215                 };
 216
 217                 cpm@919c0 {
 218                         #address-cells = <1>;
 219                         #size-cells = <1>;
 220                         compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
 221                         reg = <0x919c0 0x30>;
 222                         ranges;
 223
 224                         muram@80000 {
 225                                 #address-cells = <1>;
 226                                 #size-cells = <1>;
 227                                 ranges = <0x0 0x80000 0x10000>;
 228
 229                                 data@0 {
 230                                         compatible = "fsl,cpm-muram-data";
 231                                         reg = <0x0 0x4000 0x9000 0x2000>;
 232                                 };
 233                         };
 234
 235                         brg@919f0 {
 236                                 compatible = "fsl,mpc8560-brg",
 237                                              "fsl,cpm2-brg",
 238                                              "fsl,cpm-brg";
 239                                 reg = <0x919f0 0x10 0x915f0 0x10>;
 240                                 clock-frequency = <165000000>;
 241                         };
 242
 243                         cpmpic: pic@90c00 {
 244                                 interrupt-controller;
 245                                 #address-cells = <0>;
 246                                 #interrupt-cells = <2>;
 247                                 interrupts = <46 2>;
 248                                 interrupt-parent = <&mpic>;
 249                                 reg = <0x90c00 0x80>;
 250                                 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
 251                         };
 252
 253                         serial0: serial@91a00 {
 254                                 device_type = "serial";
 255                                 compatible = "fsl,mpc8560-scc-uart",
 256                                              "fsl,cpm2-scc-uart";
 257                                 reg = <0x91a00 0x20 0x88000 0x100>;
 258                                 fsl,cpm-brg = <1>;
 259                                 fsl,cpm-command = <0x800000>;
 260                                 current-speed = <115200>;
 261                                 interrupts = <40 8>;
 262                                 interrupt-parent = <&cpmpic>;
 263                         };
 264
 265                         serial1: serial@91a20 {
 266                                 device_type = "serial";
 267                                 compatible = "fsl,mpc8560-scc-uart",
 268                                              "fsl,cpm2-scc-uart";
 269                                 reg = <0x91a20 0x20 0x88100 0x100>;
 270                                 fsl,cpm-brg = <2>;
 271                                 fsl,cpm-command = <0x4a00000>;
 272                                 current-speed = <115200>;
 273                                 interrupts = <41 8>;
 274                                 interrupt-parent = <&cpmpic>;
 275                         };
 276
 277                         enet2: ethernet@91320 {
 278                                 device_type = "network";
 279                                 compatible = "fsl,mpc8560-fcc-enet",
 280                                              "fsl,cpm2-fcc-enet";
 281                                 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
 282                                 local-mac-address = [ 00 00 00 00 00 00 ];
 283                                 fsl,cpm-command = <0x16200300>;
 284                                 interrupts = <33 8>;
 285                                 interrupt-parent = <&cpmpic>;
 286                                 phy-handle = <&phy2>;
 287                         };
 288
 289                         enet3: ethernet@91340 {
 290                                 device_type = "network";
 291                                 compatible = "fsl,mpc8560-fcc-enet",
 292                                              "fsl,cpm2-fcc-enet";
 293                                 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
 294                                 local-mac-address = [ 00 00 00 00 00 00 ];
 295                                 fsl,cpm-command = <0x1a400300>;
 296                                 interrupts = <34 8>;
 297                                 interrupt-parent = <&cpmpic>;
 298                                 phy-handle = <&phy3>;
 299                         };
 300                 };
 301         };
 302
 303         pci0: pci@e0008000 {
 304                 #interrupt-cells = <1>;
 305                 #size-cells = <2>;
 306                 #address-cells = <3>;
 307                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 308                 device_type = "pci";
 309                 reg = <0xe0008000 0x1000>;
 310                 clock-frequency = <66666666>;
 311                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 312                 interrupt-map = <
 313
 314                                 /* IDSEL 0x2 */
 315                                  0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
 316                                  0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
 317                                  0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
 318                                  0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
 319
 320                                 /* IDSEL 0x3 */
 321                                  0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
 322                                  0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
 323                                  0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
 324                                  0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
 325
 326                                 /* IDSEL 0x4 */
 327                                  0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
 328                                  0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
 329                                  0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
 330                                  0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
 331
 332                                 /* IDSEL 0x5  */
 333                                  0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
 334                                  0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
 335                                  0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
 336                                  0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
 337
 338                                 /* IDSEL 12 */
 339                                  0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
 340                                  0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
 341                                  0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
 342                                  0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
 343
 344                                 /* IDSEL 13 */
 345                                  0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
 346                                  0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
 347                                  0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
 348                                  0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
 349
 350                                 /* IDSEL 14*/
 351                                  0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
 352                                  0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
 353                                  0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
 354                                  0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
 355
 356                                 /* IDSEL 15 */
 357                                  0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
 358                                  0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
 359                                  0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
 360                                  0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
 361
 362                                 /* IDSEL 18 */
 363                                  0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
 364                                  0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
 365                                  0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
 366                                  0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
 367
 368                                 /* IDSEL 19 */
 369                                  0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
 370                                  0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
 371                                  0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
 372                                  0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
 373
 374                                 /* IDSEL 20 */
 375                                  0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
 376                                  0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
 377                                  0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
 378                                  0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
 379
 380                                 /* IDSEL 21 */
 381                                  0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
 382                                  0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
 383                                  0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
 384                                  0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
 385
 386                 interrupt-parent = <&mpic>;
 387                 interrupts = <24 2>;
 388                 bus-range = <0 0>;
 389                 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 390                           0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
 391         };
 392 };