arch/powerpc/boot/dts/mpc8349emitxgp.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * MPC8349E-mITX-GP Device Tree Source
   4  *
   5  * Copyright 2007 Freescale Semiconductor Inc.
   6  */
   7
   8 /dts-v1/;
   9
  10 / {
  11         model = "MPC8349EMITXGP";
  12         compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15
  16         aliases {
  17                 ethernet0 = &enet0;
  18                 serial0 = &serial0;
  19                 serial1 = &serial1;
  20                 pci0 = &pci0;
  21         };
  22
  23         cpus {
  24                 #address-cells = <1>;
  25                 #size-cells = <0>;
  26
  27                 PowerPC,8349@0 {
  28                         device_type = "cpu";
  29                         reg = <0x0>;
  30                         d-cache-line-size = <32>;
  31                         i-cache-line-size = <32>;
  32                         d-cache-size = <32768>;
  33                         i-cache-size = <32768>;
  34                         timebase-frequency = <0>;       // from bootloader
  35                         bus-frequency = <0>;            // from bootloader
  36                         clock-frequency = <0>;          // from bootloader
  37                 };
  38         };
  39
  40         memory {
  41                 device_type = "memory";
  42                 reg = <0x00000000 0x10000000>;
  43         };
  44
  45         soc8349@e0000000 {
  46                 #address-cells = <1>;
  47                 #size-cells = <1>;
  48                 device_type = "soc";
  49                 compatible = "simple-bus";
  50                 ranges = <0x0 0xe0000000 0x00100000>;
  51                 reg = <0xe0000000 0x00000200>;
  52                 bus-frequency = <0>;                    // from bootloader
  53
  54                 wdt@200 {
  55                         device_type = "watchdog";
  56                         compatible = "mpc83xx_wdt";
  57                         reg = <0x200 0x100>;
  58                 };
  59
  60                 i2c@3000 {
  61                         #address-cells = <1>;
  62                         #size-cells = <0>;
  63                         cell-index = <0>;
  64                         compatible = "fsl-i2c";
  65                         reg = <0x3000 0x100>;
  66                         interrupts = <14 0x8>;
  67                         interrupt-parent = <&ipic>;
  68                         dfsrr;
  69                 };
  70
  71                 i2c@3100 {
  72                         #address-cells = <1>;
  73                         #size-cells = <0>;
  74                         cell-index = <1>;
  75                         compatible = "fsl-i2c";
  76                         reg = <0x3100 0x100>;
  77                         interrupts = <15 0x8>;
  78                         interrupt-parent = <&ipic>;
  79                         dfsrr;
  80
  81                         rtc@68 {
  82                                 compatible = "dallas,ds1339";
  83                                 reg = <0x68>;
  84                                 interrupts = <18 0x8>;
  85                                 interrupt-parent = <&ipic>;
  86                         };
  87                 };
  88
  89                 spi@7000 {
  90                         cell-index = <0>;
  91                         compatible = "fsl,spi";
  92                         reg = <0x7000 0x1000>;
  93                         interrupts = <16 0x8>;
  94                         interrupt-parent = <&ipic>;
  95                         mode = "cpu";
  96                 };
  97
  98                 dma@82a8 {
  99                         #address-cells = <1>;
 100                         #size-cells = <1>;
 101                         compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
 102                         reg = <0x82a8 4>;
 103                         ranges = <0 0x8100 0x1a8>;
 104                         interrupt-parent = <&ipic>;
 105                         interrupts = <71 8>;
 106                         cell-index = <0>;
 107                         dma-channel@0 {
 108                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 109                                 reg = <0 0x80>;
 110                                 cell-index = <0>;
 111                                 interrupt-parent = <&ipic>;
 112                                 interrupts = <71 8>;
 113                         };
 114                         dma-channel@80 {
 115                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 116                                 reg = <0x80 0x80>;
 117                                 cell-index = <1>;
 118                                 interrupt-parent = <&ipic>;
 119                                 interrupts = <71 8>;
 120                         };
 121                         dma-channel@100 {
 122                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 123                                 reg = <0x100 0x80>;
 124                                 cell-index = <2>;
 125                                 interrupt-parent = <&ipic>;
 126                                 interrupts = <71 8>;
 127                         };
 128                         dma-channel@180 {
 129                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 130                                 reg = <0x180 0x28>;
 131                                 cell-index = <3>;
 132                                 interrupt-parent = <&ipic>;
 133                                 interrupts = <71 8>;
 134                         };
 135                 };
 136
 137                 usb@23000 {
 138                         compatible = "fsl-usb2-dr";
 139                         reg = <0x23000 0x1000>;
 140                         #address-cells = <1>;
 141                         #size-cells = <0>;
 142                         interrupt-parent = <&ipic>;
 143                         interrupts = <38 0x8>;
 144                         dr_mode = "otg";
 145                         phy_type = "ulpi";
 146                 };
 147
 148                 enet0: ethernet@24000 {
 149                         #address-cells = <1>;
 150                         #size-cells = <1>;
 151                         cell-index = <0>;
 152                         device_type = "network";
 153                         model = "TSEC";
 154                         compatible = "gianfar";
 155                         reg = <0x24000 0x1000>;
 156                         ranges = <0x0 0x24000 0x1000>;
 157                         local-mac-address = [ 00 00 00 00 00 00 ];
 158                         interrupts = <32 0x8 33 0x8 34 0x8>;
 159                         interrupt-parent = <&ipic>;
 160                         tbi-handle = <&tbi0>;
 161                         phy-handle = <&phy1c>;
 162                         linux,network-index = <0>;
 163
 164                         mdio@520 {
 165                                 #address-cells = <1>;
 166                                 #size-cells = <0>;
 167                                 compatible = "fsl,gianfar-mdio";
 168                                 reg = <0x520 0x20>;
 169
 170                                 /* Vitesse 8201 */
 171                                 phy1c: ethernet-phy@1c {
 172                                         interrupt-parent = <&ipic>;
 173                                         interrupts = <18 0x8>;
 174                                         reg = <0x1c>;
 175                                 };
 176
 177                                 tbi0: tbi-phy@11 {
 178                                         reg = <0x11>;
 179                                         device_type = "tbi-phy";
 180                                 };
 181                         };
 182                 };
 183
 184                 serial0: serial@4500 {
 185                         cell-index = <0>;
 186                         device_type = "serial";
 187                         compatible = "fsl,ns16550", "ns16550";
 188                         reg = <0x4500 0x100>;
 189                         clock-frequency = <0>;          // from bootloader
 190                         interrupts = <9 0x8>;
 191                         interrupt-parent = <&ipic>;
 192                 };
 193
 194                 serial1: serial@4600 {
 195                         cell-index = <1>;
 196                         device_type = "serial";
 197                         compatible = "fsl,ns16550", "ns16550";
 198                         reg = <0x4600 0x100>;
 199                         clock-frequency = <0>;          // from bootloader
 200                         interrupts = <10 0x8>;
 201                         interrupt-parent = <&ipic>;
 202                 };
 203
 204                 crypto@30000 {
 205                         compatible = "fsl,sec2.0";
 206                         reg = <0x30000 0x10000>;
 207                         interrupts = <11 0x8>;
 208                         interrupt-parent = <&ipic>;
 209                         fsl,num-channels = <4>;
 210                         fsl,channel-fifo-len = <24>;
 211                         fsl,exec-units-mask = <0x7e>;
 212                         fsl,descriptor-types-mask = <0x01010ebf>;
 213                 };
 214
 215                 ipic: pic@700 {
 216                         interrupt-controller;
 217                         #address-cells = <0>;
 218                         #interrupt-cells = <2>;
 219                         reg = <0x700 0x100>;
 220                         device_type = "ipic";
 221                 };
 222         };
 223
 224         pci0: pci@e0008600 {
 225                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 226                 interrupt-map = <
 227                                 /* IDSEL 0x0F - PCI Slot */
 228                                 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
 229                                 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
 230                                  >;
 231                 interrupt-parent = <&ipic>;
 232                 interrupts = <67 0x8>;
 233                 bus-range = <0x1 0x1>;
 234                 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
 235                           0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
 236                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
 237                 clock-frequency = <66666666>;
 238                 #interrupt-cells = <1>;
 239                 #size-cells = <2>;
 240                 #address-cells = <3>;
 241                 reg = <0xe0008600 0x100         /* internal registers */
 242                        0xe0008380 0x8>;         /* config space access registers */
 243                 compatible = "fsl,mpc8349-pci";
 244                 device_type = "pci";
 245         };
 246 };