arch/powerpc/boot/dts/mpc8560ads.dts

   1 /*
   2  * MPC8560 ADS Device Tree Source
   3  *
   4  * Copyright 2006, 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "MPC8560ADS";
  16         compatible = "MPC8560ADS", "MPC85xxADS";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 ethernet2 = &enet2;
  24                 ethernet3 = &enet3;
  25                 serial0 = &serial0;
  26                 serial1 = &serial1;
  27                 pci0 = &pci0;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 PowerPC,8560@0 {
  35                         device_type = "cpu";
  36                         reg = <0x0>;
  37                         d-cache-line-size = <32>;       // 32 bytes
  38                         i-cache-line-size = <32>;       // 32 bytes
  39                         d-cache-size = <0x8000>;                // L1, 32K
  40                         i-cache-size = <0x8000>;                // L1, 32K
  41                         timebase-frequency = <82500000>;
  42                         bus-frequency = <330000000>;
  43                         clock-frequency = <825000000>;
  44                 };
  45         };
  46
  47         memory {
  48                 device_type = "memory";
  49                 reg = <0x0 0x10000000>;
  50         };
  51
  52         soc8560@e0000000 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 device_type = "soc";
  56                 ranges = <0x0 0xe0000000 0x100000>;
  57                 reg = <0xe0000000 0x200>;
  58                 bus-frequency = <330000000>;
  59
  60                 memory-controller@2000 {
  61                         compatible = "fsl,8540-memory-controller";
  62                         reg = <0x2000 0x1000>;
  63                         interrupt-parent = <&mpic>;
  64                         interrupts = <18 2>;
  65                 };
  66
  67                 L2: l2-cache-controller@20000 {
  68                         compatible = "fsl,8540-l2-cache-controller";
  69                         reg = <0x20000 0x1000>;
  70                         cache-line-size = <32>; // 32 bytes
  71                         cache-size = <0x40000>; // L2, 256K
  72                         interrupt-parent = <&mpic>;
  73                         interrupts = <16 2>;
  74                 };
  75
  76                 dma@21300 {
  77                         #address-cells = <1>;
  78                         #size-cells = <1>;
  79                         compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
  80                         reg = <0x21300 0x4>;
  81                         ranges = <0x0 0x21100 0x200>;
  82                         cell-index = <0>;
  83                         dma-channel@0 {
  84                                 compatible = "fsl,mpc8560-dma-channel",
  85                                                 "fsl,eloplus-dma-channel";
  86                                 reg = <0x0 0x80>;
  87                                 cell-index = <0>;
  88                                 interrupt-parent = <&mpic>;
  89                                 interrupts = <20 2>;
  90                         };
  91                         dma-channel@80 {
  92                                 compatible = "fsl,mpc8560-dma-channel",
  93                                                 "fsl,eloplus-dma-channel";
  94                                 reg = <0x80 0x80>;
  95                                 cell-index = <1>;
  96                                 interrupt-parent = <&mpic>;
  97                                 interrupts = <21 2>;
  98                         };
  99                         dma-channel@100 {
 100                                 compatible = "fsl,mpc8560-dma-channel",
 101                                                 "fsl,eloplus-dma-channel";
 102                                 reg = <0x100 0x80>;
 103                                 cell-index = <2>;
 104                                 interrupt-parent = <&mpic>;
 105                                 interrupts = <22 2>;
 106                         };
 107                         dma-channel@180 {
 108                                 compatible = "fsl,mpc8560-dma-channel",
 109                                                 "fsl,eloplus-dma-channel";
 110                                 reg = <0x180 0x80>;
 111                                 cell-index = <3>;
 112                                 interrupt-parent = <&mpic>;
 113                                 interrupts = <23 2>;
 114                         };
 115                 };
 116
 117                 mdio@24520 {
 118                         #address-cells = <1>;
 119                         #size-cells = <0>;
 120                         compatible = "fsl,gianfar-mdio";
 121                         reg = <0x24520 0x20>;
 122
 123                         phy0: ethernet-phy@0 {
 124                                 interrupt-parent = <&mpic>;
 125                                 interrupts = <5 1>;
 126                                 reg = <0x0>;
 127                                 device_type = "ethernet-phy";
 128                         };
 129                         phy1: ethernet-phy@1 {
 130                                 interrupt-parent = <&mpic>;
 131                                 interrupts = <5 1>;
 132                                 reg = <0x1>;
 133                                 device_type = "ethernet-phy";
 134                         };
 135                         phy2: ethernet-phy@2 {
 136                                 interrupt-parent = <&mpic>;
 137                                 interrupts = <7 1>;
 138                                 reg = <0x2>;
 139                                 device_type = "ethernet-phy";
 140                         };
 141                         phy3: ethernet-phy@3 {
 142                                 interrupt-parent = <&mpic>;
 143                                 interrupts = <7 1>;
 144                                 reg = <0x3>;
 145                                 device_type = "ethernet-phy";
 146                         };
 147                 };
 148
 149                 enet0: ethernet@24000 {
 150                         cell-index = <0>;
 151                         device_type = "network";
 152                         model = "TSEC";
 153                         compatible = "gianfar";
 154                         reg = <0x24000 0x1000>;
 155                         local-mac-address = [ 00 00 00 00 00 00 ];
 156                         interrupts = <29 2 30 2 34 2>;
 157                         interrupt-parent = <&mpic>;
 158                         phy-handle = <&phy0>;
 159                 };
 160
 161                 enet1: ethernet@25000 {
 162                         cell-index = <1>;
 163                         device_type = "network";
 164                         model = "TSEC";
 165                         compatible = "gianfar";
 166                         reg = <0x25000 0x1000>;
 167                         local-mac-address = [ 00 00 00 00 00 00 ];
 168                         interrupts = <35 2 36 2 40 2>;
 169                         interrupt-parent = <&mpic>;
 170                         phy-handle = <&phy1>;
 171                 };
 172
 173                 mpic: pic@40000 {
 174                         interrupt-controller;
 175                         #address-cells = <0>;
 176                         #interrupt-cells = <2>;
 177                         reg = <0x40000 0x40000>;
 178                         compatible = "chrp,open-pic";
 179                         device_type = "open-pic";
 180                 };
 181
 182                 cpm@919c0 {
 183                         #address-cells = <1>;
 184                         #size-cells = <1>;
 185                         compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
 186                         reg = <0x919c0 0x30>;
 187                         ranges;
 188
 189                         muram@80000 {
 190                                 #address-cells = <1>;
 191                                 #size-cells = <1>;
 192                                 ranges = <0x0 0x80000 0x10000>;
 193
 194                                 data@0 {
 195                                         compatible = "fsl,cpm-muram-data";
 196                                         reg = <0x0 0x4000 0x9000 0x2000>;
 197                                 };
 198                         };
 199
 200                         brg@919f0 {
 201                                 compatible = "fsl,mpc8560-brg",
 202                                              "fsl,cpm2-brg",
 203                                              "fsl,cpm-brg";
 204                                 reg = <0x919f0 0x10 0x915f0 0x10>;
 205                                 clock-frequency = <165000000>;
 206                         };
 207
 208                         cpmpic: pic@90c00 {
 209                                 interrupt-controller;
 210                                 #address-cells = <0>;
 211                                 #interrupt-cells = <2>;
 212                                 interrupts = <46 2>;
 213                                 interrupt-parent = <&mpic>;
 214                                 reg = <0x90c00 0x80>;
 215                                 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
 216                         };
 217
 218                         serial0: serial@91a00 {
 219                                 device_type = "serial";
 220                                 compatible = "fsl,mpc8560-scc-uart",
 221                                              "fsl,cpm2-scc-uart";
 222                                 reg = <0x91a00 0x20 0x88000 0x100>;
 223                                 fsl,cpm-brg = <1>;
 224                                 fsl,cpm-command = <0x800000>;
 225                                 current-speed = <115200>;
 226                                 interrupts = <40 8>;
 227                                 interrupt-parent = <&cpmpic>;
 228                         };
 229
 230                         serial1: serial@91a20 {
 231                                 device_type = "serial";
 232                                 compatible = "fsl,mpc8560-scc-uart",
 233                                              "fsl,cpm2-scc-uart";
 234                                 reg = <0x91a20 0x20 0x88100 0x100>;
 235                                 fsl,cpm-brg = <2>;
 236                                 fsl,cpm-command = <0x4a00000>;
 237                                 current-speed = <115200>;
 238                                 interrupts = <41 8>;
 239                                 interrupt-parent = <&cpmpic>;
 240                         };
 241
 242                         enet2: ethernet@91320 {
 243                                 device_type = "network";
 244                                 compatible = "fsl,mpc8560-fcc-enet",
 245                                              "fsl,cpm2-fcc-enet";
 246                                 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
 247                                 local-mac-address = [ 00 00 00 00 00 00 ];
 248                                 fsl,cpm-command = <0x16200300>;
 249                                 interrupts = <33 8>;
 250                                 interrupt-parent = <&cpmpic>;
 251                                 phy-handle = <&phy2>;
 252                         };
 253
 254                         enet3: ethernet@91340 {
 255                                 device_type = "network";
 256                                 compatible = "fsl,mpc8560-fcc-enet",
 257                                              "fsl,cpm2-fcc-enet";
 258                                 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
 259                                 local-mac-address = [ 00 00 00 00 00 00 ];
 260                                 fsl,cpm-command = <0x1a400300>;
 261                                 interrupts = <34 8>;
 262                                 interrupt-parent = <&cpmpic>;
 263                                 phy-handle = <&phy3>;
 264                         };
 265                 };
 266         };
 267
 268         pci0: pci@e0008000 {
 269                 cell-index = <0>;
 270                 #interrupt-cells = <1>;
 271                 #size-cells = <2>;
 272                 #address-cells = <3>;
 273                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 274                 device_type = "pci";
 275                 reg = <0xe0008000 0x1000>;
 276                 clock-frequency = <66666666>;
 277                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 278                 interrupt-map = <
 279
 280                                 /* IDSEL 0x2 */
 281                                  0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
 282                                  0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
 283                                  0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
 284                                  0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
 285
 286                                 /* IDSEL 0x3 */
 287                                  0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
 288                                  0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
 289                                  0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
 290                                  0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
 291
 292                                 /* IDSEL 0x4 */
 293                                  0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
 294                                  0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
 295                                  0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
 296                                  0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
 297
 298                                 /* IDSEL 0x5  */
 299                                  0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
 300                                  0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
 301                                  0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
 302                                  0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
 303
 304                                 /* IDSEL 12 */
 305                                  0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
 306                                  0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
 307                                  0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
 308                                  0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
 309
 310                                 /* IDSEL 13 */
 311                                  0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
 312                                  0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
 313                                  0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
 314                                  0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
 315
 316                                 /* IDSEL 14*/
 317                                  0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
 318                                  0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
 319                                  0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
 320                                  0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
 321
 322                                 /* IDSEL 15 */
 323                                  0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
 324                                  0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
 325                                  0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
 326                                  0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
 327
 328                                 /* IDSEL 18 */
 329                                  0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
 330                                  0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
 331                                  0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
 332                                  0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
 333
 334                                 /* IDSEL 19 */
 335                                  0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
 336                                  0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
 337                                  0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
 338                                  0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
 339
 340                                 /* IDSEL 20 */
 341                                  0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
 342                                  0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
 343                                  0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
 344                                  0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
 345
 346                                 /* IDSEL 21 */
 347                                  0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
 348                                  0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
 349                                  0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
 350                                  0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
 351
 352                 interrupt-parent = <&mpic>;
 353                 interrupts = <24 2>;
 354                 bus-range = <0 0>;
 355                 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 356                           0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
 357         };
 358 };