2 * P3041DS Device Tree Source
4 * Copyright 2010-2011 Freescale Semiconductor Inc.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 /include/ "fsl/p3041si-pre.dtsi"
38 model = "fsl,P3041DS";
39 compatible = "fsl,P3041DS";
42 interrupt-parent = <&mpic>;
45 device_type = "memory";
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>;
59 compatible = "spansion,s25sl12801";
61 spi-max-frequency = <35000000>; /* input clock */
64 reg = <0x00000000 0x00100000>;
69 reg = <0x00100000 0x00500000>;
74 reg = <0x00600000 0x00100000>;
78 label = "file system";
79 reg = <0x00700000 0x00900000>;
86 compatible = "at24,24c256";
90 compatible = "at24,24c256";
97 compatible = "dallas,ds3232";
99 interrupts = <0x1 0x1 0 0>;
102 compatible = "ti,ina220";
104 shunt-resistor = <1000>;
107 compatible = "ti,ina220";
109 shunt-resistor = <1000>;
112 compatible = "ti,ina220";
114 shunt-resistor = <1000>;
117 compatible = "ti,ina220";
119 shunt-resistor = <1000>;
122 compatible = "adi,adt7461";
128 rio: rapidio@ffe0c0000 {
129 reg = <0xf 0xfe0c0000 0 0x11000>;
132 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
135 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
139 lbc: localbus@ffe124000 {
140 reg = <0xf 0xfe124000 0 0x1000>;
141 ranges = <0 0 0xf 0xe8000000 0x08000000
142 2 0 0xf 0xffa00000 0x00040000
143 3 0 0xf 0xffdf0000 0x00008000>;
146 compatible = "cfi-flash";
147 reg = <0 0 0x08000000>;
153 #address-cells = <1>;
155 compatible = "fsl,elbc-fcm-nand";
156 reg = <0x2 0x0 0x40000>;
159 label = "NAND U-Boot Image";
160 reg = <0x0 0x02000000>;
165 label = "NAND Root File System";
166 reg = <0x02000000 0x10000000>;
170 label = "NAND Compressed RFS Image";
171 reg = <0x12000000 0x08000000>;
175 label = "NAND Linux Kernel Image";
176 reg = <0x1a000000 0x04000000>;
180 label = "NAND DTB Image";
181 reg = <0x1e000000 0x01000000>;
185 label = "NAND Writable User area";
186 reg = <0x1f000000 0x21000000>;
191 compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis";
196 pci0: pcie@ffe200000 {
197 reg = <0xf 0xfe200000 0 0x1000>;
198 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
199 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
201 ranges = <0x02000000 0 0xe0000000
202 0x02000000 0 0xe0000000
205 0x01000000 0 0x00000000
206 0x01000000 0 0x00000000
211 pci1: pcie@ffe201000 {
212 reg = <0xf 0xfe201000 0 0x1000>;
213 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
214 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
216 ranges = <0x02000000 0 0xe0000000
217 0x02000000 0 0xe0000000
220 0x01000000 0 0x00000000
221 0x01000000 0 0x00000000
226 pci2: pcie@ffe202000 {
227 reg = <0xf 0xfe202000 0 0x1000>;
228 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
229 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
231 ranges = <0x02000000 0 0xe0000000
232 0x02000000 0 0xe0000000
235 0x01000000 0 0x00000000
236 0x01000000 0 0x00000000
241 pci3: pcie@ffe203000 {
242 reg = <0xf 0xfe203000 0 0x1000>;
243 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
244 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
246 ranges = <0x02000000 0 0xe0000000
247 0x02000000 0 0xe0000000
250 0x01000000 0 0x00000000
251 0x01000000 0 0x00000000
257 /include/ "fsl/p3041si-post.dtsi"