arch/powerpc/include/asm/book3s/64/hash-4k.h

   1 #ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H
   2 #define _ASM_POWERPC_BOOK3S_64_HASH_4K_H
   3 /*
   4  * Entries per page directory level.  The PTE level must use a 64b record
   5  * for each page table entry.  The PMD and PGD level use a 32b record for
   6  * each entry by assuming that each entry is page aligned.
   7  */
   8 #define H_PTE_INDEX_SIZE  9
   9 #define H_PMD_INDEX_SIZE  7
  10 #define H_PUD_INDEX_SIZE  9
  11 #define H_PGD_INDEX_SIZE  9
  12
  13 #ifndef __ASSEMBLY__
  14 #define H_PTE_TABLE_SIZE        (sizeof(pte_t) << H_PTE_INDEX_SIZE)
  15 #define H_PMD_TABLE_SIZE        (sizeof(pmd_t) << H_PMD_INDEX_SIZE)
  16 #define H_PUD_TABLE_SIZE        (sizeof(pud_t) << H_PUD_INDEX_SIZE)
  17 #define H_PGD_TABLE_SIZE        (sizeof(pgd_t) << H_PGD_INDEX_SIZE)
  18
  19 /* PTE flags to conserve for HPTE identification */
  20 #define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | \
  21                          H_PAGE_F_SECOND | H_PAGE_F_GIX)
  22 /*
  23  * Not supported by 4k linux page size
  24  */
  25 #define H_PAGE_4K_PFN   0x0
  26 #define H_PAGE_THP_HUGE 0x0
  27 #define H_PAGE_COMBO    0x0
  28 #define H_PTE_FRAG_NR   0
  29 #define H_PTE_FRAG_SIZE_SHIFT  0
  30 /*
  31  * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
  32  */
  33 #define remap_4k_pfn(vma, addr, pfn, prot)      \
  34         remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
  35
  36 #ifdef CONFIG_HUGETLB_PAGE
  37 static inline int hash__hugepd_ok(hugepd_t hpd)
  38 {
  39         unsigned long hpdval = hpd_val(hpd);
  40         /*
  41          * if it is not a pte and have hugepd shift mask
  42          * set, then it is a hugepd directory pointer
  43          */
  44         if (!(hpdval & _PAGE_PTE) &&
  45             ((hpdval & HUGEPD_SHIFT_MASK) != 0))
  46                 return true;
  47         return false;
  48 }
  49 #endif
  50
  51 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  52
  53 static inline char *get_hpte_slot_array(pmd_t *pmdp)
  54 {
  55         BUG();
  56         return NULL;
  57 }
  58
  59 static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index)
  60 {
  61         BUG();
  62         return 0;
  63 }
  64
  65 static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array,
  66                                            int index)
  67 {
  68         BUG();
  69         return 0;
  70 }
  71
  72 static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array,
  73                                         unsigned int index, unsigned int hidx)
  74 {
  75         BUG();
  76 }
  77
  78 static inline int hash__pmd_trans_huge(pmd_t pmd)
  79 {
  80         return 0;
  81 }
  82
  83 static inline int hash__pmd_same(pmd_t pmd_a, pmd_t pmd_b)
  84 {
  85         BUG();
  86         return 0;
  87 }
  88
  89 static inline pmd_t hash__pmd_mkhuge(pmd_t pmd)
  90 {
  91         BUG();
  92         return pmd;
  93 }
  94
  95 extern unsigned long hash__pmd_hugepage_update(struct mm_struct *mm,
  96                                            unsigned long addr, pmd_t *pmdp,
  97                                            unsigned long clr, unsigned long set);
  98 extern pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma,
  99                                    unsigned long address, pmd_t *pmdp);
 100 extern void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
 101                                          pgtable_t pgtable);
 102 extern pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
 103 extern void hash__pmdp_huge_split_prepare(struct vm_area_struct *vma,
 104                                       unsigned long address, pmd_t *pmdp);
 105 extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm,
 106                                        unsigned long addr, pmd_t *pmdp);
 107 extern int hash__has_transparent_hugepage(void);
 108 #endif
 109
 110 #endif /* !__ASSEMBLY__ */
 111
 112 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */