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1 #ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
2 #define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
4 #include <asm-generic/5level-fixup.h>
7 #include <linux/mmdebug.h>
11 * Common bits between hash and Radix page table
13 #define _PAGE_BIT_SWAP_TYPE 0
17 #define _PAGE_EXEC 0x00001 /* execute permission */
18 #define _PAGE_WRITE 0x00002 /* write access allowed */
19 #define _PAGE_READ 0x00004 /* read access allowed */
20 #define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
21 #define _PAGE_RWX (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)
22 #define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
23 #define _PAGE_SAO 0x00010 /* Strong access order */
24 #define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
25 #define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
26 #define _PAGE_DIRTY 0x00080 /* C: page changed */
27 #define _PAGE_ACCESSED 0x00100 /* R: page referenced */
31 #define _RPAGE_SW0 0x2000000000000000UL
32 #define _RPAGE_SW1 0x00800
33 #define _RPAGE_SW2 0x00400
34 #define _RPAGE_SW3 0x00200
35 #define _RPAGE_RSV1 0x1000000000000000UL
36 #define _RPAGE_RSV2 0x0800000000000000UL
37 #define _RPAGE_RSV3 0x0400000000000000UL
38 #define _RPAGE_RSV4 0x0200000000000000UL
40 #ifdef CONFIG_MEM_SOFT_DIRTY
41 #define _PAGE_SOFT_DIRTY _RPAGE_SW3 /* software: software dirty tracking */
43 #define _PAGE_SOFT_DIRTY 0x00000
45 #define _PAGE_SPECIAL _RPAGE_SW2 /* software: special page */
48 * For P9 DD1 only, we need to track whether the pte's huge.
50 #define _PAGE_LARGE _RPAGE_RSV1
53 #define _PAGE_PTE (1ul << 62) /* distinguishes PTEs from pointers */
54 #define _PAGE_PRESENT (1ul << 63) /* pte contains a translation */
56 * Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
57 * Instead of fixing all of them, add an alternate define which
58 * maps CI pte mapping.
60 #define _PAGE_NO_CACHE _PAGE_TOLERANT
62 * We support 57 bit real address in pte. Clear everything above 57, and
63 * every thing below PAGE_SHIFT;
65 #define PTE_RPN_MASK (((1UL << 57) - 1) & (PAGE_MASK))
67 * set of bits not changed in pmd_modify. Even though we have hash specific bits
68 * in here, on radix we expect them to be zero.
70 #define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
71 _PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \
74 * user access blocked by key
76 #define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY)
77 #define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_READ)
78 #define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | \
79 _PAGE_RW | _PAGE_EXEC)
81 * No page size encoding in the linux PTE
85 * _PAGE_CHG_MASK masks of bits that are to be preserved across
88 #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
89 _PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE | \
92 * Mask of bits returned by pte_pgprot()
94 #define PAGE_PROT_BITS (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT | \
95 H_PAGE_4K_PFN | _PAGE_PRIVILEGED | _PAGE_ACCESSED | \
96 _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_EXEC | \
99 * We define 2 sets of base prot bits, one for basic pages (ie,
100 * cacheable kernel and user pages) and one for non cacheable
101 * pages. We always set _PAGE_COHERENT when SMP is enabled or
102 * the processor might need it for DMA coherency.
104 #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
105 #define _PAGE_BASE (_PAGE_BASE_NC)
107 /* Permission masks used to generate the __P and __S table,
109 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
111 * Write permissions imply read permissions for now (we could make write-only
112 * pages on BookE but we don't bother for now). Execute permission control is
113 * possible on platforms that define _PAGE_EXEC
115 * Note due to the way vm flags are laid out, the bits are XWR
117 #define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_PRIVILEGED)
118 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW)
119 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_EXEC)
120 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_READ)
121 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
122 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_READ)
123 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
125 #define __P000 PAGE_NONE
126 #define __P001 PAGE_READONLY
127 #define __P010 PAGE_COPY
128 #define __P011 PAGE_COPY
129 #define __P100 PAGE_READONLY_X
130 #define __P101 PAGE_READONLY_X
131 #define __P110 PAGE_COPY_X
132 #define __P111 PAGE_COPY_X
134 #define __S000 PAGE_NONE
135 #define __S001 PAGE_READONLY
136 #define __S010 PAGE_SHARED
137 #define __S011 PAGE_SHARED
138 #define __S100 PAGE_READONLY_X
139 #define __S101 PAGE_READONLY_X
140 #define __S110 PAGE_SHARED_X
141 #define __S111 PAGE_SHARED_X
143 /* Permission masks used for kernel mappings */
144 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
145 #define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
147 #define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
148 _PAGE_NON_IDEMPOTENT)
149 #define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
150 #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
151 #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
154 * Protection used for kernel text. We want the debuggers to be able to
155 * set breakpoints anywhere, so don't write protect the kernel text
156 * on platforms where such control is possible.
158 #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) || \
159 defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
160 #define PAGE_KERNEL_TEXT PAGE_KERNEL_X
162 #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
165 /* Make modules code happy. We don't set RO yet */
166 #define PAGE_KERNEL_EXEC PAGE_KERNEL_X
167 #define PAGE_AGP (PAGE_KERNEL_NC)
173 extern unsigned long __pte_index_size
;
174 extern unsigned long __pmd_index_size
;
175 extern unsigned long __pud_index_size
;
176 extern unsigned long __pgd_index_size
;
177 extern unsigned long __pmd_cache_index
;
178 #define PTE_INDEX_SIZE __pte_index_size
179 #define PMD_INDEX_SIZE __pmd_index_size
180 #define PUD_INDEX_SIZE __pud_index_size
181 #define PGD_INDEX_SIZE __pgd_index_size
182 #define PMD_CACHE_INDEX __pmd_cache_index
184 * Because of use of pte fragments and THP, size of page table
185 * are not always derived out of index size above.
187 extern unsigned long __pte_table_size
;
188 extern unsigned long __pmd_table_size
;
189 extern unsigned long __pud_table_size
;
190 extern unsigned long __pgd_table_size
;
191 #define PTE_TABLE_SIZE __pte_table_size
192 #define PMD_TABLE_SIZE __pmd_table_size
193 #define PUD_TABLE_SIZE __pud_table_size
194 #define PGD_TABLE_SIZE __pgd_table_size
196 extern unsigned long __pmd_val_bits
;
197 extern unsigned long __pud_val_bits
;
198 extern unsigned long __pgd_val_bits
;
199 #define PMD_VAL_BITS __pmd_val_bits
200 #define PUD_VAL_BITS __pud_val_bits
201 #define PGD_VAL_BITS __pgd_val_bits
203 extern unsigned long __pte_frag_nr
;
204 #define PTE_FRAG_NR __pte_frag_nr
205 extern unsigned long __pte_frag_size_shift
;
206 #define PTE_FRAG_SIZE_SHIFT __pte_frag_size_shift
207 #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
209 * Pgtable size used by swapper, init in asm code
211 #define MAX_PGD_TABLE_SIZE (sizeof(pgd_t) << RADIX_PGD_INDEX_SIZE)
213 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
214 #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
215 #define PTRS_PER_PUD (1 << PUD_INDEX_SIZE)
216 #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
218 /* PMD_SHIFT determines what a second-level page table entry can map */
219 #define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
220 #define PMD_SIZE (1UL << PMD_SHIFT)
221 #define PMD_MASK (~(PMD_SIZE-1))
223 /* PUD_SHIFT determines what a third-level page table entry can map */
224 #define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
225 #define PUD_SIZE (1UL << PUD_SHIFT)
226 #define PUD_MASK (~(PUD_SIZE-1))
228 /* PGDIR_SHIFT determines what a fourth-level page table entry can map */
229 #define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE)
230 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
231 #define PGDIR_MASK (~(PGDIR_SIZE-1))
233 /* Bits to mask out from a PMD to get to the PTE page */
234 #define PMD_MASKED_BITS 0xc0000000000000ffUL
235 /* Bits to mask out from a PUD to get to the PMD page */
236 #define PUD_MASKED_BITS 0xc0000000000000ffUL
237 /* Bits to mask out from a PGD to get to the PUD page */
238 #define PGD_MASKED_BITS 0xc0000000000000ffUL
240 extern unsigned long __vmalloc_start
;
241 extern unsigned long __vmalloc_end
;
242 #define VMALLOC_START __vmalloc_start
243 #define VMALLOC_END __vmalloc_end
245 extern unsigned long __kernel_virt_start
;
246 extern unsigned long __kernel_virt_size
;
247 #define KERN_VIRT_START __kernel_virt_start
248 #define KERN_VIRT_SIZE __kernel_virt_size
249 extern struct page
*vmemmap
;
250 extern unsigned long ioremap_bot
;
251 extern unsigned long pci_io_base
;
252 #endif /* __ASSEMBLY__ */
254 #include <asm/book3s/64/hash.h>
255 #include <asm/book3s/64/radix.h>
257 #ifdef CONFIG_PPC_64K_PAGES
258 #include <asm/book3s/64/pgtable-64k.h>
260 #include <asm/book3s/64/pgtable-4k.h>
263 #include <asm/barrier.h>
265 * The second half of the kernel virtual space is used for IO mappings,
266 * it's itself carved into the PIO region (ISA and PHB IO space) and
269 * ISA_IO_BASE = KERN_IO_START, 64K reserved area
270 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
271 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
273 #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
274 #define FULL_IO_SIZE 0x80000000ul
275 #define ISA_IO_BASE (KERN_IO_START)
276 #define ISA_IO_END (KERN_IO_START + 0x10000ul)
277 #define PHB_IO_BASE (ISA_IO_END)
278 #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
279 #define IOREMAP_BASE (PHB_IO_END)
280 #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
282 /* Advertise special mapping type for AGP */
283 #define HAVE_PAGE_AGP
285 /* Advertise support for _PAGE_SPECIAL */
286 #define __HAVE_ARCH_PTE_SPECIAL
291 * This is the default implementation of various PTE accessors, it's
292 * used in all cases except Book3S with 64K pages where we have a
293 * concept of sub-pages
297 #define __real_pte(e,p) ((real_pte_t){(e)})
298 #define __rpte_to_pte(r) ((r).pte)
299 #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT)
301 #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
304 shift = mmu_psize_defs[psize].shift; \
306 #define pte_iterate_hashed_end() } while(0)
309 * We expect this to be called only for user addresses or kernel virtual
310 * addresses other than the linear mapping.
312 #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
314 #endif /* __real_pte */
316 static inline unsigned long pte_update(struct mm_struct
*mm
, unsigned long addr
,
317 pte_t
*ptep
, unsigned long clr
,
318 unsigned long set
, int huge
)
321 return radix__pte_update(mm
, addr
, ptep
, clr
, set
, huge
);
322 return hash__pte_update(mm
, addr
, ptep
, clr
, set
, huge
);
325 * For hash even if we have _PAGE_ACCESSED = 0, we do a pte_update.
326 * We currently remove entries from the hashtable regardless of whether
327 * the entry was young or dirty.
329 * We should be more intelligent about this but for the moment we override
330 * these functions and force a tlb flush unconditionally
331 * For radix: H_PAGE_HASHPTE should be zero. Hence we can use the same
332 * function for both hash and radix.
334 static inline int __ptep_test_and_clear_young(struct mm_struct
*mm
,
335 unsigned long addr
, pte_t
*ptep
)
339 if ((pte_raw(*ptep
) & cpu_to_be64(_PAGE_ACCESSED
| H_PAGE_HASHPTE
)) == 0)
341 old
= pte_update(mm
, addr
, ptep
, _PAGE_ACCESSED
, 0, 0);
342 return (old
& _PAGE_ACCESSED
) != 0;
345 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
346 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
349 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
353 static inline int __pte_write(pte_t pte
)
355 return !!(pte_raw(pte
) & cpu_to_be64(_PAGE_WRITE
));
358 #ifdef CONFIG_NUMA_BALANCING
359 #define pte_savedwrite pte_savedwrite
360 static inline bool pte_savedwrite(pte_t pte
)
363 * Saved write ptes are prot none ptes that doesn't have
364 * privileged bit sit. We mark prot none as one which has
365 * present and pviliged bit set and RWX cleared. To mark
366 * protnone which used to have _PAGE_WRITE set we clear
367 * the privileged bit.
369 return !(pte_raw(pte
) & cpu_to_be64(_PAGE_RWX
| _PAGE_PRIVILEGED
));
372 #define pte_savedwrite pte_savedwrite
373 static inline bool pte_savedwrite(pte_t pte
)
379 static inline int pte_write(pte_t pte
)
381 return __pte_write(pte
) || pte_savedwrite(pte
);
384 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
385 static inline void ptep_set_wrprotect(struct mm_struct
*mm
, unsigned long addr
,
388 if (__pte_write(*ptep
))
389 pte_update(mm
, addr
, ptep
, _PAGE_WRITE
, 0, 0);
390 else if (unlikely(pte_savedwrite(*ptep
)))
391 pte_update(mm
, addr
, ptep
, 0, _PAGE_PRIVILEGED
, 0);
394 static inline void huge_ptep_set_wrprotect(struct mm_struct
*mm
,
395 unsigned long addr
, pte_t
*ptep
)
398 * We should not find protnone for hugetlb, but this complete the
401 if (__pte_write(*ptep
))
402 pte_update(mm
, addr
, ptep
, _PAGE_WRITE
, 0, 1);
403 else if (unlikely(pte_savedwrite(*ptep
)))
404 pte_update(mm
, addr
, ptep
, 0, _PAGE_PRIVILEGED
, 1);
407 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
408 static inline pte_t
ptep_get_and_clear(struct mm_struct
*mm
,
409 unsigned long addr
, pte_t
*ptep
)
411 unsigned long old
= pte_update(mm
, addr
, ptep
, ~0UL, 0, 0);
415 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
416 static inline pte_t
ptep_get_and_clear_full(struct mm_struct
*mm
,
418 pte_t
*ptep
, int full
)
420 if (full
&& radix_enabled()) {
422 * Let's skip the DD1 style pte update here. We know that
423 * this is a full mm pte clear and hence can be sure there is
424 * no parallel set_pte.
426 return radix__ptep_get_and_clear_full(mm
, addr
, ptep
, full
);
428 return ptep_get_and_clear(mm
, addr
, ptep
);
432 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
435 pte_update(mm
, addr
, ptep
, ~0UL, 0, 0);
438 static inline int pte_dirty(pte_t pte
)
440 return !!(pte_raw(pte
) & cpu_to_be64(_PAGE_DIRTY
));
443 static inline int pte_young(pte_t pte
)
445 return !!(pte_raw(pte
) & cpu_to_be64(_PAGE_ACCESSED
));
448 static inline int pte_special(pte_t pte
)
450 return !!(pte_raw(pte
) & cpu_to_be64(_PAGE_SPECIAL
));
453 static inline pgprot_t
pte_pgprot(pte_t pte
) { return __pgprot(pte_val(pte
) & PAGE_PROT_BITS
); }
455 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
456 static inline bool pte_soft_dirty(pte_t pte
)
458 return !!(pte_raw(pte
) & cpu_to_be64(_PAGE_SOFT_DIRTY
));
461 static inline pte_t
pte_mksoft_dirty(pte_t pte
)
463 return __pte(pte_val(pte
) | _PAGE_SOFT_DIRTY
);
466 static inline pte_t
pte_clear_soft_dirty(pte_t pte
)
468 return __pte(pte_val(pte
) & ~_PAGE_SOFT_DIRTY
);
470 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
472 #ifdef CONFIG_NUMA_BALANCING
473 static inline int pte_protnone(pte_t pte
)
475 return (pte_raw(pte
) & cpu_to_be64(_PAGE_PRESENT
| _PAGE_PTE
| _PAGE_RWX
)) ==
476 cpu_to_be64(_PAGE_PRESENT
| _PAGE_PTE
);
479 #define pte_mk_savedwrite pte_mk_savedwrite
480 static inline pte_t
pte_mk_savedwrite(pte_t pte
)
483 * Used by Autonuma subsystem to preserve the write bit
484 * while marking the pte PROT_NONE. Only allow this
487 VM_BUG_ON((pte_raw(pte
) & cpu_to_be64(_PAGE_PRESENT
| _PAGE_RWX
| _PAGE_PRIVILEGED
)) !=
488 cpu_to_be64(_PAGE_PRESENT
| _PAGE_PRIVILEGED
));
489 return __pte(pte_val(pte
) & ~_PAGE_PRIVILEGED
);
492 #define pte_clear_savedwrite pte_clear_savedwrite
493 static inline pte_t
pte_clear_savedwrite(pte_t pte
)
496 * Used by KSM subsystem to make a protnone pte readonly.
498 VM_BUG_ON(!pte_protnone(pte
));
499 return __pte(pte_val(pte
) | _PAGE_PRIVILEGED
);
502 #define pte_clear_savedwrite pte_clear_savedwrite
503 static inline pte_t
pte_clear_savedwrite(pte_t pte
)
506 return __pte(pte_val(pte
) & ~_PAGE_WRITE
);
508 #endif /* CONFIG_NUMA_BALANCING */
510 static inline int pte_present(pte_t pte
)
512 return !!(pte_raw(pte
) & cpu_to_be64(_PAGE_PRESENT
));
515 * Conversion functions: convert a page and protection to a page entry,
516 * and a page entry and page directory to the page they refer to.
518 * Even if PTEs can be unsigned long long, a PFN is always an unsigned
521 static inline pte_t
pfn_pte(unsigned long pfn
, pgprot_t pgprot
)
523 return __pte((((pte_basic_t
)(pfn
) << PAGE_SHIFT
) & PTE_RPN_MASK
) |
527 static inline unsigned long pte_pfn(pte_t pte
)
529 return (pte_val(pte
) & PTE_RPN_MASK
) >> PAGE_SHIFT
;
532 /* Generic modifiers for PTE bits */
533 static inline pte_t
pte_wrprotect(pte_t pte
)
535 if (unlikely(pte_savedwrite(pte
)))
536 return pte_clear_savedwrite(pte
);
537 return __pte(pte_val(pte
) & ~_PAGE_WRITE
);
540 static inline pte_t
pte_mkclean(pte_t pte
)
542 return __pte(pte_val(pte
) & ~_PAGE_DIRTY
);
545 static inline pte_t
pte_mkold(pte_t pte
)
547 return __pte(pte_val(pte
) & ~_PAGE_ACCESSED
);
550 static inline pte_t
pte_mkwrite(pte_t pte
)
553 * write implies read, hence set both
555 return __pte(pte_val(pte
) | _PAGE_RW
);
558 static inline pte_t
pte_mkdirty(pte_t pte
)
560 return __pte(pte_val(pte
) | _PAGE_DIRTY
| _PAGE_SOFT_DIRTY
);
563 static inline pte_t
pte_mkyoung(pte_t pte
)
565 return __pte(pte_val(pte
) | _PAGE_ACCESSED
);
568 static inline pte_t
pte_mkspecial(pte_t pte
)
570 return __pte(pte_val(pte
) | _PAGE_SPECIAL
);
573 static inline pte_t
pte_mkhuge(pte_t pte
)
578 static inline pte_t
pte_modify(pte_t pte
, pgprot_t newprot
)
580 /* FIXME!! check whether this need to be a conditional */
581 return __pte((pte_val(pte
) & _PAGE_CHG_MASK
) | pgprot_val(newprot
));
584 static inline bool pte_user(pte_t pte
)
586 return !(pte_raw(pte
) & cpu_to_be64(_PAGE_PRIVILEGED
));
589 /* Encode and de-code a swap entry */
590 #define MAX_SWAPFILES_CHECK() do { \
591 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
593 * Don't have overlapping bits with _PAGE_HPTEFLAGS \
594 * We filter HPTEFLAGS on set_pte. \
596 BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
597 BUILD_BUG_ON(_PAGE_HPTEFLAGS & _PAGE_SWP_SOFT_DIRTY); \
600 * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
602 #define SWP_TYPE_BITS 5
603 #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \
604 & ((1UL << SWP_TYPE_BITS) - 1))
605 #define __swp_offset(x) (((x).val & PTE_RPN_MASK) >> PAGE_SHIFT)
606 #define __swp_entry(type, offset) ((swp_entry_t) { \
607 ((type) << _PAGE_BIT_SWAP_TYPE) \
608 | (((offset) << PAGE_SHIFT) & PTE_RPN_MASK)})
610 * swp_entry_t must be independent of pte bits. We build a swp_entry_t from
611 * swap type and offset we get from swap and convert that to pte to find a
612 * matching pte in linux page table.
613 * Clear bits not found in swap entries here.
615 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) & ~_PAGE_PTE })
616 #define __swp_entry_to_pte(x) __pte((x).val | _PAGE_PTE)
618 #ifdef CONFIG_MEM_SOFT_DIRTY
619 #define _PAGE_SWP_SOFT_DIRTY (1UL << (SWP_TYPE_BITS + _PAGE_BIT_SWAP_TYPE))
621 #define _PAGE_SWP_SOFT_DIRTY 0UL
622 #endif /* CONFIG_MEM_SOFT_DIRTY */
624 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
625 static inline pte_t
pte_swp_mksoft_dirty(pte_t pte
)
627 return __pte(pte_val(pte
) | _PAGE_SWP_SOFT_DIRTY
);
630 static inline bool pte_swp_soft_dirty(pte_t pte
)
632 return !!(pte_raw(pte
) & cpu_to_be64(_PAGE_SWP_SOFT_DIRTY
));
635 static inline pte_t
pte_swp_clear_soft_dirty(pte_t pte
)
637 return __pte(pte_val(pte
) & ~_PAGE_SWP_SOFT_DIRTY
);
639 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
641 static inline bool check_pte_access(unsigned long access
, unsigned long ptev
)
644 * This check for _PAGE_RWX and _PAGE_PRESENT bits
649 * This check for access to privilege space
651 if ((access
& _PAGE_PRIVILEGED
) != (ptev
& _PAGE_PRIVILEGED
))
657 * Generic functions with hash/radix callbacks
660 static inline void __ptep_set_access_flags(struct mm_struct
*mm
,
661 pte_t
*ptep
, pte_t entry
,
662 unsigned long address
)
665 return radix__ptep_set_access_flags(mm
, ptep
, entry
, address
);
666 return hash__ptep_set_access_flags(ptep
, entry
);
669 #define __HAVE_ARCH_PTE_SAME
670 static inline int pte_same(pte_t pte_a
, pte_t pte_b
)
673 return radix__pte_same(pte_a
, pte_b
);
674 return hash__pte_same(pte_a
, pte_b
);
677 static inline int pte_none(pte_t pte
)
680 return radix__pte_none(pte
);
681 return hash__pte_none(pte
);
684 static inline void __set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
685 pte_t
*ptep
, pte_t pte
, int percpu
)
688 return radix__set_pte_at(mm
, addr
, ptep
, pte
, percpu
);
689 return hash__set_pte_at(mm
, addr
, ptep
, pte
, percpu
);
692 #define _PAGE_CACHE_CTL (_PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT)
694 #define pgprot_noncached pgprot_noncached
695 static inline pgprot_t
pgprot_noncached(pgprot_t prot
)
697 return __pgprot((pgprot_val(prot
) & ~_PAGE_CACHE_CTL
) |
698 _PAGE_NON_IDEMPOTENT
);
701 #define pgprot_noncached_wc pgprot_noncached_wc
702 static inline pgprot_t
pgprot_noncached_wc(pgprot_t prot
)
704 return __pgprot((pgprot_val(prot
) & ~_PAGE_CACHE_CTL
) |
708 #define pgprot_cached pgprot_cached
709 static inline pgprot_t
pgprot_cached(pgprot_t prot
)
711 return __pgprot((pgprot_val(prot
) & ~_PAGE_CACHE_CTL
));
714 #define pgprot_writecombine pgprot_writecombine
715 static inline pgprot_t
pgprot_writecombine(pgprot_t prot
)
717 return pgprot_noncached_wc(prot
);
720 * check a pte mapping have cache inhibited property
722 static inline bool pte_ci(pte_t pte
)
724 unsigned long pte_v
= pte_val(pte
);
726 if (((pte_v
& _PAGE_CACHE_CTL
) == _PAGE_TOLERANT
) ||
727 ((pte_v
& _PAGE_CACHE_CTL
) == _PAGE_NON_IDEMPOTENT
))
732 static inline void pmd_set(pmd_t
*pmdp
, unsigned long val
)
737 static inline void pmd_clear(pmd_t
*pmdp
)
742 static inline int pmd_none(pmd_t pmd
)
744 return !pmd_raw(pmd
);
747 static inline int pmd_present(pmd_t pmd
)
750 return !pmd_none(pmd
);
753 static inline int pmd_bad(pmd_t pmd
)
756 return radix__pmd_bad(pmd
);
757 return hash__pmd_bad(pmd
);
760 static inline void pud_set(pud_t
*pudp
, unsigned long val
)
765 static inline void pud_clear(pud_t
*pudp
)
770 static inline int pud_none(pud_t pud
)
772 return !pud_raw(pud
);
775 static inline int pud_present(pud_t pud
)
777 return !pud_none(pud
);
780 extern struct page
*pud_page(pud_t pud
);
781 extern struct page
*pmd_page(pmd_t pmd
);
782 static inline pte_t
pud_pte(pud_t pud
)
784 return __pte_raw(pud_raw(pud
));
787 static inline pud_t
pte_pud(pte_t pte
)
789 return __pud_raw(pte_raw(pte
));
791 #define pud_write(pud) pte_write(pud_pte(pud))
793 static inline int pud_bad(pud_t pud
)
796 return radix__pud_bad(pud
);
797 return hash__pud_bad(pud
);
801 #define pgd_write(pgd) pte_write(pgd_pte(pgd))
802 static inline void pgd_set(pgd_t
*pgdp
, unsigned long val
)
807 static inline void pgd_clear(pgd_t
*pgdp
)
812 static inline int pgd_none(pgd_t pgd
)
814 return !pgd_raw(pgd
);
817 static inline int pgd_present(pgd_t pgd
)
819 return !pgd_none(pgd
);
822 static inline pte_t
pgd_pte(pgd_t pgd
)
824 return __pte_raw(pgd_raw(pgd
));
827 static inline pgd_t
pte_pgd(pte_t pte
)
829 return __pgd_raw(pte_raw(pte
));
832 static inline int pgd_bad(pgd_t pgd
)
835 return radix__pgd_bad(pgd
);
836 return hash__pgd_bad(pgd
);
839 extern struct page
*pgd_page(pgd_t pgd
);
841 /* Pointers in the page table tree are physical addresses */
842 #define __pgtable_ptr_val(ptr) __pa(ptr)
844 #define pmd_page_vaddr(pmd) __va(pmd_val(pmd) & ~PMD_MASKED_BITS)
845 #define pud_page_vaddr(pud) __va(pud_val(pud) & ~PUD_MASKED_BITS)
846 #define pgd_page_vaddr(pgd) __va(pgd_val(pgd) & ~PGD_MASKED_BITS)
848 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
849 #define pud_index(address) (((address) >> (PUD_SHIFT)) & (PTRS_PER_PUD - 1))
850 #define pmd_index(address) (((address) >> (PMD_SHIFT)) & (PTRS_PER_PMD - 1))
851 #define pte_index(address) (((address) >> (PAGE_SHIFT)) & (PTRS_PER_PTE - 1))
854 * Find an entry in a page-table-directory. We combine the address region
855 * (the high order N bits) and the pgd portion of the address.
858 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
860 #define pud_offset(pgdp, addr) \
861 (((pud_t *) pgd_page_vaddr(*(pgdp))) + pud_index(addr))
862 #define pmd_offset(pudp,addr) \
863 (((pmd_t *) pud_page_vaddr(*(pudp))) + pmd_index(addr))
864 #define pte_offset_kernel(dir,addr) \
865 (((pte_t *) pmd_page_vaddr(*(dir))) + pte_index(addr))
867 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
868 #define pte_unmap(pte) do { } while(0)
870 /* to find an entry in a kernel page-table-directory */
871 /* This now only contains the vmalloc pages */
872 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
874 #define pte_ERROR(e) \
875 pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
876 #define pmd_ERROR(e) \
877 pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
878 #define pud_ERROR(e) \
879 pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
880 #define pgd_ERROR(e) \
881 pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
883 static inline int map_kernel_page(unsigned long ea
, unsigned long pa
,
886 if (radix_enabled()) {
887 #if defined(CONFIG_PPC_RADIX_MMU) && defined(DEBUG_VM)
888 unsigned long page_size
= 1 << mmu_psize_defs
[mmu_io_psize
].shift
;
889 WARN((page_size
!= PAGE_SIZE
), "I/O page size != PAGE_SIZE");
891 return radix__map_kernel_page(ea
, pa
, __pgprot(flags
), PAGE_SIZE
);
893 return hash__map_kernel_page(ea
, pa
, flags
);
896 static inline int __meminit
vmemmap_create_mapping(unsigned long start
,
897 unsigned long page_size
,
901 return radix__vmemmap_create_mapping(start
, page_size
, phys
);
902 return hash__vmemmap_create_mapping(start
, page_size
, phys
);
905 #ifdef CONFIG_MEMORY_HOTPLUG
906 static inline void vmemmap_remove_mapping(unsigned long start
,
907 unsigned long page_size
)
910 return radix__vmemmap_remove_mapping(start
, page_size
);
911 return hash__vmemmap_remove_mapping(start
, page_size
);
914 struct page
*realmode_pfn_to_page(unsigned long pfn
);
916 static inline pte_t
pmd_pte(pmd_t pmd
)
918 return __pte_raw(pmd_raw(pmd
));
921 static inline pmd_t
pte_pmd(pte_t pte
)
923 return __pmd_raw(pte_raw(pte
));
926 static inline pte_t
*pmdp_ptep(pmd_t
*pmd
)
930 #define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd))
931 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
932 #define pmd_young(pmd) pte_young(pmd_pte(pmd))
933 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
934 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
935 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
936 #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
937 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
938 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
939 #define pmd_mk_savedwrite(pmd) pte_pmd(pte_mk_savedwrite(pmd_pte(pmd)))
940 #define pmd_clear_savedwrite(pmd) pte_pmd(pte_clear_savedwrite(pmd_pte(pmd)))
942 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
943 #define pmd_soft_dirty(pmd) pte_soft_dirty(pmd_pte(pmd))
944 #define pmd_mksoft_dirty(pmd) pte_pmd(pte_mksoft_dirty(pmd_pte(pmd)))
945 #define pmd_clear_soft_dirty(pmd) pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd)))
946 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
948 #ifdef CONFIG_NUMA_BALANCING
949 static inline int pmd_protnone(pmd_t pmd
)
951 return pte_protnone(pmd_pte(pmd
));
953 #endif /* CONFIG_NUMA_BALANCING */
955 #define __HAVE_ARCH_PMD_WRITE
956 #define pmd_write(pmd) pte_write(pmd_pte(pmd))
957 #define __pmd_write(pmd) __pte_write(pmd_pte(pmd))
958 #define pmd_savedwrite(pmd) pte_savedwrite(pmd_pte(pmd))
960 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
961 extern pmd_t
pfn_pmd(unsigned long pfn
, pgprot_t pgprot
);
962 extern pmd_t
mk_pmd(struct page
*page
, pgprot_t pgprot
);
963 extern pmd_t
pmd_modify(pmd_t pmd
, pgprot_t newprot
);
964 extern void set_pmd_at(struct mm_struct
*mm
, unsigned long addr
,
965 pmd_t
*pmdp
, pmd_t pmd
);
966 extern void update_mmu_cache_pmd(struct vm_area_struct
*vma
, unsigned long addr
,
968 extern int hash__has_transparent_hugepage(void);
969 static inline int has_transparent_hugepage(void)
972 return radix__has_transparent_hugepage();
973 return hash__has_transparent_hugepage();
975 #define has_transparent_hugepage has_transparent_hugepage
977 static inline unsigned long
978 pmd_hugepage_update(struct mm_struct
*mm
, unsigned long addr
, pmd_t
*pmdp
,
979 unsigned long clr
, unsigned long set
)
982 return radix__pmd_hugepage_update(mm
, addr
, pmdp
, clr
, set
);
983 return hash__pmd_hugepage_update(mm
, addr
, pmdp
, clr
, set
);
986 static inline int pmd_large(pmd_t pmd
)
988 return !!(pmd_raw(pmd
) & cpu_to_be64(_PAGE_PTE
));
991 static inline pmd_t
pmd_mknotpresent(pmd_t pmd
)
993 return __pmd(pmd_val(pmd
) & ~_PAGE_PRESENT
);
996 * For radix we should always find H_PAGE_HASHPTE zero. Hence
997 * the below will work for radix too
999 static inline int __pmdp_test_and_clear_young(struct mm_struct
*mm
,
1000 unsigned long addr
, pmd_t
*pmdp
)
1004 if ((pmd_raw(*pmdp
) & cpu_to_be64(_PAGE_ACCESSED
| H_PAGE_HASHPTE
)) == 0)
1006 old
= pmd_hugepage_update(mm
, addr
, pmdp
, _PAGE_ACCESSED
, 0);
1007 return ((old
& _PAGE_ACCESSED
) != 0);
1010 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1011 static inline void pmdp_set_wrprotect(struct mm_struct
*mm
, unsigned long addr
,
1014 if (__pmd_write((*pmdp
)))
1015 pmd_hugepage_update(mm
, addr
, pmdp
, _PAGE_WRITE
, 0);
1016 else if (unlikely(pmd_savedwrite(*pmdp
)))
1017 pmd_hugepage_update(mm
, addr
, pmdp
, 0, _PAGE_PRIVILEGED
);
1020 static inline int pmd_trans_huge(pmd_t pmd
)
1022 if (radix_enabled())
1023 return radix__pmd_trans_huge(pmd
);
1024 return hash__pmd_trans_huge(pmd
);
1027 #define __HAVE_ARCH_PMD_SAME
1028 static inline int pmd_same(pmd_t pmd_a
, pmd_t pmd_b
)
1030 if (radix_enabled())
1031 return radix__pmd_same(pmd_a
, pmd_b
);
1032 return hash__pmd_same(pmd_a
, pmd_b
);
1035 static inline pmd_t
pmd_mkhuge(pmd_t pmd
)
1037 if (radix_enabled())
1038 return radix__pmd_mkhuge(pmd
);
1039 return hash__pmd_mkhuge(pmd
);
1042 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1043 extern int pmdp_set_access_flags(struct vm_area_struct
*vma
,
1044 unsigned long address
, pmd_t
*pmdp
,
1045 pmd_t entry
, int dirty
);
1047 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1048 extern int pmdp_test_and_clear_young(struct vm_area_struct
*vma
,
1049 unsigned long address
, pmd_t
*pmdp
);
1051 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1052 static inline pmd_t
pmdp_huge_get_and_clear(struct mm_struct
*mm
,
1053 unsigned long addr
, pmd_t
*pmdp
)
1055 if (radix_enabled())
1056 return radix__pmdp_huge_get_and_clear(mm
, addr
, pmdp
);
1057 return hash__pmdp_huge_get_and_clear(mm
, addr
, pmdp
);
1060 static inline pmd_t
pmdp_collapse_flush(struct vm_area_struct
*vma
,
1061 unsigned long address
, pmd_t
*pmdp
)
1063 if (radix_enabled())
1064 return radix__pmdp_collapse_flush(vma
, address
, pmdp
);
1065 return hash__pmdp_collapse_flush(vma
, address
, pmdp
);
1067 #define pmdp_collapse_flush pmdp_collapse_flush
1069 #define __HAVE_ARCH_PGTABLE_DEPOSIT
1070 static inline void pgtable_trans_huge_deposit(struct mm_struct
*mm
,
1071 pmd_t
*pmdp
, pgtable_t pgtable
)
1073 if (radix_enabled())
1074 return radix__pgtable_trans_huge_deposit(mm
, pmdp
, pgtable
);
1075 return hash__pgtable_trans_huge_deposit(mm
, pmdp
, pgtable
);
1078 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1079 static inline pgtable_t
pgtable_trans_huge_withdraw(struct mm_struct
*mm
,
1082 if (radix_enabled())
1083 return radix__pgtable_trans_huge_withdraw(mm
, pmdp
);
1084 return hash__pgtable_trans_huge_withdraw(mm
, pmdp
);
1087 #define __HAVE_ARCH_PMDP_INVALIDATE
1088 extern void pmdp_invalidate(struct vm_area_struct
*vma
, unsigned long address
,
1091 #define __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
1092 static inline void pmdp_huge_split_prepare(struct vm_area_struct
*vma
,
1093 unsigned long address
, pmd_t
*pmdp
)
1095 if (radix_enabled())
1096 return radix__pmdp_huge_split_prepare(vma
, address
, pmdp
);
1097 return hash__pmdp_huge_split_prepare(vma
, address
, pmdp
);
1100 #define pmd_move_must_withdraw pmd_move_must_withdraw
1102 static inline int pmd_move_must_withdraw(struct spinlock
*new_pmd_ptl
,
1103 struct spinlock
*old_pmd_ptl
,
1104 struct vm_area_struct
*vma
)
1106 if (radix_enabled())
1109 * Archs like ppc64 use pgtable to store per pmd
1110 * specific information. So when we switch the pmd,
1111 * we should also withdraw and deposit the pgtable
1117 #define arch_needs_pgtable_deposit arch_needs_pgtable_deposit
1118 static inline bool arch_needs_pgtable_deposit(void)
1120 if (radix_enabled())
1125 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1126 #endif /* __ASSEMBLY__ */
1127 #endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */