arch/powerpc/include/asm/dma-mapping.h

   1 /*
   2  * Copyright (C) 2004 IBM
   3  *
   4  * Implements the generic device dma API for powerpc.
   5  * the pci and vio busses
   6  */
   7 #ifndef _ASM_DMA_MAPPING_H
   8 #define _ASM_DMA_MAPPING_H
   9 #ifdef __KERNEL__
  10
  11 #include <linux/types.h>
  12 #include <linux/cache.h>
  13 /* need struct page definitions */
  14 #include <linux/mm.h>
  15 #include <linux/scatterlist.h>
  16 #include <linux/dma-debug.h>
  17 #include <asm/io.h>
  18 #include <asm/swiotlb.h>
  19
  20 /* Some dma direct funcs must be visible for use in other dma_ops */
  21 extern void *__dma_direct_alloc_coherent(struct device *dev, size_t size,
  22                                          dma_addr_t *dma_handle, gfp_t flag,
  23                                          unsigned long attrs);
  24 extern void __dma_direct_free_coherent(struct device *dev, size_t size,
  25                                        void *vaddr, dma_addr_t dma_handle,
  26                                        unsigned long attrs);
  27 extern int dma_direct_mmap_coherent(struct device *dev,
  28                                     struct vm_area_struct *vma,
  29                                     void *cpu_addr, dma_addr_t handle,
  30                                     size_t size, unsigned long attrs);
  31
  32 #ifdef CONFIG_NOT_COHERENT_CACHE
  33 /*
  34  * DMA-consistent mapping functions for PowerPCs that don't support
  35  * cache snooping.  These allocate/free a region of uncached mapped
  36  * memory space for use with DMA devices.  Alternatively, you could
  37  * allocate the space "normally" and use the cache management functions
  38  * to ensure it is consistent.
  39  */
  40 struct device;
  41 extern void *__dma_alloc_coherent(struct device *dev, size_t size,
  42                                   dma_addr_t *handle, gfp_t gfp);
  43 extern void __dma_free_coherent(size_t size, void *vaddr);
  44 extern void __dma_sync(void *vaddr, size_t size, int direction);
  45 extern void __dma_sync_page(struct page *page, unsigned long offset,
  46                                  size_t size, int direction);
  47 extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
  48
  49 #else /* ! CONFIG_NOT_COHERENT_CACHE */
  50 /*
  51  * Cache coherent cores.
  52  */
  53
  54 #define __dma_alloc_coherent(dev, gfp, size, handle)    NULL
  55 #define __dma_free_coherent(size, addr)         ((void)0)
  56 #define __dma_sync(addr, size, rw)              ((void)0)
  57 #define __dma_sync_page(pg, off, sz, rw)        ((void)0)
  58
  59 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
  60
  61 static inline unsigned long device_to_mask(struct device *dev)
  62 {
  63         if (dev->dma_mask && *dev->dma_mask)
  64                 return *dev->dma_mask;
  65         /* Assume devices without mask can take 32 bit addresses */
  66         return 0xfffffffful;
  67 }
  68
  69 /*
  70  * Available generic sets of operations
  71  */
  72 #ifdef CONFIG_PPC64
  73 extern struct dma_map_ops dma_iommu_ops;
  74 #endif
  75 extern const struct dma_map_ops dma_direct_ops;
  76
  77 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
  78 {
  79         /* We don't handle the NULL dev case for ISA for now. We could
  80          * do it via an out of line call but it is not needed for now. The
  81          * only ISA DMA device we support is the floppy and we have a hack
  82          * in the floppy driver directly to get a device for us.
  83          */
  84         return NULL;
  85 }
  86
  87 /*
  88  * get_dma_offset()
  89  *
  90  * Get the dma offset on configurations where the dma address can be determined
  91  * from the physical address by looking at a simple offset.  Direct dma and
  92  * swiotlb use this function, but it is typically not used by implementations
  93  * with an iommu.
  94  */
  95 static inline dma_addr_t get_dma_offset(struct device *dev)
  96 {
  97         if (dev)
  98                 return dev->archdata.dma_offset;
  99
 100         return PCI_DRAM_OFFSET;
 101 }
 102
 103 static inline void set_dma_offset(struct device *dev, dma_addr_t off)
 104 {
 105         if (dev)
 106                 dev->archdata.dma_offset = off;
 107 }
 108
 109 /* this will be removed soon */
 110 #define flush_write_buffers()
 111
 112 #define HAVE_ARCH_DMA_SET_MASK 1
 113 extern int dma_set_mask(struct device *dev, u64 dma_mask);
 114
 115 extern u64 __dma_get_required_mask(struct device *dev);
 116
 117 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
 118 {
 119 #ifdef CONFIG_SWIOTLB
 120         struct dev_archdata *sd = &dev->archdata;
 121
 122         if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
 123                 return false;
 124 #endif
 125
 126         if (!dev->dma_mask)
 127                 return false;
 128
 129         return addr + size - 1 <= *dev->dma_mask;
 130 }
 131
 132 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
 133 {
 134         return paddr + get_dma_offset(dev);
 135 }
 136
 137 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
 138 {
 139         return daddr - get_dma_offset(dev);
 140 }
 141
 142 #define ARCH_HAS_DMA_MMAP_COHERENT
 143
 144 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
 145                 enum dma_data_direction direction)
 146 {
 147         BUG_ON(direction == DMA_NONE);
 148         __dma_sync(vaddr, size, (int)direction);
 149 }
 150
 151 #endif /* __KERNEL__ */
 152 #endif  /* _ASM_DMA_MAPPING_H */