arch/powerpc/include/asm/drmem.h

   1 /*
   2  * drmem.h: Power specific logical memory block representation
   3  *
   4  * Copyright 2017 IBM Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #ifndef _ASM_POWERPC_LMB_H
  13 #define _ASM_POWERPC_LMB_H
  14
  15 struct drmem_lmb {
  16         u64     base_addr;
  17         u32     drc_index;
  18         u32     aa_index;
  19         u32     flags;
  20 #ifdef CONFIG_MEMORY_HOTPLUG
  21         int     nid;
  22 #endif
  23 };
  24
  25 struct drmem_lmb_info {
  26         struct drmem_lmb        *lmbs;
  27         int                     n_lmbs;
  28         u32                     lmb_size;
  29 };
  30
  31 extern struct drmem_lmb_info *drmem_info;
  32
  33 #define for_each_drmem_lmb_in_range(lmb, start, end)            \
  34         for ((lmb) = (start); (lmb) <= (end); (lmb)++)
  35
  36 #define for_each_drmem_lmb(lmb)                                 \
  37         for_each_drmem_lmb_in_range((lmb),                      \
  38                 &drmem_info->lmbs[0],                           \
  39                 &drmem_info->lmbs[drmem_info->n_lmbs - 1])
  40
  41 /*
  42  * The of_drconf_cell_v1 struct defines the layout of the LMB data
  43  * specified in the ibm,dynamic-memory device tree property.
  44  * The property itself is a 32-bit value specifying the number of
  45  * LMBs followed by an array of of_drconf_cell_v1 entries, one
  46  * per LMB.
  47  */
  48 struct of_drconf_cell_v1 {
  49         __be64  base_addr;
  50         __be32  drc_index;
  51         __be32  reserved;
  52         __be32  aa_index;
  53         __be32  flags;
  54 };
  55
  56 /*
  57  * Version 2 of the ibm,dynamic-memory property is defined as a
  58  * 32-bit value specifying the number of LMB sets followed by an
  59  * array of of_drconf_cell_v2 entries, one per LMB set.
  60  */
  61 struct of_drconf_cell_v2 {
  62         u32     seq_lmbs;
  63         u64     base_addr;
  64         u32     drc_index;
  65         u32     aa_index;
  66         u32     flags;
  67 } __packed;
  68
  69 #define DRCONF_MEM_ASSIGNED     0x00000008
  70 #define DRCONF_MEM_AI_INVALID   0x00000040
  71 #define DRCONF_MEM_RESERVED     0x00000080
  72
  73 static inline u32 drmem_lmb_size(void)
  74 {
  75         return drmem_info->lmb_size;
  76 }
  77
  78 #define DRMEM_LMB_RESERVED      0x80000000
  79
  80 static inline void drmem_mark_lmb_reserved(struct drmem_lmb *lmb)
  81 {
  82         lmb->flags |= DRMEM_LMB_RESERVED;
  83 }
  84
  85 static inline void drmem_remove_lmb_reservation(struct drmem_lmb *lmb)
  86 {
  87         lmb->flags &= ~DRMEM_LMB_RESERVED;
  88 }
  89
  90 static inline bool drmem_lmb_reserved(struct drmem_lmb *lmb)
  91 {
  92         return lmb->flags & DRMEM_LMB_RESERVED;
  93 }
  94
  95 u64 drmem_lmb_memory_max(void);
  96 void __init walk_drmem_lmbs(struct device_node *dn,
  97                         void (*func)(struct drmem_lmb *, const __be32 **));
  98 int drmem_update_dt(void);
  99
 100 #ifdef CONFIG_PPC_PSERIES
 101 void __init walk_drmem_lmbs_early(unsigned long node,
 102                         void (*func)(struct drmem_lmb *, const __be32 **));
 103 #endif
 104
 105 static inline void invalidate_lmb_associativity_index(struct drmem_lmb *lmb)
 106 {
 107         lmb->aa_index = 0xffffffff;
 108 }
 109
 110 #ifdef CONFIG_MEMORY_HOTPLUG
 111 static inline void lmb_set_nid(struct drmem_lmb *lmb)
 112 {
 113         lmb->nid = memory_add_physaddr_to_nid(lmb->base_addr);
 114 }
 115 static inline void lmb_clear_nid(struct drmem_lmb *lmb)
 116 {
 117         lmb->nid = -1;
 118 }
 119 #else
 120 static inline void lmb_set_nid(struct drmem_lmb *lmb)
 121 {
 122 }
 123 static inline void lmb_clear_nid(struct drmem_lmb *lmb)
 124 {
 125 }
 126 #endif
 127
 128 #endif /* _ASM_POWERPC_LMB_H */