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git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - arch/powerpc/include/asm/hugetlb.h
1 #ifndef _ASM_POWERPC_HUGETLB_H
2 #define _ASM_POWERPC_HUGETLB_H
4 #ifdef CONFIG_HUGETLB_PAGE
6 #include <asm-generic/hugetlb.h>
8 extern struct kmem_cache
*hugepte_cache
;
10 #ifdef CONFIG_PPC_BOOK3S_64
12 #include <asm/book3s/64/hugetlb-radix.h>
14 * This should work for other subarchs too. But right now we use the
15 * new format only for 64bit book3s
17 static inline pte_t
*hugepd_page(hugepd_t hpd
)
19 BUG_ON(!hugepd_ok(hpd
));
21 * We have only four bits to encode, MMU page size
23 BUILD_BUG_ON((MMU_PAGE_COUNT
- 1) > 0xf);
24 return __va(hpd
.pd
& HUGEPD_ADDR_MASK
);
27 static inline unsigned int hugepd_mmu_psize(hugepd_t hpd
)
29 return (hpd
.pd
& HUGEPD_SHIFT_MASK
) >> 2;
32 static inline unsigned int hugepd_shift(hugepd_t hpd
)
34 return mmu_psize_to_shift(hugepd_mmu_psize(hpd
));
36 static inline void flush_hugetlb_page(struct vm_area_struct
*vma
,
40 return radix__flush_hugetlb_page(vma
, vmaddr
);
43 static inline void __local_flush_hugetlb_page(struct vm_area_struct
*vma
,
47 return radix__local_flush_hugetlb_page(vma
, vmaddr
);
51 static inline pte_t
*hugepd_page(hugepd_t hpd
)
53 BUG_ON(!hugepd_ok(hpd
));
54 return (pte_t
*)((hpd
.pd
& ~HUGEPD_SHIFT_MASK
) | PD_HUGE
);
57 static inline unsigned int hugepd_shift(hugepd_t hpd
)
59 return hpd
.pd
& HUGEPD_SHIFT_MASK
;
62 #endif /* CONFIG_PPC_BOOK3S_64 */
65 static inline pte_t
*hugepte_offset(hugepd_t hpd
, unsigned long addr
,
69 * On FSL BookE, we have multiple higher-level table entries that
70 * point to the same hugepte. Just use the first one since they're all
71 * identical. So for that case, idx=0.
73 unsigned long idx
= 0;
75 pte_t
*dir
= hugepd_page(hpd
);
76 #ifndef CONFIG_PPC_FSL_BOOK3E
77 idx
= (addr
& ((1UL << pdshift
) - 1)) >> hugepd_shift(hpd
);
83 pte_t
*huge_pte_offset_and_shift(struct mm_struct
*mm
,
84 unsigned long addr
, unsigned *shift
);
86 void flush_dcache_icache_hugepage(struct page
*page
);
88 #if defined(CONFIG_PPC_MM_SLICES)
89 int is_hugepage_only_range(struct mm_struct
*mm
, unsigned long addr
,
92 static inline int is_hugepage_only_range(struct mm_struct
*mm
,
100 void book3e_hugetlb_preload(struct vm_area_struct
*vma
, unsigned long ea
,
102 void flush_hugetlb_page(struct vm_area_struct
*vma
, unsigned long vmaddr
);
104 void hugetlb_free_pgd_range(struct mmu_gather
*tlb
, unsigned long addr
,
105 unsigned long end
, unsigned long floor
,
106 unsigned long ceiling
);
109 * The version of vma_mmu_pagesize() in arch/powerpc/mm/hugetlbpage.c needs
110 * to override the version in mm/hugetlb.c
112 #define vma_mmu_pagesize vma_mmu_pagesize
115 * If the arch doesn't supply something else, assume that hugepage
116 * size aligned regions are ok without further preparation.
118 static inline int prepare_hugepage_range(struct file
*file
,
119 unsigned long addr
, unsigned long len
)
121 struct hstate
*h
= hstate_file(file
);
122 if (len
& ~huge_page_mask(h
))
124 if (addr
& ~huge_page_mask(h
))
129 static inline void set_huge_pte_at(struct mm_struct
*mm
, unsigned long addr
,
130 pte_t
*ptep
, pte_t pte
)
132 set_pte_at(mm
, addr
, ptep
, pte
);
135 static inline pte_t
huge_ptep_get_and_clear(struct mm_struct
*mm
,
136 unsigned long addr
, pte_t
*ptep
)
139 return __pte(pte_update(mm
, addr
, ptep
, ~0UL, 0, 1));
141 return __pte(pte_update(ptep
, ~0UL, 0));
145 static inline void huge_ptep_clear_flush(struct vm_area_struct
*vma
,
146 unsigned long addr
, pte_t
*ptep
)
149 pte
= huge_ptep_get_and_clear(vma
->vm_mm
, addr
, ptep
);
150 flush_hugetlb_page(vma
, addr
);
153 static inline int huge_pte_none(pte_t pte
)
155 return pte_none(pte
);
158 static inline pte_t
huge_pte_wrprotect(pte_t pte
)
160 return pte_wrprotect(pte
);
163 static inline int huge_ptep_set_access_flags(struct vm_area_struct
*vma
,
164 unsigned long addr
, pte_t
*ptep
,
165 pte_t pte
, int dirty
)
167 #ifdef HUGETLB_NEED_PRELOAD
169 * The "return 1" forces a call of update_mmu_cache, which will write a
170 * TLB entry. Without this, platforms that don't do a write of the TLB
171 * entry in the TLB miss handler asm will fault ad infinitum.
173 ptep_set_access_flags(vma
, addr
, ptep
, pte
, dirty
);
176 return ptep_set_access_flags(vma
, addr
, ptep
, pte
, dirty
);
180 static inline pte_t
huge_ptep_get(pte_t
*ptep
)
185 static inline void arch_clear_hugepage_flags(struct page
*page
)
189 #else /* ! CONFIG_HUGETLB_PAGE */
190 static inline void flush_hugetlb_page(struct vm_area_struct
*vma
,
191 unsigned long vmaddr
)
195 #define hugepd_shift(x) 0
196 static inline pte_t
*hugepte_offset(hugepd_t hpd
, unsigned long addr
,
201 #endif /* CONFIG_HUGETLB_PAGE */
204 * FSL Book3E platforms require special gpage handling - the gpages
205 * are reserved early in the boot process by memblock instead of via
206 * the .dts as on IBM platforms.
208 #if defined(CONFIG_HUGETLB_PAGE) && defined(CONFIG_PPC_FSL_BOOK3E)
209 extern void __init
reserve_hugetlb_gpages(void);
211 static inline void reserve_hugetlb_gpages(void)
216 #endif /* _ASM_POWERPC_HUGETLB_H */