]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - arch/powerpc/include/asm/iommu.h
vfio: powerpc/spapr: powerpc/powernv/ioda: Define and implement DMA windows API
[mirror_ubuntu-zesty-kernel.git] / arch / powerpc / include / asm / iommu.h
1 /*
2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
3 * Rewrite, cleanup:
4 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #ifndef _ASM_IOMMU_H
22 #define _ASM_IOMMU_H
23 #ifdef __KERNEL__
24
25 #include <linux/compiler.h>
26 #include <linux/spinlock.h>
27 #include <linux/device.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/bitops.h>
30 #include <asm/machdep.h>
31 #include <asm/types.h>
32 #include <asm/pci-bridge.h>
33
34 #define IOMMU_PAGE_SHIFT_4K 12
35 #define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K)
36 #define IOMMU_PAGE_MASK_4K (~((1 << IOMMU_PAGE_SHIFT_4K) - 1))
37 #define IOMMU_PAGE_ALIGN_4K(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE_4K)
38
39 #define IOMMU_PAGE_SIZE(tblptr) (ASM_CONST(1) << (tblptr)->it_page_shift)
40 #define IOMMU_PAGE_MASK(tblptr) (~((1 << (tblptr)->it_page_shift) - 1))
41 #define IOMMU_PAGE_ALIGN(addr, tblptr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE(tblptr))
42
43 /* Boot time flags */
44 extern int iommu_is_off;
45 extern int iommu_force_on;
46
47 struct iommu_table_ops {
48 /*
49 * When called with direction==DMA_NONE, it is equal to clear().
50 * uaddr is a linear map address.
51 */
52 int (*set)(struct iommu_table *tbl,
53 long index, long npages,
54 unsigned long uaddr,
55 enum dma_data_direction direction,
56 struct dma_attrs *attrs);
57 #ifdef CONFIG_IOMMU_API
58 /*
59 * Exchanges existing TCE with new TCE plus direction bits;
60 * returns old TCE and DMA direction mask.
61 * @tce is a physical address.
62 */
63 int (*exchange)(struct iommu_table *tbl,
64 long index,
65 unsigned long *hpa,
66 enum dma_data_direction *direction);
67 #endif
68 void (*clear)(struct iommu_table *tbl,
69 long index, long npages);
70 /* get() returns a physical address */
71 unsigned long (*get)(struct iommu_table *tbl, long index);
72 void (*flush)(struct iommu_table *tbl);
73 void (*free)(struct iommu_table *tbl);
74 };
75
76 /* These are used by VIO */
77 extern struct iommu_table_ops iommu_table_lpar_multi_ops;
78 extern struct iommu_table_ops iommu_table_pseries_ops;
79
80 /*
81 * IOMAP_MAX_ORDER defines the largest contiguous block
82 * of dma space we can get. IOMAP_MAX_ORDER = 13
83 * allows up to 2**12 pages (4096 * 4096) = 16 MB
84 */
85 #define IOMAP_MAX_ORDER 13
86
87 #define IOMMU_POOL_HASHBITS 2
88 #define IOMMU_NR_POOLS (1 << IOMMU_POOL_HASHBITS)
89
90 struct iommu_pool {
91 unsigned long start;
92 unsigned long end;
93 unsigned long hint;
94 spinlock_t lock;
95 } ____cacheline_aligned_in_smp;
96
97 struct iommu_table {
98 unsigned long it_busno; /* Bus number this table belongs to */
99 unsigned long it_size; /* Size of iommu table in entries */
100 unsigned long it_indirect_levels;
101 unsigned long it_level_size;
102 unsigned long it_offset; /* Offset into global table */
103 unsigned long it_base; /* mapped address of tce table */
104 unsigned long it_index; /* which iommu table this is */
105 unsigned long it_type; /* type: PCI or Virtual Bus */
106 unsigned long it_blocksize; /* Entries in each block (cacheline) */
107 unsigned long poolsize;
108 unsigned long nr_pools;
109 struct iommu_pool large_pool;
110 struct iommu_pool pools[IOMMU_NR_POOLS];
111 unsigned long *it_map; /* A simple allocation bitmap for now */
112 unsigned long it_page_shift;/* table iommu page size */
113 struct list_head it_group_list;/* List of iommu_table_group_link */
114 struct iommu_table_ops *it_ops;
115 };
116
117 /* Pure 2^n version of get_order */
118 static inline __attribute_const__
119 int get_iommu_order(unsigned long size, struct iommu_table *tbl)
120 {
121 return __ilog2((size - 1) >> tbl->it_page_shift) + 1;
122 }
123
124
125 struct scatterlist;
126
127 static inline void set_iommu_table_base(struct device *dev, void *base)
128 {
129 dev->archdata.dma_data.iommu_table_base = base;
130 }
131
132 static inline void *get_iommu_table_base(struct device *dev)
133 {
134 return dev->archdata.dma_data.iommu_table_base;
135 }
136
137 /* Frees table for an individual device node */
138 extern void iommu_free_table(struct iommu_table *tbl, const char *node_name);
139
140 /* Initializes an iommu_table based in values set in the passed-in
141 * structure
142 */
143 extern struct iommu_table *iommu_init_table(struct iommu_table * tbl,
144 int nid);
145 #define IOMMU_TABLE_GROUP_MAX_TABLES 1
146
147 struct iommu_table_group;
148
149 struct iommu_table_group_ops {
150 long (*create_table)(struct iommu_table_group *table_group,
151 int num,
152 __u32 page_shift,
153 __u64 window_size,
154 __u32 levels,
155 struct iommu_table **ptbl);
156 long (*set_window)(struct iommu_table_group *table_group,
157 int num,
158 struct iommu_table *tblnew);
159 long (*unset_window)(struct iommu_table_group *table_group,
160 int num);
161 /* Switch ownership from platform code to external user (e.g. VFIO) */
162 void (*take_ownership)(struct iommu_table_group *table_group);
163 /* Switch ownership from external user (e.g. VFIO) back to core */
164 void (*release_ownership)(struct iommu_table_group *table_group);
165 };
166
167 struct iommu_table_group_link {
168 struct list_head next;
169 struct rcu_head rcu;
170 struct iommu_table_group *table_group;
171 };
172
173 struct iommu_table_group {
174 /* IOMMU properties */
175 __u32 tce32_start;
176 __u32 tce32_size;
177 __u64 pgsizes; /* Bitmap of supported page sizes */
178 __u32 max_dynamic_windows_supported;
179 __u32 max_levels;
180
181 struct iommu_group *group;
182 struct iommu_table *tables[IOMMU_TABLE_GROUP_MAX_TABLES];
183 struct iommu_table_group_ops *ops;
184 };
185
186 #ifdef CONFIG_IOMMU_API
187
188 extern void iommu_register_group(struct iommu_table_group *table_group,
189 int pci_domain_number, unsigned long pe_num);
190 extern int iommu_add_device(struct device *dev);
191 extern void iommu_del_device(struct device *dev);
192 extern int __init tce_iommu_bus_notifier_init(void);
193 extern long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry,
194 unsigned long *hpa, enum dma_data_direction *direction);
195 #else
196 static inline void iommu_register_group(struct iommu_table_group *table_group,
197 int pci_domain_number,
198 unsigned long pe_num)
199 {
200 }
201
202 static inline int iommu_add_device(struct device *dev)
203 {
204 return 0;
205 }
206
207 static inline void iommu_del_device(struct device *dev)
208 {
209 }
210
211 static inline int __init tce_iommu_bus_notifier_init(void)
212 {
213 return 0;
214 }
215 #endif /* !CONFIG_IOMMU_API */
216
217 extern int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,
218 struct scatterlist *sglist, int nelems,
219 unsigned long mask,
220 enum dma_data_direction direction,
221 struct dma_attrs *attrs);
222 extern void ppc_iommu_unmap_sg(struct iommu_table *tbl,
223 struct scatterlist *sglist,
224 int nelems,
225 enum dma_data_direction direction,
226 struct dma_attrs *attrs);
227
228 extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
229 size_t size, dma_addr_t *dma_handle,
230 unsigned long mask, gfp_t flag, int node);
231 extern void iommu_free_coherent(struct iommu_table *tbl, size_t size,
232 void *vaddr, dma_addr_t dma_handle);
233 extern dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
234 struct page *page, unsigned long offset,
235 size_t size, unsigned long mask,
236 enum dma_data_direction direction,
237 struct dma_attrs *attrs);
238 extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
239 size_t size, enum dma_data_direction direction,
240 struct dma_attrs *attrs);
241
242 extern void iommu_init_early_pSeries(void);
243 extern void iommu_init_early_dart(struct pci_controller_ops *controller_ops);
244 extern void iommu_init_early_pasemi(void);
245
246 extern void alloc_dart_table(void);
247 #if defined(CONFIG_PPC64) && defined(CONFIG_PM)
248 static inline void iommu_save(void)
249 {
250 if (ppc_md.iommu_save)
251 ppc_md.iommu_save();
252 }
253
254 static inline void iommu_restore(void)
255 {
256 if (ppc_md.iommu_restore)
257 ppc_md.iommu_restore();
258 }
259 #endif
260
261 /* The API to support IOMMU operations for VFIO */
262 extern int iommu_tce_clear_param_check(struct iommu_table *tbl,
263 unsigned long ioba, unsigned long tce_value,
264 unsigned long npages);
265 extern int iommu_tce_put_param_check(struct iommu_table *tbl,
266 unsigned long ioba, unsigned long tce);
267
268 extern void iommu_flush_tce(struct iommu_table *tbl);
269 extern int iommu_take_ownership(struct iommu_table *tbl);
270 extern void iommu_release_ownership(struct iommu_table *tbl);
271
272 extern enum dma_data_direction iommu_tce_direction(unsigned long tce);
273 extern unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir);
274
275 #endif /* __KERNEL__ */
276 #endif /* _ASM_IOMMU_H */