arch/powerpc/include/asm/paca.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * This control block defines the PACA which defines the processor
   4  * specific data for each logical processor on the system.
   5  * There are some pointers defined that are utilized by PLIC.
   6  *
   7  * C 2001 PPC 64 Team, IBM Corp
   8  */
   9 #ifndef _ASM_POWERPC_PACA_H
  10 #define _ASM_POWERPC_PACA_H
  11 #ifdef __KERNEL__
  12
  13 #ifdef CONFIG_PPC64
  14
  15 #include <linux/string.h>
  16 #include <asm/types.h>
  17 #include <asm/lppaca.h>
  18 #include <asm/mmu.h>
  19 #include <asm/page.h>
  20 #ifdef CONFIG_PPC_BOOK3E
  21 #include <asm/exception-64e.h>
  22 #else
  23 #include <asm/exception-64s.h>
  24 #endif
  25 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
  26 #include <asm/kvm_book3s_asm.h>
  27 #endif
  28 #include <asm/accounting.h>
  29 #include <asm/hmi.h>
  30 #include <asm/cpuidle.h>
  31 #include <asm/atomic.h>
  32
  33 #include <asm-generic/mmiowb_types.h>
  34
  35 register struct paca_struct *local_paca asm("r13");
  36
  37 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
  38 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
  39 /*
  40  * Add standard checks that preemption cannot occur when using get_paca():
  41  * otherwise the paca_struct it points to may be the wrong one just after.
  42  */
  43 #define get_paca()      ((void) debug_smp_processor_id(), local_paca)
  44 #else
  45 #define get_paca()      local_paca
  46 #endif
  47
  48 #ifdef CONFIG_PPC_PSERIES
  49 #define get_lppaca()    (get_paca()->lppaca_ptr)
  50 #endif
  51
  52 #define get_slb_shadow()        (get_paca()->slb_shadow_ptr)
  53
  54 struct task_struct;
  55
  56 /*
  57  * Defines the layout of the paca.
  58  *
  59  * This structure is not directly accessed by firmware or the service
  60  * processor.
  61  */
  62 struct paca_struct {
  63 #ifdef CONFIG_PPC_PSERIES
  64         /*
  65          * Because hw_cpu_id, unlike other paca fields, is accessed
  66          * routinely from other CPUs (from the IRQ code), we stick to
  67          * read-only (after boot) fields in the first cacheline to
  68          * avoid cacheline bouncing.
  69          */
  70
  71         struct lppaca *lppaca_ptr;      /* Pointer to LpPaca for PLIC */
  72 #endif /* CONFIG_PPC_PSERIES */
  73
  74         /*
  75          * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
  76          * load lock_token and paca_index with a single lwz
  77          * instruction.  They must travel together and be properly
  78          * aligned.
  79          */
  80 #ifdef __BIG_ENDIAN__
  81         u16 lock_token;                 /* Constant 0x8000, used in locks */
  82         u16 paca_index;                 /* Logical processor number */
  83 #else
  84         u16 paca_index;                 /* Logical processor number */
  85         u16 lock_token;                 /* Constant 0x8000, used in locks */
  86 #endif
  87
  88         u64 kernel_toc;                 /* Kernel TOC address */
  89         u64 kernelbase;                 /* Base address of kernel */
  90         u64 kernel_msr;                 /* MSR while running in kernel */
  91         void *emergency_sp;             /* pointer to emergency stack */
  92         u64 data_offset;                /* per cpu data offset */
  93         s16 hw_cpu_id;                  /* Physical processor number */
  94         u8 cpu_start;                   /* At startup, processor spins until */
  95                                         /* this becomes non-zero. */
  96         u8 kexec_state;         /* set when kexec down has irqs off */
  97 #ifdef CONFIG_PPC_BOOK3S_64
  98         struct slb_shadow *slb_shadow_ptr;
  99         struct dtl_entry *dispatch_log;
 100         struct dtl_entry *dispatch_log_end;
 101 #endif
 102         u64 dscr_default;               /* per-CPU default DSCR */
 103
 104 #ifdef CONFIG_PPC_BOOK3S_64
 105         /*
 106          * Now, starting in cacheline 2, the exception save areas
 107          */
 108         /* used for most interrupts/exceptions */
 109         u64 exgen[EX_SIZE] __attribute__((aligned(0x80)));
 110         u64 exslb[EX_SIZE];     /* used for SLB/segment table misses
 111                                  * on the linear mapping */
 112         /* SLB related definitions */
 113         u16 vmalloc_sllp;
 114         u8 slb_cache_ptr;
 115         u8 stab_rr;                     /* stab/slb round-robin counter */
 116 #ifdef CONFIG_DEBUG_VM
 117         u8 in_kernel_slb_handler;
 118 #endif
 119         u32 slb_used_bitmap;            /* Bitmaps for first 32 SLB entries. */
 120         u32 slb_kern_bitmap;
 121         u32 slb_cache[SLB_CACHE_ENTRIES];
 122 #endif /* CONFIG_PPC_BOOK3S_64 */
 123
 124 #ifdef CONFIG_PPC_BOOK3E
 125         u64 exgen[8] __aligned(0x40);
 126         /* Keep pgd in the same cacheline as the start of extlb */
 127         pgd_t *pgd __aligned(0x40); /* Current PGD */
 128         pgd_t *kernel_pgd;              /* Kernel PGD */
 129
 130         /* Shared by all threads of a core -- points to tcd of first thread */
 131         struct tlb_core_data *tcd_ptr;
 132
 133         /*
 134          * We can have up to 3 levels of reentrancy in the TLB miss handler,
 135          * in each of four exception levels (normal, crit, mcheck, debug).
 136          */
 137         u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
 138         u64 exmc[8];            /* used for machine checks */
 139         u64 excrit[8];          /* used for crit interrupts */
 140         u64 exdbg[8];           /* used for debug interrupts */
 141
 142         /* Kernel stack pointers for use by special exceptions */
 143         void *mc_kstack;
 144         void *crit_kstack;
 145         void *dbg_kstack;
 146
 147         struct tlb_core_data tcd;
 148 #endif /* CONFIG_PPC_BOOK3E */
 149
 150 #ifdef CONFIG_PPC_BOOK3S
 151         mm_context_id_t mm_ctx_id;
 152 #ifdef CONFIG_PPC_MM_SLICES
 153         unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE];
 154         unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
 155         unsigned long mm_ctx_slb_addr_limit;
 156 #else
 157         u16 mm_ctx_user_psize;
 158         u16 mm_ctx_sllp;
 159 #endif
 160 #endif
 161
 162         /*
 163          * then miscellaneous read-write fields
 164          */
 165         struct task_struct *__current;  /* Pointer to current */
 166         u64 kstack;                     /* Saved Kernel stack addr */
 167         u64 saved_r1;                   /* r1 save for RTAS calls or PM or EE=0 */
 168         u64 saved_msr;                  /* MSR saved here by enter_rtas */
 169 #ifdef CONFIG_PPC_BOOK3E
 170         u16 trap_save;                  /* Used when bad stack is encountered */
 171 #endif
 172         u8 irq_soft_mask;               /* mask for irq soft masking */
 173         u8 irq_happened;                /* irq happened while soft-disabled */
 174         u8 irq_work_pending;            /* IRQ_WORK interrupt while soft-disable */
 175 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 176         u8 pmcregs_in_use;              /* pseries puts this in lppaca */
 177 #endif
 178         u64 sprg_vdso;                  /* Saved user-visible sprg */
 179 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 180         u64 tm_scratch;                 /* TM scratch area for reclaim */
 181 #endif
 182
 183 #ifdef CONFIG_PPC_POWERNV
 184         /* PowerNV idle fields */
 185         /* PNV_CORE_IDLE_* bits, all siblings work on thread 0 paca */
 186         unsigned long idle_state;
 187         union {
 188                 /* P7/P8 specific fields */
 189                 struct {
 190                         /* PNV_THREAD_RUNNING/NAP/SLEEP */
 191                         u8 thread_idle_state;
 192                         /* Mask to denote subcore sibling threads */
 193                         u8 subcore_sibling_mask;
 194                 };
 195
 196                 /* P9 specific fields */
 197                 struct {
 198 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 199                         /* The PSSCR value that the kernel requested before going to stop */
 200                         u64 requested_psscr;
 201                         /* Flag to request this thread not to stop */
 202                         atomic_t dont_stop;
 203 #endif
 204                 };
 205         };
 206 #endif
 207
 208 #ifdef CONFIG_PPC_BOOK3S_64
 209         /* Non-maskable exceptions that are not performance critical */
 210         u64 exnmi[EX_SIZE];     /* used for system reset (nmi) */
 211         u64 exmc[EX_SIZE];      /* used for machine checks */
 212 #endif
 213 #ifdef CONFIG_PPC_BOOK3S_64
 214         /* Exclusive stacks for system reset and machine check exception. */
 215         void *nmi_emergency_sp;
 216         void *mc_emergency_sp;
 217
 218         u16 in_nmi;                     /* In nmi handler */
 219
 220         /*
 221          * Flag to check whether we are in machine check early handler
 222          * and already using emergency stack.
 223          */
 224         u16 in_mce;
 225         u8 hmi_event_available;         /* HMI event is available */
 226         u8 hmi_p9_special_emu;          /* HMI P9 special emulation */
 227 #endif
 228         u8 ftrace_enabled;              /* Hard disable ftrace */
 229
 230         /* Stuff for accurate time accounting */
 231         struct cpu_accounting_data accounting;
 232         u64 dtl_ridx;                   /* read index in dispatch log */
 233         struct dtl_entry *dtl_curr;     /* pointer corresponding to dtl_ridx */
 234
 235 #ifdef CONFIG_KVM_BOOK3S_HANDLER
 236 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 237         /* We use this to store guest state in */
 238         struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
 239 #endif
 240         struct kvmppc_host_state kvm_hstate;
 241 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 242         /*
 243          * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for
 244          * more details
 245          */
 246         struct sibling_subcore_state *sibling_subcore_state;
 247 #endif
 248 #endif
 249 #ifdef CONFIG_PPC_BOOK3S_64
 250         /*
 251          * rfi fallback flush must be in its own cacheline to prevent
 252          * other paca data leaking into the L1d
 253          */
 254         u64 exrfi[EX_SIZE] __aligned(0x80);
 255         void *rfi_flush_fallback_area;
 256         u64 l1d_flush_size;
 257 #endif
 258 #ifdef CONFIG_PPC_PSERIES
 259         u8 *mce_data_buf;               /* buffer to hold per cpu rtas errlog */
 260 #endif /* CONFIG_PPC_PSERIES */
 261
 262 #ifdef CONFIG_PPC_BOOK3S_64
 263         /* Capture SLB related old contents in MCE handler. */
 264         struct slb_entry *mce_faulty_slbs;
 265         u16 slb_save_cache_ptr;
 266 #endif /* CONFIG_PPC_BOOK3S_64 */
 267 #ifdef CONFIG_STACKPROTECTOR
 268         unsigned long canary;
 269 #endif
 270 #ifdef CONFIG_MMIOWB
 271         struct mmiowb_state mmiowb_state;
 272 #endif
 273 } ____cacheline_aligned;
 274
 275 extern void copy_mm_to_paca(struct mm_struct *mm);
 276 extern struct paca_struct **paca_ptrs;
 277 extern void initialise_paca(struct paca_struct *new_paca, int cpu);
 278 extern void setup_paca(struct paca_struct *new_paca);
 279 extern void allocate_paca_ptrs(void);
 280 extern void allocate_paca(int cpu);
 281 extern void free_unused_pacas(void);
 282
 283 #else /* CONFIG_PPC64 */
 284
 285 static inline void allocate_paca_ptrs(void) { };
 286 static inline void allocate_paca(int cpu) { };
 287 static inline void free_unused_pacas(void) { };
 288
 289 #endif /* CONFIG_PPC64 */
 290
 291 #endif /* __KERNEL__ */
 292 #endif /* _ASM_POWERPC_PACA_H */