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1 #ifndef _ASM_POWERPC_PROCESSOR_H
2 #define _ASM_POWERPC_PROCESSOR_H
5 * Copyright (C) 2001 PPC 64 Team, IBM Corp
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
22 #include <linux/compiler.h>
23 #include <linux/cache.h>
24 #include <asm/ptrace.h>
25 #include <asm/types.h>
27 /* We do _not_ want to define new machine types at all, those must die
28 * in favor of using the device-tree
32 /* PREP sub-platform types see residual.h for these */
33 #define _PREP_Motorola 0x01 /* motorola prep */
34 #define _PREP_Firm 0x02 /* firmworks prep */
35 #define _PREP_IBM 0x00 /* ibm prep */
36 #define _PREP_Bull 0x03 /* bull prep */
38 /* CHRP sub-platform types. These are arbitrary */
39 #define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */
40 #define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */
41 #define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */
42 #define _CHRP_briq 0x07 /* TotalImpact's briQ */
44 #if defined(__KERNEL__) && defined(CONFIG_PPC32)
46 extern int _chrp_type
;
48 #ifdef CONFIG_PPC_PREP
50 /* what kind of prep workstation we are */
51 extern int _prep_type
;
53 #endif /* CONFIG_PPC_PREP */
55 #endif /* defined(__KERNEL__) && defined(CONFIG_PPC32) */
58 * Default implementation of macro that returns current
59 * instruction pointer ("program counter").
61 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
63 /* Macros for adjusting thread priority (hardware multi-threading) */
64 #define HMT_very_low() asm volatile("or 31,31,31 # very low priority")
65 #define HMT_low() asm volatile("or 1,1,1 # low priority")
66 #define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority")
67 #define HMT_medium() asm volatile("or 2,2,2 # medium priority")
68 #define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority")
69 #define HMT_high() asm volatile("or 3,3,3 # high priority")
74 void start_thread(struct pt_regs
*regs
, unsigned long fdptr
, unsigned long sp
);
75 void release_thread(struct task_struct
*);
77 /* Prepare to copy thread state - unlazy all lazy status */
78 extern void prepare_to_copy(struct task_struct
*tsk
);
80 /* Create a new kernel thread. */
81 extern long kernel_thread(int (*fn
)(void *), void *arg
, unsigned long flags
);
83 /* Lazy FPU handling on uni-processor */
84 extern struct task_struct
*last_task_used_math
;
85 extern struct task_struct
*last_task_used_altivec
;
86 extern struct task_struct
*last_task_used_vsx
;
87 extern struct task_struct
*last_task_used_spe
;
91 #if CONFIG_TASK_SIZE > CONFIG_KERNEL_START
92 #error User TASK_SIZE overlaps with KERNEL_START address
94 #define TASK_SIZE (CONFIG_TASK_SIZE)
96 /* This decides where the kernel will search for a free chunk of vm
97 * space during mmap's.
99 #define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3)
103 /* 64-bit user address space is 44-bits (16TB user VM) */
104 #define TASK_SIZE_USER64 (0x0000100000000000UL)
107 * 32-bit user address space is 4GB - 1 page
108 * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT
110 #define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE))
112 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
113 TASK_SIZE_USER32 : TASK_SIZE_USER64)
114 #define TASK_SIZE TASK_SIZE_OF(current)
116 /* This decides where the kernel will search for a free chunk of vm
117 * space during mmap's.
119 #define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4))
120 #define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4))
122 #define TASK_UNMAPPED_BASE ((is_32bit_task()) ? \
123 TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 )
128 #define STACK_TOP_USER64 TASK_SIZE_USER64
129 #define STACK_TOP_USER32 TASK_SIZE_USER32
131 #define STACK_TOP (is_32bit_task() ? \
132 STACK_TOP_USER32 : STACK_TOP_USER64)
134 #define STACK_TOP_MAX STACK_TOP_USER64
136 #else /* __powerpc64__ */
138 #define STACK_TOP TASK_SIZE
139 #define STACK_TOP_MAX STACK_TOP
141 #endif /* __powerpc64__ */
147 #define TS_FPROFFSET 0
148 #define TS_VSRLOWOFFSET 1
149 #define TS_FPR(i) fpr[i][TS_FPROFFSET]
151 struct thread_struct
{
152 unsigned long ksp
; /* Kernel stack pointer */
153 unsigned long ksp_limit
; /* if ksp <= ksp_limit stack overflow */
156 unsigned long ksp_vsid
;
158 struct pt_regs
*regs
; /* Pointer to saved register state */
159 mm_segment_t fs
; /* for get_fs() validation */
161 /* BookE base exception scratch space; align on cacheline */
162 unsigned long normsave
[8] ____cacheline_aligned
;
165 void *pgdir
; /* root of page-table tree */
167 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
169 * The following help to manage the use of Debug Control Registers
170 * om the BookE platforms.
178 * The stored value of the DBSR register will be the value at the
179 * last debug interrupt. This register can only be read from the
180 * user (will never be written to) and has value while helping to
181 * describe the reason for the last debug trap. Torez
185 * The following will contain addresses used by debug applications
186 * to help trace and trap on particular address locations.
187 * The bits in the Debug Control Registers above help define which
188 * of the following registers will contain valid data and/or addresses.
192 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
198 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
203 /* FP and VSX 0-31 register set */
204 double fpr
[32][TS_FPRWIDTH
];
208 unsigned int val
; /* Floating point status */
210 int fpexc_mode
; /* floating-point exception mode */
211 unsigned int align_ctl
; /* alignment handling control */
213 unsigned long start_tb
; /* Start purr when proc switched in */
214 unsigned long accum_tb
; /* Total accumilated purr for process */
215 #ifdef CONFIG_HAVE_HW_BREAKPOINT
216 struct perf_event
*ptrace_bps
[HBP_NUM
];
218 * Helps identify source of single-step exception and subsequent
219 * hw-breakpoint enablement
221 struct perf_event
*last_hit_ubp
;
222 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
224 unsigned long dabr
; /* Data address breakpoint register */
225 #ifdef CONFIG_ALTIVEC
226 /* Complete AltiVec register set */
227 vector128 vr
[32] __attribute__((aligned(16)));
229 vector128 vscr
__attribute__((aligned(16)));
230 unsigned long vrsave
;
231 int used_vr
; /* set if process has used altivec */
232 #endif /* CONFIG_ALTIVEC */
235 int used_vsr
; /* set if process has used altivec */
236 #endif /* CONFIG_VSX */
238 unsigned long evr
[32]; /* upper 32-bits of SPE regs */
239 u64 acc
; /* Accumulator */
240 unsigned long spefscr
; /* SPE & eFP status */
241 int used_spe
; /* set if process has used spe */
242 #endif /* CONFIG_SPE */
243 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
244 void* kvm_shadow_vcpu
; /* KVM internal data */
245 #endif /* CONFIG_KVM_BOOK3S_32_HANDLER */
246 #if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
247 struct kvm_vcpu
*kvm_vcpu
;
255 #define ARCH_MIN_TASKALIGN 16
257 #define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)
258 #define INIT_SP_LIMIT \
259 (_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack)
262 #define SPEFSCR_INIT .spefscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE,
268 #define INIT_THREAD { \
270 .ksp_limit = INIT_SP_LIMIT, \
272 .pgdir = swapper_pg_dir, \
273 .fpexc_mode = MSR_FE0 | MSR_FE1, \
277 #define INIT_THREAD { \
279 .ksp_limit = INIT_SP_LIMIT, \
280 .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \
283 .fpscr = { .val = 0, }, \
289 * Return saved PC of a blocked thread. For now, this is the "user" PC
291 #define thread_saved_pc(tsk) \
292 ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
294 #define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.regs)
296 unsigned long get_wchan(struct task_struct
*p
);
298 #define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
299 #define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0)
301 /* Get/set floating-point exception mode */
302 #define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr))
303 #define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val))
305 extern int get_fpexc_mode(struct task_struct
*tsk
, unsigned long adr
);
306 extern int set_fpexc_mode(struct task_struct
*tsk
, unsigned int val
);
308 #define GET_ENDIAN(tsk, adr) get_endian((tsk), (adr))
309 #define SET_ENDIAN(tsk, val) set_endian((tsk), (val))
311 extern int get_endian(struct task_struct
*tsk
, unsigned long adr
);
312 extern int set_endian(struct task_struct
*tsk
, unsigned int val
);
314 #define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr))
315 #define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
317 extern int get_unalign_ctl(struct task_struct
*tsk
, unsigned long adr
);
318 extern int set_unalign_ctl(struct task_struct
*tsk
, unsigned int val
);
320 static inline unsigned int __unpack_fe01(unsigned long msr_bits
)
322 return ((msr_bits
& MSR_FE0
) >> 10) | ((msr_bits
& MSR_FE1
) >> 8);
325 static inline unsigned long __pack_fe01(unsigned int fpmode
)
327 return ((fpmode
<< 10) & MSR_FE0
) | ((fpmode
<< 8) & MSR_FE1
);
331 #define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0)
333 #define cpu_relax() barrier()
336 /* Check that a certain kernel stack pointer is valid in task_struct p */
337 int validate_sp(unsigned long sp
, struct task_struct
*p
,
338 unsigned long nbytes
);
343 #define ARCH_HAS_PREFETCH
344 #define ARCH_HAS_PREFETCHW
345 #define ARCH_HAS_SPINLOCK_PREFETCH
347 static inline void prefetch(const void *x
)
352 __asm__
__volatile__ ("dcbt 0,%0" : : "r" (x
));
355 static inline void prefetchw(const void *x
)
360 __asm__
__volatile__ ("dcbtst 0,%0" : : "r" (x
));
363 #define spin_lock_prefetch(x) prefetchw(x)
366 #define HAVE_ARCH_PICK_MMAP_LAYOUT
370 static inline unsigned long get_clean_sp(struct pt_regs
*regs
, int is_32
)
375 sp
= regs
->gpr
[1] & 0x0ffffffffUL
;
382 static inline unsigned long get_clean_sp(struct pt_regs
*regs
, int is_32
)
388 extern unsigned long cpuidle_disable
;
389 enum idle_boot_override
{IDLE_NO_OVERRIDE
= 0, IDLE_POWERSAVE_OFF
};
391 extern int powersave_nap
; /* set if nap mode can be used in idle loop */
392 void cpu_idle_wait(void);
394 #ifdef CONFIG_PSERIES_IDLE
395 extern void update_smt_snooze_delay(int snooze
);
396 extern int pseries_notify_cpuidle_add_cpu(int cpu
);
398 static inline void update_smt_snooze_delay(int snooze
) {}
399 static inline int pseries_notify_cpuidle_add_cpu(int cpu
) { return 0; }
402 extern void flush_instruction_cache(void);
403 extern void hard_reset_now(void);
404 extern void poweroff_now(void);
405 extern int fix_alignment(struct pt_regs
*);
406 extern void cvt_fd(float *from
, double *to
);
407 extern void cvt_df(double *from
, float *to
);
408 extern void _nmask_and_or_msr(unsigned long nmask
, unsigned long or_val
);
412 * We handle most unaligned accesses in hardware. On the other hand
413 * unaligned DMA can be very expensive on some ppc64 IO chips (it does
414 * powers of 2 writes until it reaches sufficient alignment).
416 * Based on this we disable the IP header alignment in network drivers.
418 #define NET_IP_ALIGN 0
421 #endif /* __KERNEL__ */
422 #endif /* __ASSEMBLY__ */
423 #endif /* _ASM_POWERPC_PROCESSOR_H */