1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * smp.h: PowerPC-specific SMP code.
5 * Original was a copy of sparc smp.h. Now heavily modified
8 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
9 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
12 #ifndef _ASM_POWERPC_SMP_H
13 #define _ASM_POWERPC_SMP_H
16 #include <linux/threads.h>
17 #include <linux/cpumask.h>
18 #include <linux/kernel.h>
19 #include <linux/irqreturn.h>
26 #include <asm/percpu.h>
28 extern int boot_cpuid
;
29 extern int spinning_secondaries
;
30 extern u32
*cpu_to_phys_id
;
32 extern void cpu_die(void);
33 extern int cpu_to_chip_id(int cpu
);
38 void (*message_pass
)(int cpu
, int msg
);
39 #ifdef CONFIG_PPC_SMP_MUXED_IPI
40 void (*cause_ipi
)(int cpu
);
42 int (*cause_nmi_ipi
)(int cpu
);
44 int (*kick_cpu
)(int nr
);
45 int (*prepare_cpu
)(int nr
);
46 void (*setup_cpu
)(int nr
);
47 void (*bringup_done
)(void);
48 void (*take_timebase
)(void);
49 void (*give_timebase
)(void);
50 int (*cpu_disable
)(void);
51 void (*cpu_die
)(unsigned int nr
);
52 int (*cpu_bootable
)(unsigned int nr
);
55 extern int smp_send_nmi_ipi(int cpu
, void (*fn
)(struct pt_regs
*), u64 delay_us
);
56 extern int smp_send_safe_nmi_ipi(int cpu
, void (*fn
)(struct pt_regs
*), u64 delay_us
);
57 extern void smp_send_debugger_break(void);
58 extern void start_secondary_resume(void);
59 extern void smp_generic_give_timebase(void);
60 extern void smp_generic_take_timebase(void);
62 DECLARE_PER_CPU(unsigned int, cpu_pvr
);
64 #ifdef CONFIG_HOTPLUG_CPU
65 int generic_cpu_disable(void);
66 void generic_cpu_die(unsigned int cpu
);
67 void generic_set_cpu_dead(unsigned int cpu
);
68 void generic_set_cpu_up(unsigned int cpu
);
69 int generic_check_cpu_restart(unsigned int cpu
);
70 int is_cpu_dead(unsigned int cpu
);
72 #define generic_set_cpu_up(i) do { } while (0)
76 #define raw_smp_processor_id() (local_paca->paca_index)
77 #define hard_smp_processor_id() (get_paca()->hw_cpu_id)
80 extern int smp_hw_index
[];
83 * This is particularly ugly: it appears we can't actually get the definition
84 * of task_struct here, but we need access to the CPU this task is running on.
85 * Instead of using task_struct we're using _TASK_CPU which is extracted from
86 * asm-offsets.h by kbuild to get the current processor ID.
88 * This also needs to be safeguarded when building asm-offsets.s because at
89 * that time _TASK_CPU is not defined yet. It could have been guarded by
90 * _TASK_CPU itself, but we want the build to fail if _TASK_CPU is missing
91 * when building something else than asm-offsets.s
93 #ifdef GENERATING_ASM_OFFSETS
94 #define raw_smp_processor_id() (0)
96 #define raw_smp_processor_id() (*(unsigned int *)((void *)current + _TASK_CPU))
98 #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
100 static inline int get_hard_smp_processor_id(int cpu
)
102 return smp_hw_index
[cpu
];
105 static inline void set_hard_smp_processor_id(int cpu
, int phys
)
107 smp_hw_index
[cpu
] = phys
;
111 DECLARE_PER_CPU(cpumask_var_t
, cpu_sibling_map
);
112 DECLARE_PER_CPU(cpumask_var_t
, cpu_l2_cache_map
);
113 DECLARE_PER_CPU(cpumask_var_t
, cpu_core_map
);
114 DECLARE_PER_CPU(cpumask_var_t
, cpu_smallcore_map
);
116 static inline struct cpumask
*cpu_sibling_mask(int cpu
)
118 return per_cpu(cpu_sibling_map
, cpu
);
121 static inline struct cpumask
*cpu_core_mask(int cpu
)
123 return per_cpu(cpu_core_map
, cpu
);
126 static inline struct cpumask
*cpu_l2_cache_mask(int cpu
)
128 return per_cpu(cpu_l2_cache_map
, cpu
);
131 static inline struct cpumask
*cpu_smallcore_mask(int cpu
)
133 return per_cpu(cpu_smallcore_map
, cpu
);
136 extern int cpu_to_core_id(int cpu
);
138 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
140 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
141 * in /proc/interrupts will be wrong!!! --Troy */
142 #define PPC_MSG_CALL_FUNCTION 0
143 #define PPC_MSG_RESCHEDULE 1
144 #define PPC_MSG_TICK_BROADCAST 2
145 #define PPC_MSG_NMI_IPI 3
147 /* This is only used by the powernv kernel */
148 #define PPC_MSG_RM_HOST_ACTION 4
150 #define NMI_IPI_ALL_OTHERS -2
152 #ifdef CONFIG_NMI_IPI
153 extern int smp_handle_nmi_ipi(struct pt_regs
*regs
);
155 static inline int smp_handle_nmi_ipi(struct pt_regs
*regs
) { return 0; }
158 /* for irq controllers that have dedicated ipis per message (4) */
159 extern int smp_request_message_ipi(int virq
, int message
);
160 extern const char *smp_ipi_name
[];
162 /* for irq controllers with only a single ipi */
163 extern void smp_muxed_ipi_message_pass(int cpu
, int msg
);
164 extern void smp_muxed_ipi_set_message(int cpu
, int msg
);
165 extern irqreturn_t
smp_ipi_demux(void);
166 extern irqreturn_t
smp_ipi_demux_relaxed(void);
168 void smp_init_pSeries(void);
169 void smp_init_cell(void);
170 void smp_setup_cpu_maps(void);
172 extern int __cpu_disable(void);
173 extern void __cpu_die(unsigned int cpu
);
177 #define hard_smp_processor_id() get_hard_smp_processor_id(0)
178 #define smp_setup_cpu_maps()
179 static inline void inhibit_secondary_onlining(void) {}
180 static inline void uninhibit_secondary_onlining(void) {}
181 static inline const struct cpumask
*cpu_sibling_mask(int cpu
)
183 return cpumask_of(cpu
);
186 static inline const struct cpumask
*cpu_smallcore_mask(int cpu
)
188 return cpumask_of(cpu
);
191 #endif /* CONFIG_SMP */
194 static inline int get_hard_smp_processor_id(int cpu
)
196 return paca_ptrs
[cpu
]->hw_cpu_id
;
199 static inline void set_hard_smp_processor_id(int cpu
, int phys
)
201 paca_ptrs
[cpu
]->hw_cpu_id
= phys
;
206 extern int boot_cpuid_phys
;
207 static inline int get_hard_smp_processor_id(int cpu
)
209 return boot_cpuid_phys
;
212 static inline void set_hard_smp_processor_id(int cpu
, int phys
)
214 boot_cpuid_phys
= phys
;
216 #endif /* !CONFIG_SMP */
217 #endif /* !CONFIG_PPC64 */
219 #if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
220 extern void smp_release_cpus(void);
222 static inline void smp_release_cpus(void) { };
225 extern int smt_enabled_at_boot
;
227 extern void smp_mpic_probe(void);
228 extern void smp_mpic_setup_cpu(int cpu
);
229 extern int smp_generic_kick_cpu(int nr
);
230 extern int smp_generic_cpu_bootable(unsigned int nr
);
233 extern void smp_generic_give_timebase(void);
234 extern void smp_generic_take_timebase(void);
236 extern struct smp_ops_t
*smp_ops
;
238 extern void arch_send_call_function_single_ipi(int cpu
);
239 extern void arch_send_call_function_ipi_mask(const struct cpumask
*mask
);
241 /* Definitions relative to the secondary CPU spin loop
242 * and entry point. Not all of them exist on both 32 and
243 * 64-bit but defining them all here doesn't harm
245 extern void generic_secondary_smp_init(void);
246 extern void generic_secondary_thread_init(void);
247 extern unsigned long __secondary_hold_spinloop
;
248 extern unsigned long __secondary_hold_acknowledge
;
249 extern char __secondary_hold
;
250 extern unsigned int booting_thread_hwid
;
252 extern void __early_start(void);
253 #endif /* __ASSEMBLY__ */
255 #endif /* __KERNEL__ */
256 #endif /* _ASM_POWERPC_SMP_H) */