]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - arch/powerpc/kernel/cputable.c
projects / mirror_ubuntu-artful-kernel.git / blob
? search:


74248ab18e9895e27d07924fca3c8f52f7733f90
[mirror_ubuntu-artful-kernel.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18 #include <linux/jump_label.h>
19
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
22 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
23 #include <asm/mmu.h>
24 #include <asm/setup.h>
25
26 struct cpu_spec* cur_cpu_spec = NULL;
27 EXPORT_SYMBOL(cur_cpu_spec);
28
29 /* The platform string corresponding to the real PVR */
30 const char *powerpc_base_platform;
31
32 /* NOTE:
33 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
34 * the responsibility of the appropriate CPU save/restore functions to
35 * eventually copy these settings over. Those save/restore aren't yet
36 * part of the cputable though. That has to be fixed for both ppc32
37 * and ppc64
38 */
39 #ifdef CONFIG_PPC32
40 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
52 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
53 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
54 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
60 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
61 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
62 #endif /* CONFIG_PPC32 */
63 #ifdef CONFIG_PPC64
64 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
65 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
66 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
67 extern void __restore_cpu_pa6t(void);
68 extern void __restore_cpu_ppc970(void);
69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70 extern void __restore_cpu_power7(void);
71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_power8(void);
73 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec);
74 extern void __restore_cpu_power9(void);
75 extern void __flush_tlb_power7(unsigned int action);
76 extern void __flush_tlb_power8(unsigned int action);
77 extern void __flush_tlb_power9(unsigned int action);
78 extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
79 extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
80 #endif /* CONFIG_PPC64 */
81 #if defined(CONFIG_E500)
82 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
83 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
84 extern void __restore_cpu_e5500(void);
85 extern void __restore_cpu_e6500(void);
86 #endif /* CONFIG_E500 */
87
88 /* This table only contains "desktop" CPUs, it need to be filled with embedded
89 * ones as well...
90 */
91 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
92 PPC_FEATURE_HAS_MMU)
93 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
94 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
95 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
97 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
99 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
101 PPC_FEATURE_TRUE_LE | \
102 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
103 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
104 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
105 PPC_FEATURE_TRUE_LE | \
106 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
107 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
108 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
109 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
110 PPC_FEATURE_TRUE_LE | \
111 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
112 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
113 PPC_FEATURE2_HTM_COMP | \
114 PPC_FEATURE2_HTM_NOSC_COMP | \
115 PPC_FEATURE2_DSCR | \
116 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
117 PPC_FEATURE2_VEC_CRYPTO)
118 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
119 PPC_FEATURE_TRUE_LE | \
120 PPC_FEATURE_HAS_ALTIVEC_COMP)
121 #define COMMON_USER_POWER9 COMMON_USER_POWER8
122 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
123 PPC_FEATURE2_ARCH_3_00 | \
124 PPC_FEATURE2_HAS_IEEE128)
125
126 #ifdef CONFIG_PPC_BOOK3E_64
127 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
128 #else
129 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
130 PPC_FEATURE_BOOKE)
131 #endif
132
133 static struct cpu_spec __initdata cpu_specs[] = {
134 #ifdef CONFIG_PPC_BOOK3S_64
135 { /* Power4 */
136 .pvr_mask = 0xffff0000,
137 .pvr_value = 0x00350000,
138 .cpu_name = "POWER4 (gp)",
139 .cpu_features = CPU_FTRS_POWER4,
140 .cpu_user_features = COMMON_USER_POWER4,
141 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
142 .icache_bsize = 128,
143 .dcache_bsize = 128,
144 .num_pmcs = 8,
145 .pmc_type = PPC_PMC_IBM,
146 .oprofile_cpu_type = "ppc64/power4",
147 .oprofile_type = PPC_OPROFILE_POWER4,
148 .platform = "power4",
149 },
150 { /* Power4+ */
151 .pvr_mask = 0xffff0000,
152 .pvr_value = 0x00380000,
153 .cpu_name = "POWER4+ (gq)",
154 .cpu_features = CPU_FTRS_POWER4,
155 .cpu_user_features = COMMON_USER_POWER4,
156 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
157 .icache_bsize = 128,
158 .dcache_bsize = 128,
159 .num_pmcs = 8,
160 .pmc_type = PPC_PMC_IBM,
161 .oprofile_cpu_type = "ppc64/power4",
162 .oprofile_type = PPC_OPROFILE_POWER4,
163 .platform = "power4",
164 },
165 { /* PPC970 */
166 .pvr_mask = 0xffff0000,
167 .pvr_value = 0x00390000,
168 .cpu_name = "PPC970",
169 .cpu_features = CPU_FTRS_PPC970,
170 .cpu_user_features = COMMON_USER_POWER4 |
171 PPC_FEATURE_HAS_ALTIVEC_COMP,
172 .mmu_features = MMU_FTRS_PPC970,
173 .icache_bsize = 128,
174 .dcache_bsize = 128,
175 .num_pmcs = 8,
176 .pmc_type = PPC_PMC_IBM,
177 .cpu_setup = __setup_cpu_ppc970,
178 .cpu_restore = __restore_cpu_ppc970,
179 .oprofile_cpu_type = "ppc64/970",
180 .oprofile_type = PPC_OPROFILE_POWER4,
181 .platform = "ppc970",
182 },
183 { /* PPC970FX */
184 .pvr_mask = 0xffff0000,
185 .pvr_value = 0x003c0000,
186 .cpu_name = "PPC970FX",
187 .cpu_features = CPU_FTRS_PPC970,
188 .cpu_user_features = COMMON_USER_POWER4 |
189 PPC_FEATURE_HAS_ALTIVEC_COMP,
190 .mmu_features = MMU_FTRS_PPC970,
191 .icache_bsize = 128,
192 .dcache_bsize = 128,
193 .num_pmcs = 8,
194 .pmc_type = PPC_PMC_IBM,
195 .cpu_setup = __setup_cpu_ppc970,
196 .cpu_restore = __restore_cpu_ppc970,
197 .oprofile_cpu_type = "ppc64/970",
198 .oprofile_type = PPC_OPROFILE_POWER4,
199 .platform = "ppc970",
200 },
201 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
202 .pvr_mask = 0xffffffff,
203 .pvr_value = 0x00440100,
204 .cpu_name = "PPC970MP",
205 .cpu_features = CPU_FTRS_PPC970,
206 .cpu_user_features = COMMON_USER_POWER4 |
207 PPC_FEATURE_HAS_ALTIVEC_COMP,
208 .mmu_features = MMU_FTRS_PPC970,
209 .icache_bsize = 128,
210 .dcache_bsize = 128,
211 .num_pmcs = 8,
212 .pmc_type = PPC_PMC_IBM,
213 .cpu_setup = __setup_cpu_ppc970,
214 .cpu_restore = __restore_cpu_ppc970,
215 .oprofile_cpu_type = "ppc64/970MP",
216 .oprofile_type = PPC_OPROFILE_POWER4,
217 .platform = "ppc970",
218 },
219 { /* PPC970MP */
220 .pvr_mask = 0xffff0000,
221 .pvr_value = 0x00440000,
222 .cpu_name = "PPC970MP",
223 .cpu_features = CPU_FTRS_PPC970,
224 .cpu_user_features = COMMON_USER_POWER4 |
225 PPC_FEATURE_HAS_ALTIVEC_COMP,
226 .mmu_features = MMU_FTRS_PPC970,
227 .icache_bsize = 128,
228 .dcache_bsize = 128,
229 .num_pmcs = 8,
230 .pmc_type = PPC_PMC_IBM,
231 .cpu_setup = __setup_cpu_ppc970MP,
232 .cpu_restore = __restore_cpu_ppc970,
233 .oprofile_cpu_type = "ppc64/970MP",
234 .oprofile_type = PPC_OPROFILE_POWER4,
235 .platform = "ppc970",
236 },
237 { /* PPC970GX */
238 .pvr_mask = 0xffff0000,
239 .pvr_value = 0x00450000,
240 .cpu_name = "PPC970GX",
241 .cpu_features = CPU_FTRS_PPC970,
242 .cpu_user_features = COMMON_USER_POWER4 |
243 PPC_FEATURE_HAS_ALTIVEC_COMP,
244 .mmu_features = MMU_FTRS_PPC970,
245 .icache_bsize = 128,
246 .dcache_bsize = 128,
247 .num_pmcs = 8,
248 .pmc_type = PPC_PMC_IBM,
249 .cpu_setup = __setup_cpu_ppc970,
250 .oprofile_cpu_type = "ppc64/970",
251 .oprofile_type = PPC_OPROFILE_POWER4,
252 .platform = "ppc970",
253 },
254 { /* Power5 GR */
255 .pvr_mask = 0xffff0000,
256 .pvr_value = 0x003a0000,
257 .cpu_name = "POWER5 (gr)",
258 .cpu_features = CPU_FTRS_POWER5,
259 .cpu_user_features = COMMON_USER_POWER5,
260 .mmu_features = MMU_FTRS_POWER5,
261 .icache_bsize = 128,
262 .dcache_bsize = 128,
263 .num_pmcs = 6,
264 .pmc_type = PPC_PMC_IBM,
265 .oprofile_cpu_type = "ppc64/power5",
266 .oprofile_type = PPC_OPROFILE_POWER4,
267 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
268 * and above but only works on POWER5 and above
269 */
270 .oprofile_mmcra_sihv = MMCRA_SIHV,
271 .oprofile_mmcra_sipr = MMCRA_SIPR,
272 .platform = "power5",
273 },
274 { /* Power5++ */
275 .pvr_mask = 0xffffff00,
276 .pvr_value = 0x003b0300,
277 .cpu_name = "POWER5+ (gs)",
278 .cpu_features = CPU_FTRS_POWER5,
279 .cpu_user_features = COMMON_USER_POWER5_PLUS,
280 .mmu_features = MMU_FTRS_POWER5,
281 .icache_bsize = 128,
282 .dcache_bsize = 128,
283 .num_pmcs = 6,
284 .oprofile_cpu_type = "ppc64/power5++",
285 .oprofile_type = PPC_OPROFILE_POWER4,
286 .oprofile_mmcra_sihv = MMCRA_SIHV,
287 .oprofile_mmcra_sipr = MMCRA_SIPR,
288 .platform = "power5+",
289 },
290 { /* Power5 GS */
291 .pvr_mask = 0xffff0000,
292 .pvr_value = 0x003b0000,
293 .cpu_name = "POWER5+ (gs)",
294 .cpu_features = CPU_FTRS_POWER5,
295 .cpu_user_features = COMMON_USER_POWER5_PLUS,
296 .mmu_features = MMU_FTRS_POWER5,
297 .icache_bsize = 128,
298 .dcache_bsize = 128,
299 .num_pmcs = 6,
300 .pmc_type = PPC_PMC_IBM,
301 .oprofile_cpu_type = "ppc64/power5+",
302 .oprofile_type = PPC_OPROFILE_POWER4,
303 .oprofile_mmcra_sihv = MMCRA_SIHV,
304 .oprofile_mmcra_sipr = MMCRA_SIPR,
305 .platform = "power5+",
306 },
307 { /* POWER6 in P5+ mode; 2.04-compliant processor */
308 .pvr_mask = 0xffffffff,
309 .pvr_value = 0x0f000001,
310 .cpu_name = "POWER5+",
311 .cpu_features = CPU_FTRS_POWER5,
312 .cpu_user_features = COMMON_USER_POWER5_PLUS,
313 .mmu_features = MMU_FTRS_POWER5,
314 .icache_bsize = 128,
315 .dcache_bsize = 128,
316 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
317 .oprofile_type = PPC_OPROFILE_POWER4,
318 .platform = "power5+",
319 },
320 { /* Power6 */
321 .pvr_mask = 0xffff0000,
322 .pvr_value = 0x003e0000,
323 .cpu_name = "POWER6 (raw)",
324 .cpu_features = CPU_FTRS_POWER6,
325 .cpu_user_features = COMMON_USER_POWER6 |
326 PPC_FEATURE_POWER6_EXT,
327 .mmu_features = MMU_FTRS_POWER6,
328 .icache_bsize = 128,
329 .dcache_bsize = 128,
330 .num_pmcs = 6,
331 .pmc_type = PPC_PMC_IBM,
332 .oprofile_cpu_type = "ppc64/power6",
333 .oprofile_type = PPC_OPROFILE_POWER4,
334 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
335 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
336 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
337 POWER6_MMCRA_OTHER,
338 .platform = "power6x",
339 },
340 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
341 .pvr_mask = 0xffffffff,
342 .pvr_value = 0x0f000002,
343 .cpu_name = "POWER6 (architected)",
344 .cpu_features = CPU_FTRS_POWER6,
345 .cpu_user_features = COMMON_USER_POWER6,
346 .mmu_features = MMU_FTRS_POWER6,
347 .icache_bsize = 128,
348 .dcache_bsize = 128,
349 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
350 .oprofile_type = PPC_OPROFILE_POWER4,
351 .platform = "power6",
352 },
353 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
354 .pvr_mask = 0xffffffff,
355 .pvr_value = 0x0f000003,
356 .cpu_name = "POWER7 (architected)",
357 .cpu_features = CPU_FTRS_POWER7,
358 .cpu_user_features = COMMON_USER_POWER7,
359 .cpu_user_features2 = COMMON_USER2_POWER7,
360 .mmu_features = MMU_FTRS_POWER7,
361 .icache_bsize = 128,
362 .dcache_bsize = 128,
363 .oprofile_type = PPC_OPROFILE_POWER4,
364 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
365 .cpu_setup = __setup_cpu_power7,
366 .cpu_restore = __restore_cpu_power7,
367 .flush_tlb = __flush_tlb_power7,
368 .machine_check_early = __machine_check_early_realmode_p7,
369 .platform = "power7",
370 },
371 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
372 .pvr_mask = 0xffffffff,
373 .pvr_value = 0x0f000004,
374 .cpu_name = "POWER8 (architected)",
375 .cpu_features = CPU_FTRS_POWER8,
376 .cpu_user_features = COMMON_USER_POWER8,
377 .cpu_user_features2 = COMMON_USER2_POWER8,
378 .mmu_features = MMU_FTRS_POWER8,
379 .icache_bsize = 128,
380 .dcache_bsize = 128,
381 .oprofile_type = PPC_OPROFILE_INVALID,
382 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
383 .cpu_setup = __setup_cpu_power8,
384 .cpu_restore = __restore_cpu_power8,
385 .flush_tlb = __flush_tlb_power8,
386 .machine_check_early = __machine_check_early_realmode_p8,
387 .platform = "power8",
388 },
389 { /* Power7 */
390 .pvr_mask = 0xffff0000,
391 .pvr_value = 0x003f0000,
392 .cpu_name = "POWER7 (raw)",
393 .cpu_features = CPU_FTRS_POWER7,
394 .cpu_user_features = COMMON_USER_POWER7,
395 .cpu_user_features2 = COMMON_USER2_POWER7,
396 .mmu_features = MMU_FTRS_POWER7,
397 .icache_bsize = 128,
398 .dcache_bsize = 128,
399 .num_pmcs = 6,
400 .pmc_type = PPC_PMC_IBM,
401 .oprofile_cpu_type = "ppc64/power7",
402 .oprofile_type = PPC_OPROFILE_POWER4,
403 .cpu_setup = __setup_cpu_power7,
404 .cpu_restore = __restore_cpu_power7,
405 .flush_tlb = __flush_tlb_power7,
406 .machine_check_early = __machine_check_early_realmode_p7,
407 .platform = "power7",
408 },
409 { /* Power7+ */
410 .pvr_mask = 0xffff0000,
411 .pvr_value = 0x004A0000,
412 .cpu_name = "POWER7+ (raw)",
413 .cpu_features = CPU_FTRS_POWER7,
414 .cpu_user_features = COMMON_USER_POWER7,
415 .cpu_user_features2 = COMMON_USER2_POWER7,
416 .mmu_features = MMU_FTRS_POWER7,
417 .icache_bsize = 128,
418 .dcache_bsize = 128,
419 .num_pmcs = 6,
420 .pmc_type = PPC_PMC_IBM,
421 .oprofile_cpu_type = "ppc64/power7",
422 .oprofile_type = PPC_OPROFILE_POWER4,
423 .cpu_setup = __setup_cpu_power7,
424 .cpu_restore = __restore_cpu_power7,
425 .flush_tlb = __flush_tlb_power7,
426 .machine_check_early = __machine_check_early_realmode_p7,
427 .platform = "power7+",
428 },
429 { /* Power8E */
430 .pvr_mask = 0xffff0000,
431 .pvr_value = 0x004b0000,
432 .cpu_name = "POWER8E (raw)",
433 .cpu_features = CPU_FTRS_POWER8E,
434 .cpu_user_features = COMMON_USER_POWER8,
435 .cpu_user_features2 = COMMON_USER2_POWER8,
436 .mmu_features = MMU_FTRS_POWER8,
437 .icache_bsize = 128,
438 .dcache_bsize = 128,
439 .num_pmcs = 6,
440 .pmc_type = PPC_PMC_IBM,
441 .oprofile_cpu_type = "ppc64/power8",
442 .oprofile_type = PPC_OPROFILE_INVALID,
443 .cpu_setup = __setup_cpu_power8,
444 .cpu_restore = __restore_cpu_power8,
445 .flush_tlb = __flush_tlb_power8,
446 .machine_check_early = __machine_check_early_realmode_p8,
447 .platform = "power8",
448 },
449 { /* Power8NVL */
450 .pvr_mask = 0xffff0000,
451 .pvr_value = 0x004c0000,
452 .cpu_name = "POWER8NVL (raw)",
453 .cpu_features = CPU_FTRS_POWER8,
454 .cpu_user_features = COMMON_USER_POWER8,
455 .cpu_user_features2 = COMMON_USER2_POWER8,
456 .mmu_features = MMU_FTRS_POWER8,
457 .icache_bsize = 128,
458 .dcache_bsize = 128,
459 .num_pmcs = 6,
460 .pmc_type = PPC_PMC_IBM,
461 .oprofile_cpu_type = "ppc64/power8",
462 .oprofile_type = PPC_OPROFILE_INVALID,
463 .cpu_setup = __setup_cpu_power8,
464 .cpu_restore = __restore_cpu_power8,
465 .flush_tlb = __flush_tlb_power8,
466 .machine_check_early = __machine_check_early_realmode_p8,
467 .platform = "power8",
468 },
469 { /* Power8 DD1: Does not support doorbell IPIs */
470 .pvr_mask = 0xffffff00,
471 .pvr_value = 0x004d0100,
472 .cpu_name = "POWER8 (raw)",
473 .cpu_features = CPU_FTRS_POWER8_DD1,
474 .cpu_user_features = COMMON_USER_POWER8,
475 .cpu_user_features2 = COMMON_USER2_POWER8,
476 .mmu_features = MMU_FTRS_POWER8,
477 .icache_bsize = 128,
478 .dcache_bsize = 128,
479 .num_pmcs = 6,
480 .pmc_type = PPC_PMC_IBM,
481 .oprofile_cpu_type = "ppc64/power8",
482 .oprofile_type = PPC_OPROFILE_INVALID,
483 .cpu_setup = __setup_cpu_power8,
484 .cpu_restore = __restore_cpu_power8,
485 .flush_tlb = __flush_tlb_power8,
486 .machine_check_early = __machine_check_early_realmode_p8,
487 .platform = "power8",
488 },
489 { /* Power8 */
490 .pvr_mask = 0xffff0000,
491 .pvr_value = 0x004d0000,
492 .cpu_name = "POWER8 (raw)",
493 .cpu_features = CPU_FTRS_POWER8,
494 .cpu_user_features = COMMON_USER_POWER8,
495 .cpu_user_features2 = COMMON_USER2_POWER8,
496 .mmu_features = MMU_FTRS_POWER8,
497 .icache_bsize = 128,
498 .dcache_bsize = 128,
499 .num_pmcs = 6,
500 .pmc_type = PPC_PMC_IBM,
501 .oprofile_cpu_type = "ppc64/power8",
502 .oprofile_type = PPC_OPROFILE_INVALID,
503 .cpu_setup = __setup_cpu_power8,
504 .cpu_restore = __restore_cpu_power8,
505 .flush_tlb = __flush_tlb_power8,
506 .machine_check_early = __machine_check_early_realmode_p8,
507 .platform = "power8",
508 },
509 { /* Power9 */
510 .pvr_mask = 0xffff0000,
511 .pvr_value = 0x004e0000,
512 .cpu_name = "POWER9 (raw)",
513 .cpu_features = CPU_FTRS_POWER9,
514 .cpu_user_features = COMMON_USER_POWER9,
515 .cpu_user_features2 = COMMON_USER2_POWER9,
516 .mmu_features = MMU_FTRS_POWER9,
517 .icache_bsize = 128,
518 .dcache_bsize = 128,
519 .num_pmcs = 6,
520 .pmc_type = PPC_PMC_IBM,
521 .oprofile_cpu_type = "ppc64/power9",
522 .oprofile_type = PPC_OPROFILE_INVALID,
523 .cpu_setup = __setup_cpu_power9,
524 .cpu_restore = __restore_cpu_power9,
525 .flush_tlb = __flush_tlb_power9,
526 .platform = "power9",
527 },
528 { /* Cell Broadband Engine */
529 .pvr_mask = 0xffff0000,
530 .pvr_value = 0x00700000,
531 .cpu_name = "Cell Broadband Engine",
532 .cpu_features = CPU_FTRS_CELL,
533 .cpu_user_features = COMMON_USER_PPC64 |
534 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
535 PPC_FEATURE_SMT,
536 .mmu_features = MMU_FTRS_CELL,
537 .icache_bsize = 128,
538 .dcache_bsize = 128,
539 .num_pmcs = 4,
540 .pmc_type = PPC_PMC_IBM,
541 .oprofile_cpu_type = "ppc64/cell-be",
542 .oprofile_type = PPC_OPROFILE_CELL,
543 .platform = "ppc-cell-be",
544 },
545 { /* PA Semi PA6T */
546 .pvr_mask = 0x7fff0000,
547 .pvr_value = 0x00900000,
548 .cpu_name = "PA6T",
549 .cpu_features = CPU_FTRS_PA6T,
550 .cpu_user_features = COMMON_USER_PA6T,
551 .mmu_features = MMU_FTRS_PA6T,
552 .icache_bsize = 64,
553 .dcache_bsize = 64,
554 .num_pmcs = 6,
555 .pmc_type = PPC_PMC_PA6T,
556 .cpu_setup = __setup_cpu_pa6t,
557 .cpu_restore = __restore_cpu_pa6t,
558 .oprofile_cpu_type = "ppc64/pa6t",
559 .oprofile_type = PPC_OPROFILE_PA6T,
560 .platform = "pa6t",
561 },
562 { /* default match */
563 .pvr_mask = 0x00000000,
564 .pvr_value = 0x00000000,
565 .cpu_name = "POWER4 (compatible)",
566 .cpu_features = CPU_FTRS_COMPATIBLE,
567 .cpu_user_features = COMMON_USER_PPC64,
568 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
569 .icache_bsize = 128,
570 .dcache_bsize = 128,
571 .num_pmcs = 6,
572 .pmc_type = PPC_PMC_IBM,
573 .platform = "power4",
574 }
575 #endif /* CONFIG_PPC_BOOK3S_64 */
576
577 #ifdef CONFIG_PPC32
578 #ifdef CONFIG_PPC_BOOK3S_32
579 { /* 601 */
580 .pvr_mask = 0xffff0000,
581 .pvr_value = 0x00010000,
582 .cpu_name = "601",
583 .cpu_features = CPU_FTRS_PPC601,
584 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
585 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
586 .mmu_features = MMU_FTR_HPTE_TABLE,
587 .icache_bsize = 32,
588 .dcache_bsize = 32,
589 .machine_check = machine_check_generic,
590 .platform = "ppc601",
591 },
592 { /* 603 */
593 .pvr_mask = 0xffff0000,
594 .pvr_value = 0x00030000,
595 .cpu_name = "603",
596 .cpu_features = CPU_FTRS_603,
597 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
598 .mmu_features = 0,
599 .icache_bsize = 32,
600 .dcache_bsize = 32,
601 .cpu_setup = __setup_cpu_603,
602 .machine_check = machine_check_generic,
603 .platform = "ppc603",
604 },
605 { /* 603e */
606 .pvr_mask = 0xffff0000,
607 .pvr_value = 0x00060000,
608 .cpu_name = "603e",
609 .cpu_features = CPU_FTRS_603,
610 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
611 .mmu_features = 0,
612 .icache_bsize = 32,
613 .dcache_bsize = 32,
614 .cpu_setup = __setup_cpu_603,
615 .machine_check = machine_check_generic,
616 .platform = "ppc603",
617 },
618 { /* 603ev */
619 .pvr_mask = 0xffff0000,
620 .pvr_value = 0x00070000,
621 .cpu_name = "603ev",
622 .cpu_features = CPU_FTRS_603,
623 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
624 .mmu_features = 0,
625 .icache_bsize = 32,
626 .dcache_bsize = 32,
627 .cpu_setup = __setup_cpu_603,
628 .machine_check = machine_check_generic,
629 .platform = "ppc603",
630 },
631 { /* 604 */
632 .pvr_mask = 0xffff0000,
633 .pvr_value = 0x00040000,
634 .cpu_name = "604",
635 .cpu_features = CPU_FTRS_604,
636 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
637 .mmu_features = MMU_FTR_HPTE_TABLE,
638 .icache_bsize = 32,
639 .dcache_bsize = 32,
640 .num_pmcs = 2,
641 .cpu_setup = __setup_cpu_604,
642 .machine_check = machine_check_generic,
643 .platform = "ppc604",
644 },
645 { /* 604e */
646 .pvr_mask = 0xfffff000,
647 .pvr_value = 0x00090000,
648 .cpu_name = "604e",
649 .cpu_features = CPU_FTRS_604,
650 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
651 .mmu_features = MMU_FTR_HPTE_TABLE,
652 .icache_bsize = 32,
653 .dcache_bsize = 32,
654 .num_pmcs = 4,
655 .cpu_setup = __setup_cpu_604,
656 .machine_check = machine_check_generic,
657 .platform = "ppc604",
658 },
659 { /* 604r */
660 .pvr_mask = 0xffff0000,
661 .pvr_value = 0x00090000,
662 .cpu_name = "604r",
663 .cpu_features = CPU_FTRS_604,
664 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
665 .mmu_features = MMU_FTR_HPTE_TABLE,
666 .icache_bsize = 32,
667 .dcache_bsize = 32,
668 .num_pmcs = 4,
669 .cpu_setup = __setup_cpu_604,
670 .machine_check = machine_check_generic,
671 .platform = "ppc604",
672 },
673 { /* 604ev */
674 .pvr_mask = 0xffff0000,
675 .pvr_value = 0x000a0000,
676 .cpu_name = "604ev",
677 .cpu_features = CPU_FTRS_604,
678 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
679 .mmu_features = MMU_FTR_HPTE_TABLE,
680 .icache_bsize = 32,
681 .dcache_bsize = 32,
682 .num_pmcs = 4,
683 .cpu_setup = __setup_cpu_604,
684 .machine_check = machine_check_generic,
685 .platform = "ppc604",
686 },
687 { /* 740/750 (0x4202, don't support TAU ?) */
688 .pvr_mask = 0xffffffff,
689 .pvr_value = 0x00084202,
690 .cpu_name = "740/750",
691 .cpu_features = CPU_FTRS_740_NOTAU,
692 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
693 .mmu_features = MMU_FTR_HPTE_TABLE,
694 .icache_bsize = 32,
695 .dcache_bsize = 32,
696 .num_pmcs = 4,
697 .cpu_setup = __setup_cpu_750,
698 .machine_check = machine_check_generic,
699 .platform = "ppc750",
700 },
701 { /* 750CX (80100 and 8010x?) */
702 .pvr_mask = 0xfffffff0,
703 .pvr_value = 0x00080100,
704 .cpu_name = "750CX",
705 .cpu_features = CPU_FTRS_750,
706 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
707 .mmu_features = MMU_FTR_HPTE_TABLE,
708 .icache_bsize = 32,
709 .dcache_bsize = 32,
710 .num_pmcs = 4,
711 .cpu_setup = __setup_cpu_750cx,
712 .machine_check = machine_check_generic,
713 .platform = "ppc750",
714 },
715 { /* 750CX (82201 and 82202) */
716 .pvr_mask = 0xfffffff0,
717 .pvr_value = 0x00082200,
718 .cpu_name = "750CX",
719 .cpu_features = CPU_FTRS_750,
720 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
721 .mmu_features = MMU_FTR_HPTE_TABLE,
722 .icache_bsize = 32,
723 .dcache_bsize = 32,
724 .num_pmcs = 4,
725 .pmc_type = PPC_PMC_IBM,
726 .cpu_setup = __setup_cpu_750cx,
727 .machine_check = machine_check_generic,
728 .platform = "ppc750",
729 },
730 { /* 750CXe (82214) */
731 .pvr_mask = 0xfffffff0,
732 .pvr_value = 0x00082210,
733 .cpu_name = "750CXe",
734 .cpu_features = CPU_FTRS_750,
735 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
736 .mmu_features = MMU_FTR_HPTE_TABLE,
737 .icache_bsize = 32,
738 .dcache_bsize = 32,
739 .num_pmcs = 4,
740 .pmc_type = PPC_PMC_IBM,
741 .cpu_setup = __setup_cpu_750cx,
742 .machine_check = machine_check_generic,
743 .platform = "ppc750",
744 },
745 { /* 750CXe "Gekko" (83214) */
746 .pvr_mask = 0xffffffff,
747 .pvr_value = 0x00083214,
748 .cpu_name = "750CXe",
749 .cpu_features = CPU_FTRS_750,
750 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
751 .mmu_features = MMU_FTR_HPTE_TABLE,
752 .icache_bsize = 32,
753 .dcache_bsize = 32,
754 .num_pmcs = 4,
755 .pmc_type = PPC_PMC_IBM,
756 .cpu_setup = __setup_cpu_750cx,
757 .machine_check = machine_check_generic,
758 .platform = "ppc750",
759 },
760 { /* 750CL (and "Broadway") */
761 .pvr_mask = 0xfffff0e0,
762 .pvr_value = 0x00087000,
763 .cpu_name = "750CL",
764 .cpu_features = CPU_FTRS_750CL,
765 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
766 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
767 .icache_bsize = 32,
768 .dcache_bsize = 32,
769 .num_pmcs = 4,
770 .pmc_type = PPC_PMC_IBM,
771 .cpu_setup = __setup_cpu_750,
772 .machine_check = machine_check_generic,
773 .platform = "ppc750",
774 .oprofile_cpu_type = "ppc/750",
775 .oprofile_type = PPC_OPROFILE_G4,
776 },
777 { /* 745/755 */
778 .pvr_mask = 0xfffff000,
779 .pvr_value = 0x00083000,
780 .cpu_name = "745/755",
781 .cpu_features = CPU_FTRS_750,
782 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
783 .mmu_features = MMU_FTR_HPTE_TABLE,
784 .icache_bsize = 32,
785 .dcache_bsize = 32,
786 .num_pmcs = 4,
787 .pmc_type = PPC_PMC_IBM,
788 .cpu_setup = __setup_cpu_750,
789 .machine_check = machine_check_generic,
790 .platform = "ppc750",
791 },
792 { /* 750FX rev 1.x */
793 .pvr_mask = 0xffffff00,
794 .pvr_value = 0x70000100,
795 .cpu_name = "750FX",
796 .cpu_features = CPU_FTRS_750FX1,
797 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
798 .mmu_features = MMU_FTR_HPTE_TABLE,
799 .icache_bsize = 32,
800 .dcache_bsize = 32,
801 .num_pmcs = 4,
802 .pmc_type = PPC_PMC_IBM,
803 .cpu_setup = __setup_cpu_750,
804 .machine_check = machine_check_generic,
805 .platform = "ppc750",
806 .oprofile_cpu_type = "ppc/750",
807 .oprofile_type = PPC_OPROFILE_G4,
808 },
809 { /* 750FX rev 2.0 must disable HID0[DPM] */
810 .pvr_mask = 0xffffffff,
811 .pvr_value = 0x70000200,
812 .cpu_name = "750FX",
813 .cpu_features = CPU_FTRS_750FX2,
814 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
815 .mmu_features = MMU_FTR_HPTE_TABLE,
816 .icache_bsize = 32,
817 .dcache_bsize = 32,
818 .num_pmcs = 4,
819 .pmc_type = PPC_PMC_IBM,
820 .cpu_setup = __setup_cpu_750,
821 .machine_check = machine_check_generic,
822 .platform = "ppc750",
823 .oprofile_cpu_type = "ppc/750",
824 .oprofile_type = PPC_OPROFILE_G4,
825 },
826 { /* 750FX (All revs except 2.0) */
827 .pvr_mask = 0xffff0000,
828 .pvr_value = 0x70000000,
829 .cpu_name = "750FX",
830 .cpu_features = CPU_FTRS_750FX,
831 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
832 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
833 .icache_bsize = 32,
834 .dcache_bsize = 32,
835 .num_pmcs = 4,
836 .pmc_type = PPC_PMC_IBM,
837 .cpu_setup = __setup_cpu_750fx,
838 .machine_check = machine_check_generic,
839 .platform = "ppc750",
840 .oprofile_cpu_type = "ppc/750",
841 .oprofile_type = PPC_OPROFILE_G4,
842 },
843 { /* 750GX */
844 .pvr_mask = 0xffff0000,
845 .pvr_value = 0x70020000,
846 .cpu_name = "750GX",
847 .cpu_features = CPU_FTRS_750GX,
848 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
849 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
850 .icache_bsize = 32,
851 .dcache_bsize = 32,
852 .num_pmcs = 4,
853 .pmc_type = PPC_PMC_IBM,
854 .cpu_setup = __setup_cpu_750fx,
855 .machine_check = machine_check_generic,
856 .platform = "ppc750",
857 .oprofile_cpu_type = "ppc/750",
858 .oprofile_type = PPC_OPROFILE_G4,
859 },
860 { /* 740/750 (L2CR bit need fixup for 740) */
861 .pvr_mask = 0xffff0000,
862 .pvr_value = 0x00080000,
863 .cpu_name = "740/750",
864 .cpu_features = CPU_FTRS_740,
865 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
866 .mmu_features = MMU_FTR_HPTE_TABLE,
867 .icache_bsize = 32,
868 .dcache_bsize = 32,
869 .num_pmcs = 4,
870 .pmc_type = PPC_PMC_IBM,
871 .cpu_setup = __setup_cpu_750,
872 .machine_check = machine_check_generic,
873 .platform = "ppc750",
874 },
875 { /* 7400 rev 1.1 ? (no TAU) */
876 .pvr_mask = 0xffffffff,
877 .pvr_value = 0x000c1101,
878 .cpu_name = "7400 (1.1)",
879 .cpu_features = CPU_FTRS_7400_NOTAU,
880 .cpu_user_features = COMMON_USER |
881 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
882 .mmu_features = MMU_FTR_HPTE_TABLE,
883 .icache_bsize = 32,
884 .dcache_bsize = 32,
885 .num_pmcs = 4,
886 .pmc_type = PPC_PMC_G4,
887 .cpu_setup = __setup_cpu_7400,
888 .machine_check = machine_check_generic,
889 .platform = "ppc7400",
890 },
891 { /* 7400 */
892 .pvr_mask = 0xffff0000,
893 .pvr_value = 0x000c0000,
894 .cpu_name = "7400",
895 .cpu_features = CPU_FTRS_7400,
896 .cpu_user_features = COMMON_USER |
897 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
898 .mmu_features = MMU_FTR_HPTE_TABLE,
899 .icache_bsize = 32,
900 .dcache_bsize = 32,
901 .num_pmcs = 4,
902 .pmc_type = PPC_PMC_G4,
903 .cpu_setup = __setup_cpu_7400,
904 .machine_check = machine_check_generic,
905 .platform = "ppc7400",
906 },
907 { /* 7410 */
908 .pvr_mask = 0xffff0000,
909 .pvr_value = 0x800c0000,
910 .cpu_name = "7410",
911 .cpu_features = CPU_FTRS_7400,
912 .cpu_user_features = COMMON_USER |
913 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
914 .mmu_features = MMU_FTR_HPTE_TABLE,
915 .icache_bsize = 32,
916 .dcache_bsize = 32,
917 .num_pmcs = 4,
918 .pmc_type = PPC_PMC_G4,
919 .cpu_setup = __setup_cpu_7410,
920 .machine_check = machine_check_generic,
921 .platform = "ppc7400",
922 },
923 { /* 7450 2.0 - no doze/nap */
924 .pvr_mask = 0xffffffff,
925 .pvr_value = 0x80000200,
926 .cpu_name = "7450",
927 .cpu_features = CPU_FTRS_7450_20,
928 .cpu_user_features = COMMON_USER |
929 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
930 .mmu_features = MMU_FTR_HPTE_TABLE,
931 .icache_bsize = 32,
932 .dcache_bsize = 32,
933 .num_pmcs = 6,
934 .pmc_type = PPC_PMC_G4,
935 .cpu_setup = __setup_cpu_745x,
936 .oprofile_cpu_type = "ppc/7450",
937 .oprofile_type = PPC_OPROFILE_G4,
938 .machine_check = machine_check_generic,
939 .platform = "ppc7450",
940 },
941 { /* 7450 2.1 */
942 .pvr_mask = 0xffffffff,
943 .pvr_value = 0x80000201,
944 .cpu_name = "7450",
945 .cpu_features = CPU_FTRS_7450_21,
946 .cpu_user_features = COMMON_USER |
947 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
948 .mmu_features = MMU_FTR_HPTE_TABLE,
949 .icache_bsize = 32,
950 .dcache_bsize = 32,
951 .num_pmcs = 6,
952 .pmc_type = PPC_PMC_G4,
953 .cpu_setup = __setup_cpu_745x,
954 .oprofile_cpu_type = "ppc/7450",
955 .oprofile_type = PPC_OPROFILE_G4,
956 .machine_check = machine_check_generic,
957 .platform = "ppc7450",
958 },
959 { /* 7450 2.3 and newer */
960 .pvr_mask = 0xffff0000,
961 .pvr_value = 0x80000000,
962 .cpu_name = "7450",
963 .cpu_features = CPU_FTRS_7450_23,
964 .cpu_user_features = COMMON_USER |
965 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
966 .mmu_features = MMU_FTR_HPTE_TABLE,
967 .icache_bsize = 32,
968 .dcache_bsize = 32,
969 .num_pmcs = 6,
970 .pmc_type = PPC_PMC_G4,
971 .cpu_setup = __setup_cpu_745x,
972 .oprofile_cpu_type = "ppc/7450",
973 .oprofile_type = PPC_OPROFILE_G4,
974 .machine_check = machine_check_generic,
975 .platform = "ppc7450",
976 },
977 { /* 7455 rev 1.x */
978 .pvr_mask = 0xffffff00,
979 .pvr_value = 0x80010100,
980 .cpu_name = "7455",
981 .cpu_features = CPU_FTRS_7455_1,
982 .cpu_user_features = COMMON_USER |
983 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
984 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
985 .icache_bsize = 32,
986 .dcache_bsize = 32,
987 .num_pmcs = 6,
988 .pmc_type = PPC_PMC_G4,
989 .cpu_setup = __setup_cpu_745x,
990 .oprofile_cpu_type = "ppc/7450",
991 .oprofile_type = PPC_OPROFILE_G4,
992 .machine_check = machine_check_generic,
993 .platform = "ppc7450",
994 },
995 { /* 7455 rev 2.0 */
996 .pvr_mask = 0xffffffff,
997 .pvr_value = 0x80010200,
998 .cpu_name = "7455",
999 .cpu_features = CPU_FTRS_7455_20,
1000 .cpu_user_features = COMMON_USER |
1001 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1002 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1003 .icache_bsize = 32,
1004 .dcache_bsize = 32,
1005 .num_pmcs = 6,
1006 .pmc_type = PPC_PMC_G4,
1007 .cpu_setup = __setup_cpu_745x,
1008 .oprofile_cpu_type = "ppc/7450",
1009 .oprofile_type = PPC_OPROFILE_G4,
1010 .machine_check = machine_check_generic,
1011 .platform = "ppc7450",
1012 },
1013 { /* 7455 others */
1014 .pvr_mask = 0xffff0000,
1015 .pvr_value = 0x80010000,
1016 .cpu_name = "7455",
1017 .cpu_features = CPU_FTRS_7455,
1018 .cpu_user_features = COMMON_USER |
1019 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1020 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1021 .icache_bsize = 32,
1022 .dcache_bsize = 32,
1023 .num_pmcs = 6,
1024 .pmc_type = PPC_PMC_G4,
1025 .cpu_setup = __setup_cpu_745x,
1026 .oprofile_cpu_type = "ppc/7450",
1027 .oprofile_type = PPC_OPROFILE_G4,
1028 .machine_check = machine_check_generic,
1029 .platform = "ppc7450",
1030 },
1031 { /* 7447/7457 Rev 1.0 */
1032 .pvr_mask = 0xffffffff,
1033 .pvr_value = 0x80020100,
1034 .cpu_name = "7447/7457",
1035 .cpu_features = CPU_FTRS_7447_10,
1036 .cpu_user_features = COMMON_USER |
1037 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1038 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1039 .icache_bsize = 32,
1040 .dcache_bsize = 32,
1041 .num_pmcs = 6,
1042 .pmc_type = PPC_PMC_G4,
1043 .cpu_setup = __setup_cpu_745x,
1044 .oprofile_cpu_type = "ppc/7450",
1045 .oprofile_type = PPC_OPROFILE_G4,
1046 .machine_check = machine_check_generic,
1047 .platform = "ppc7450",
1048 },
1049 { /* 7447/7457 Rev 1.1 */
1050 .pvr_mask = 0xffffffff,
1051 .pvr_value = 0x80020101,
1052 .cpu_name = "7447/7457",
1053 .cpu_features = CPU_FTRS_7447_10,
1054 .cpu_user_features = COMMON_USER |
1055 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1056 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1057 .icache_bsize = 32,
1058 .dcache_bsize = 32,
1059 .num_pmcs = 6,
1060 .pmc_type = PPC_PMC_G4,
1061 .cpu_setup = __setup_cpu_745x,
1062 .oprofile_cpu_type = "ppc/7450",
1063 .oprofile_type = PPC_OPROFILE_G4,
1064 .machine_check = machine_check_generic,
1065 .platform = "ppc7450",
1066 },
1067 { /* 7447/7457 Rev 1.2 and later */
1068 .pvr_mask = 0xffff0000,
1069 .pvr_value = 0x80020000,
1070 .cpu_name = "7447/7457",
1071 .cpu_features = CPU_FTRS_7447,
1072 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1073 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1074 .icache_bsize = 32,
1075 .dcache_bsize = 32,
1076 .num_pmcs = 6,
1077 .pmc_type = PPC_PMC_G4,
1078 .cpu_setup = __setup_cpu_745x,
1079 .oprofile_cpu_type = "ppc/7450",
1080 .oprofile_type = PPC_OPROFILE_G4,
1081 .machine_check = machine_check_generic,
1082 .platform = "ppc7450",
1083 },
1084 { /* 7447A */
1085 .pvr_mask = 0xffff0000,
1086 .pvr_value = 0x80030000,
1087 .cpu_name = "7447A",
1088 .cpu_features = CPU_FTRS_7447A,
1089 .cpu_user_features = COMMON_USER |
1090 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1091 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1092 .icache_bsize = 32,
1093 .dcache_bsize = 32,
1094 .num_pmcs = 6,
1095 .pmc_type = PPC_PMC_G4,
1096 .cpu_setup = __setup_cpu_745x,
1097 .oprofile_cpu_type = "ppc/7450",
1098 .oprofile_type = PPC_OPROFILE_G4,
1099 .machine_check = machine_check_generic,
1100 .platform = "ppc7450",
1101 },
1102 { /* 7448 */
1103 .pvr_mask = 0xffff0000,
1104 .pvr_value = 0x80040000,
1105 .cpu_name = "7448",
1106 .cpu_features = CPU_FTRS_7448,
1107 .cpu_user_features = COMMON_USER |
1108 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1109 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1110 .icache_bsize = 32,
1111 .dcache_bsize = 32,
1112 .num_pmcs = 6,
1113 .pmc_type = PPC_PMC_G4,
1114 .cpu_setup = __setup_cpu_745x,
1115 .oprofile_cpu_type = "ppc/7450",
1116 .oprofile_type = PPC_OPROFILE_G4,
1117 .machine_check = machine_check_generic,
1118 .platform = "ppc7450",
1119 },
1120 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1121 .pvr_mask = 0x7fff0000,
1122 .pvr_value = 0x00810000,
1123 .cpu_name = "82xx",
1124 .cpu_features = CPU_FTRS_82XX,
1125 .cpu_user_features = COMMON_USER,
1126 .mmu_features = 0,
1127 .icache_bsize = 32,
1128 .dcache_bsize = 32,
1129 .cpu_setup = __setup_cpu_603,
1130 .machine_check = machine_check_generic,
1131 .platform = "ppc603",
1132 },
1133 { /* All G2_LE (603e core, plus some) have the same pvr */
1134 .pvr_mask = 0x7fff0000,
1135 .pvr_value = 0x00820000,
1136 .cpu_name = "G2_LE",
1137 .cpu_features = CPU_FTRS_G2_LE,
1138 .cpu_user_features = COMMON_USER,
1139 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1140 .icache_bsize = 32,
1141 .dcache_bsize = 32,
1142 .cpu_setup = __setup_cpu_603,
1143 .machine_check = machine_check_generic,
1144 .platform = "ppc603",
1145 },
1146 { /* e300c1 (a 603e core, plus some) on 83xx */
1147 .pvr_mask = 0x7fff0000,
1148 .pvr_value = 0x00830000,
1149 .cpu_name = "e300c1",
1150 .cpu_features = CPU_FTRS_E300,
1151 .cpu_user_features = COMMON_USER,
1152 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1153 .icache_bsize = 32,
1154 .dcache_bsize = 32,
1155 .cpu_setup = __setup_cpu_603,
1156 .machine_check = machine_check_generic,
1157 .platform = "ppc603",
1158 },
1159 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1160 .pvr_mask = 0x7fff0000,
1161 .pvr_value = 0x00840000,
1162 .cpu_name = "e300c2",
1163 .cpu_features = CPU_FTRS_E300C2,
1164 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1165 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1166 MMU_FTR_NEED_DTLB_SW_LRU,
1167 .icache_bsize = 32,
1168 .dcache_bsize = 32,
1169 .cpu_setup = __setup_cpu_603,
1170 .machine_check = machine_check_generic,
1171 .platform = "ppc603",
1172 },
1173 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1174 .pvr_mask = 0x7fff0000,
1175 .pvr_value = 0x00850000,
1176 .cpu_name = "e300c3",
1177 .cpu_features = CPU_FTRS_E300,
1178 .cpu_user_features = COMMON_USER,
1179 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1180 MMU_FTR_NEED_DTLB_SW_LRU,
1181 .icache_bsize = 32,
1182 .dcache_bsize = 32,
1183 .cpu_setup = __setup_cpu_603,
1184 .machine_check = machine_check_generic,
1185 .num_pmcs = 4,
1186 .oprofile_cpu_type = "ppc/e300",
1187 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1188 .platform = "ppc603",
1189 },
1190 { /* e300c4 (e300c1, plus one IU) */
1191 .pvr_mask = 0x7fff0000,
1192 .pvr_value = 0x00860000,
1193 .cpu_name = "e300c4",
1194 .cpu_features = CPU_FTRS_E300,
1195 .cpu_user_features = COMMON_USER,
1196 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1197 MMU_FTR_NEED_DTLB_SW_LRU,
1198 .icache_bsize = 32,
1199 .dcache_bsize = 32,
1200 .cpu_setup = __setup_cpu_603,
1201 .machine_check = machine_check_generic,
1202 .num_pmcs = 4,
1203 .oprofile_cpu_type = "ppc/e300",
1204 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1205 .platform = "ppc603",
1206 },
1207 { /* default match, we assume split I/D cache & TB (non-601)... */
1208 .pvr_mask = 0x00000000,
1209 .pvr_value = 0x00000000,
1210 .cpu_name = "(generic PPC)",
1211 .cpu_features = CPU_FTRS_CLASSIC32,
1212 .cpu_user_features = COMMON_USER,
1213 .mmu_features = MMU_FTR_HPTE_TABLE,
1214 .icache_bsize = 32,
1215 .dcache_bsize = 32,
1216 .machine_check = machine_check_generic,
1217 .platform = "ppc603",
1218 },
1219 #endif /* CONFIG_PPC_BOOK3S_32 */
1220 #ifdef CONFIG_8xx
1221 { /* 8xx */
1222 .pvr_mask = 0xffff0000,
1223 .pvr_value = 0x00500000,
1224 .cpu_name = "8xx",
1225 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1226 * if the 8xx code is there.... */
1227 .cpu_features = CPU_FTRS_8XX,
1228 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1229 .mmu_features = MMU_FTR_TYPE_8xx,
1230 .icache_bsize = 16,
1231 .dcache_bsize = 16,
1232 .platform = "ppc823",
1233 },
1234 #endif /* CONFIG_8xx */
1235 #ifdef CONFIG_40x
1236 { /* 403GC */
1237 .pvr_mask = 0xffffff00,
1238 .pvr_value = 0x00200200,
1239 .cpu_name = "403GC",
1240 .cpu_features = CPU_FTRS_40X,
1241 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1242 .mmu_features = MMU_FTR_TYPE_40x,
1243 .icache_bsize = 16,
1244 .dcache_bsize = 16,
1245 .machine_check = machine_check_4xx,
1246 .platform = "ppc403",
1247 },
1248 { /* 403GCX */
1249 .pvr_mask = 0xffffff00,
1250 .pvr_value = 0x00201400,
1251 .cpu_name = "403GCX",
1252 .cpu_features = CPU_FTRS_40X,
1253 .cpu_user_features = PPC_FEATURE_32 |
1254 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1255 .mmu_features = MMU_FTR_TYPE_40x,
1256 .icache_bsize = 16,
1257 .dcache_bsize = 16,
1258 .machine_check = machine_check_4xx,
1259 .platform = "ppc403",
1260 },
1261 { /* 403G ?? */
1262 .pvr_mask = 0xffff0000,
1263 .pvr_value = 0x00200000,
1264 .cpu_name = "403G ??",
1265 .cpu_features = CPU_FTRS_40X,
1266 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1267 .mmu_features = MMU_FTR_TYPE_40x,
1268 .icache_bsize = 16,
1269 .dcache_bsize = 16,
1270 .machine_check = machine_check_4xx,
1271 .platform = "ppc403",
1272 },
1273 { /* 405GP */
1274 .pvr_mask = 0xffff0000,
1275 .pvr_value = 0x40110000,
1276 .cpu_name = "405GP",
1277 .cpu_features = CPU_FTRS_40X,
1278 .cpu_user_features = PPC_FEATURE_32 |
1279 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1280 .mmu_features = MMU_FTR_TYPE_40x,
1281 .icache_bsize = 32,
1282 .dcache_bsize = 32,
1283 .machine_check = machine_check_4xx,
1284 .platform = "ppc405",
1285 },
1286 { /* STB 03xxx */
1287 .pvr_mask = 0xffff0000,
1288 .pvr_value = 0x40130000,
1289 .cpu_name = "STB03xxx",
1290 .cpu_features = CPU_FTRS_40X,
1291 .cpu_user_features = PPC_FEATURE_32 |
1292 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1293 .mmu_features = MMU_FTR_TYPE_40x,
1294 .icache_bsize = 32,
1295 .dcache_bsize = 32,
1296 .machine_check = machine_check_4xx,
1297 .platform = "ppc405",
1298 },
1299 { /* STB 04xxx */
1300 .pvr_mask = 0xffff0000,
1301 .pvr_value = 0x41810000,
1302 .cpu_name = "STB04xxx",
1303 .cpu_features = CPU_FTRS_40X,
1304 .cpu_user_features = PPC_FEATURE_32 |
1305 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1306 .mmu_features = MMU_FTR_TYPE_40x,
1307 .icache_bsize = 32,
1308 .dcache_bsize = 32,
1309 .machine_check = machine_check_4xx,
1310 .platform = "ppc405",
1311 },
1312 { /* NP405L */
1313 .pvr_mask = 0xffff0000,
1314 .pvr_value = 0x41610000,
1315 .cpu_name = "NP405L",
1316 .cpu_features = CPU_FTRS_40X,
1317 .cpu_user_features = PPC_FEATURE_32 |
1318 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1319 .mmu_features = MMU_FTR_TYPE_40x,
1320 .icache_bsize = 32,
1321 .dcache_bsize = 32,
1322 .machine_check = machine_check_4xx,
1323 .platform = "ppc405",
1324 },
1325 { /* NP4GS3 */
1326 .pvr_mask = 0xffff0000,
1327 .pvr_value = 0x40B10000,
1328 .cpu_name = "NP4GS3",
1329 .cpu_features = CPU_FTRS_40X,
1330 .cpu_user_features = PPC_FEATURE_32 |
1331 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1332 .mmu_features = MMU_FTR_TYPE_40x,
1333 .icache_bsize = 32,
1334 .dcache_bsize = 32,
1335 .machine_check = machine_check_4xx,
1336 .platform = "ppc405",
1337 },
1338 { /* NP405H */
1339 .pvr_mask = 0xffff0000,
1340 .pvr_value = 0x41410000,
1341 .cpu_name = "NP405H",
1342 .cpu_features = CPU_FTRS_40X,
1343 .cpu_user_features = PPC_FEATURE_32 |
1344 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1345 .mmu_features = MMU_FTR_TYPE_40x,
1346 .icache_bsize = 32,
1347 .dcache_bsize = 32,
1348 .machine_check = machine_check_4xx,
1349 .platform = "ppc405",
1350 },
1351 { /* 405GPr */
1352 .pvr_mask = 0xffff0000,
1353 .pvr_value = 0x50910000,
1354 .cpu_name = "405GPr",
1355 .cpu_features = CPU_FTRS_40X,
1356 .cpu_user_features = PPC_FEATURE_32 |
1357 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1358 .mmu_features = MMU_FTR_TYPE_40x,
1359 .icache_bsize = 32,
1360 .dcache_bsize = 32,
1361 .machine_check = machine_check_4xx,
1362 .platform = "ppc405",
1363 },
1364 { /* STBx25xx */
1365 .pvr_mask = 0xffff0000,
1366 .pvr_value = 0x51510000,
1367 .cpu_name = "STBx25xx",
1368 .cpu_features = CPU_FTRS_40X,
1369 .cpu_user_features = PPC_FEATURE_32 |
1370 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1371 .mmu_features = MMU_FTR_TYPE_40x,
1372 .icache_bsize = 32,
1373 .dcache_bsize = 32,
1374 .machine_check = machine_check_4xx,
1375 .platform = "ppc405",
1376 },
1377 { /* 405LP */
1378 .pvr_mask = 0xffff0000,
1379 .pvr_value = 0x41F10000,
1380 .cpu_name = "405LP",
1381 .cpu_features = CPU_FTRS_40X,
1382 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1383 .mmu_features = MMU_FTR_TYPE_40x,
1384 .icache_bsize = 32,
1385 .dcache_bsize = 32,
1386 .machine_check = machine_check_4xx,
1387 .platform = "ppc405",
1388 },
1389 { /* Xilinx Virtex-II Pro */
1390 .pvr_mask = 0xfffff000,
1391 .pvr_value = 0x20010000,
1392 .cpu_name = "Virtex-II Pro",
1393 .cpu_features = CPU_FTRS_40X,
1394 .cpu_user_features = PPC_FEATURE_32 |
1395 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1396 .mmu_features = MMU_FTR_TYPE_40x,
1397 .icache_bsize = 32,
1398 .dcache_bsize = 32,
1399 .machine_check = machine_check_4xx,
1400 .platform = "ppc405",
1401 },
1402 { /* Xilinx Virtex-4 FX */
1403 .pvr_mask = 0xfffff000,
1404 .pvr_value = 0x20011000,
1405 .cpu_name = "Virtex-4 FX",
1406 .cpu_features = CPU_FTRS_40X,
1407 .cpu_user_features = PPC_FEATURE_32 |
1408 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1409 .mmu_features = MMU_FTR_TYPE_40x,
1410 .icache_bsize = 32,
1411 .dcache_bsize = 32,
1412 .machine_check = machine_check_4xx,
1413 .platform = "ppc405",
1414 },
1415 { /* 405EP */
1416 .pvr_mask = 0xffff0000,
1417 .pvr_value = 0x51210000,
1418 .cpu_name = "405EP",
1419 .cpu_features = CPU_FTRS_40X,
1420 .cpu_user_features = PPC_FEATURE_32 |
1421 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1422 .mmu_features = MMU_FTR_TYPE_40x,
1423 .icache_bsize = 32,
1424 .dcache_bsize = 32,
1425 .machine_check = machine_check_4xx,
1426 .platform = "ppc405",
1427 },
1428 { /* 405EX Rev. A/B with Security */
1429 .pvr_mask = 0xffff000f,
1430 .pvr_value = 0x12910007,
1431 .cpu_name = "405EX Rev. A/B",
1432 .cpu_features = CPU_FTRS_40X,
1433 .cpu_user_features = PPC_FEATURE_32 |
1434 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1435 .mmu_features = MMU_FTR_TYPE_40x,
1436 .icache_bsize = 32,
1437 .dcache_bsize = 32,
1438 .machine_check = machine_check_4xx,
1439 .platform = "ppc405",
1440 },
1441 { /* 405EX Rev. C without Security */
1442 .pvr_mask = 0xffff000f,
1443 .pvr_value = 0x1291000d,
1444 .cpu_name = "405EX Rev. C",
1445 .cpu_features = CPU_FTRS_40X,
1446 .cpu_user_features = PPC_FEATURE_32 |
1447 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1448 .mmu_features = MMU_FTR_TYPE_40x,
1449 .icache_bsize = 32,
1450 .dcache_bsize = 32,
1451 .machine_check = machine_check_4xx,
1452 .platform = "ppc405",
1453 },
1454 { /* 405EX Rev. C with Security */
1455 .pvr_mask = 0xffff000f,
1456 .pvr_value = 0x1291000f,
1457 .cpu_name = "405EX Rev. C",
1458 .cpu_features = CPU_FTRS_40X,
1459 .cpu_user_features = PPC_FEATURE_32 |
1460 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1461 .mmu_features = MMU_FTR_TYPE_40x,
1462 .icache_bsize = 32,
1463 .dcache_bsize = 32,
1464 .machine_check = machine_check_4xx,
1465 .platform = "ppc405",
1466 },
1467 { /* 405EX Rev. D without Security */
1468 .pvr_mask = 0xffff000f,
1469 .pvr_value = 0x12910003,
1470 .cpu_name = "405EX Rev. D",
1471 .cpu_features = CPU_FTRS_40X,
1472 .cpu_user_features = PPC_FEATURE_32 |
1473 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1474 .mmu_features = MMU_FTR_TYPE_40x,
1475 .icache_bsize = 32,
1476 .dcache_bsize = 32,
1477 .machine_check = machine_check_4xx,
1478 .platform = "ppc405",
1479 },
1480 { /* 405EX Rev. D with Security */
1481 .pvr_mask = 0xffff000f,
1482 .pvr_value = 0x12910005,
1483 .cpu_name = "405EX Rev. D",
1484 .cpu_features = CPU_FTRS_40X,
1485 .cpu_user_features = PPC_FEATURE_32 |
1486 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1487 .mmu_features = MMU_FTR_TYPE_40x,
1488 .icache_bsize = 32,
1489 .dcache_bsize = 32,
1490 .machine_check = machine_check_4xx,
1491 .platform = "ppc405",
1492 },
1493 { /* 405EXr Rev. A/B without Security */
1494 .pvr_mask = 0xffff000f,
1495 .pvr_value = 0x12910001,
1496 .cpu_name = "405EXr Rev. A/B",
1497 .cpu_features = CPU_FTRS_40X,
1498 .cpu_user_features = PPC_FEATURE_32 |
1499 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1500 .mmu_features = MMU_FTR_TYPE_40x,
1501 .icache_bsize = 32,
1502 .dcache_bsize = 32,
1503 .machine_check = machine_check_4xx,
1504 .platform = "ppc405",
1505 },
1506 { /* 405EXr Rev. C without Security */
1507 .pvr_mask = 0xffff000f,
1508 .pvr_value = 0x12910009,
1509 .cpu_name = "405EXr Rev. C",
1510 .cpu_features = CPU_FTRS_40X,
1511 .cpu_user_features = PPC_FEATURE_32 |
1512 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1513 .mmu_features = MMU_FTR_TYPE_40x,
1514 .icache_bsize = 32,
1515 .dcache_bsize = 32,
1516 .machine_check = machine_check_4xx,
1517 .platform = "ppc405",
1518 },
1519 { /* 405EXr Rev. C with Security */
1520 .pvr_mask = 0xffff000f,
1521 .pvr_value = 0x1291000b,
1522 .cpu_name = "405EXr Rev. C",
1523 .cpu_features = CPU_FTRS_40X,
1524 .cpu_user_features = PPC_FEATURE_32 |
1525 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1526 .mmu_features = MMU_FTR_TYPE_40x,
1527 .icache_bsize = 32,
1528 .dcache_bsize = 32,
1529 .machine_check = machine_check_4xx,
1530 .platform = "ppc405",
1531 },
1532 { /* 405EXr Rev. D without Security */
1533 .pvr_mask = 0xffff000f,
1534 .pvr_value = 0x12910000,
1535 .cpu_name = "405EXr Rev. D",
1536 .cpu_features = CPU_FTRS_40X,
1537 .cpu_user_features = PPC_FEATURE_32 |
1538 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1539 .mmu_features = MMU_FTR_TYPE_40x,
1540 .icache_bsize = 32,
1541 .dcache_bsize = 32,
1542 .machine_check = machine_check_4xx,
1543 .platform = "ppc405",
1544 },
1545 { /* 405EXr Rev. D with Security */
1546 .pvr_mask = 0xffff000f,
1547 .pvr_value = 0x12910002,
1548 .cpu_name = "405EXr Rev. D",
1549 .cpu_features = CPU_FTRS_40X,
1550 .cpu_user_features = PPC_FEATURE_32 |
1551 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1552 .mmu_features = MMU_FTR_TYPE_40x,
1553 .icache_bsize = 32,
1554 .dcache_bsize = 32,
1555 .machine_check = machine_check_4xx,
1556 .platform = "ppc405",
1557 },
1558 {
1559 /* 405EZ */
1560 .pvr_mask = 0xffff0000,
1561 .pvr_value = 0x41510000,
1562 .cpu_name = "405EZ",
1563 .cpu_features = CPU_FTRS_40X,
1564 .cpu_user_features = PPC_FEATURE_32 |
1565 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1566 .mmu_features = MMU_FTR_TYPE_40x,
1567 .icache_bsize = 32,
1568 .dcache_bsize = 32,
1569 .machine_check = machine_check_4xx,
1570 .platform = "ppc405",
1571 },
1572 { /* APM8018X */
1573 .pvr_mask = 0xffff0000,
1574 .pvr_value = 0x7ff11432,
1575 .cpu_name = "APM8018X",
1576 .cpu_features = CPU_FTRS_40X,
1577 .cpu_user_features = PPC_FEATURE_32 |
1578 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1579 .mmu_features = MMU_FTR_TYPE_40x,
1580 .icache_bsize = 32,
1581 .dcache_bsize = 32,
1582 .machine_check = machine_check_4xx,
1583 .platform = "ppc405",
1584 },
1585 { /* default match */
1586 .pvr_mask = 0x00000000,
1587 .pvr_value = 0x00000000,
1588 .cpu_name = "(generic 40x PPC)",
1589 .cpu_features = CPU_FTRS_40X,
1590 .cpu_user_features = PPC_FEATURE_32 |
1591 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1592 .mmu_features = MMU_FTR_TYPE_40x,
1593 .icache_bsize = 32,
1594 .dcache_bsize = 32,
1595 .machine_check = machine_check_4xx,
1596 .platform = "ppc405",
1597 }
1598
1599 #endif /* CONFIG_40x */
1600 #ifdef CONFIG_44x
1601 {
1602 .pvr_mask = 0xf0000fff,
1603 .pvr_value = 0x40000850,
1604 .cpu_name = "440GR Rev. A",
1605 .cpu_features = CPU_FTRS_44X,
1606 .cpu_user_features = COMMON_USER_BOOKE,
1607 .mmu_features = MMU_FTR_TYPE_44x,
1608 .icache_bsize = 32,
1609 .dcache_bsize = 32,
1610 .machine_check = machine_check_4xx,
1611 .platform = "ppc440",
1612 },
1613 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1614 .pvr_mask = 0xf0000fff,
1615 .pvr_value = 0x40000858,
1616 .cpu_name = "440EP Rev. A",
1617 .cpu_features = CPU_FTRS_44X,
1618 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1619 .mmu_features = MMU_FTR_TYPE_44x,
1620 .icache_bsize = 32,
1621 .dcache_bsize = 32,
1622 .cpu_setup = __setup_cpu_440ep,
1623 .machine_check = machine_check_4xx,
1624 .platform = "ppc440",
1625 },
1626 {
1627 .pvr_mask = 0xf0000fff,
1628 .pvr_value = 0x400008d3,
1629 .cpu_name = "440GR Rev. B",
1630 .cpu_features = CPU_FTRS_44X,
1631 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1632 .mmu_features = MMU_FTR_TYPE_44x,
1633 .icache_bsize = 32,
1634 .dcache_bsize = 32,
1635 .machine_check = machine_check_4xx,
1636 .platform = "ppc440",
1637 },
1638 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1639 .pvr_mask = 0xf0000ff7,
1640 .pvr_value = 0x400008d4,
1641 .cpu_name = "440EP Rev. C",
1642 .cpu_features = CPU_FTRS_44X,
1643 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1644 .mmu_features = MMU_FTR_TYPE_44x,
1645 .icache_bsize = 32,
1646 .dcache_bsize = 32,
1647 .cpu_setup = __setup_cpu_440ep,
1648 .machine_check = machine_check_4xx,
1649 .platform = "ppc440",
1650 },
1651 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1652 .pvr_mask = 0xf0000fff,
1653 .pvr_value = 0x400008db,
1654 .cpu_name = "440EP Rev. B",
1655 .cpu_features = CPU_FTRS_44X,
1656 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1657 .mmu_features = MMU_FTR_TYPE_44x,
1658 .icache_bsize = 32,
1659 .dcache_bsize = 32,
1660 .cpu_setup = __setup_cpu_440ep,
1661 .machine_check = machine_check_4xx,
1662 .platform = "ppc440",
1663 },
1664 { /* 440GRX */
1665 .pvr_mask = 0xf0000ffb,
1666 .pvr_value = 0x200008D0,
1667 .cpu_name = "440GRX",
1668 .cpu_features = CPU_FTRS_44X,
1669 .cpu_user_features = COMMON_USER_BOOKE,
1670 .mmu_features = MMU_FTR_TYPE_44x,
1671 .icache_bsize = 32,
1672 .dcache_bsize = 32,
1673 .cpu_setup = __setup_cpu_440grx,
1674 .machine_check = machine_check_440A,
1675 .platform = "ppc440",
1676 },
1677 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1678 .pvr_mask = 0xf0000ffb,
1679 .pvr_value = 0x200008D8,
1680 .cpu_name = "440EPX",
1681 .cpu_features = CPU_FTRS_44X,
1682 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1683 .mmu_features = MMU_FTR_TYPE_44x,
1684 .icache_bsize = 32,
1685 .dcache_bsize = 32,
1686 .cpu_setup = __setup_cpu_440epx,
1687 .machine_check = machine_check_440A,
1688 .platform = "ppc440",
1689 },
1690 { /* 440GP Rev. B */
1691 .pvr_mask = 0xf0000fff,
1692 .pvr_value = 0x40000440,
1693 .cpu_name = "440GP Rev. B",
1694 .cpu_features = CPU_FTRS_44X,
1695 .cpu_user_features = COMMON_USER_BOOKE,
1696 .mmu_features = MMU_FTR_TYPE_44x,
1697 .icache_bsize = 32,
1698 .dcache_bsize = 32,
1699 .machine_check = machine_check_4xx,
1700 .platform = "ppc440gp",
1701 },
1702 { /* 440GP Rev. C */
1703 .pvr_mask = 0xf0000fff,
1704 .pvr_value = 0x40000481,
1705 .cpu_name = "440GP Rev. C",
1706 .cpu_features = CPU_FTRS_44X,
1707 .cpu_user_features = COMMON_USER_BOOKE,
1708 .mmu_features = MMU_FTR_TYPE_44x,
1709 .icache_bsize = 32,
1710 .dcache_bsize = 32,
1711 .machine_check = machine_check_4xx,
1712 .platform = "ppc440gp",
1713 },
1714 { /* 440GX Rev. A */
1715 .pvr_mask = 0xf0000fff,
1716 .pvr_value = 0x50000850,
1717 .cpu_name = "440GX Rev. A",
1718 .cpu_features = CPU_FTRS_44X,
1719 .cpu_user_features = COMMON_USER_BOOKE,
1720 .mmu_features = MMU_FTR_TYPE_44x,
1721 .icache_bsize = 32,
1722 .dcache_bsize = 32,
1723 .cpu_setup = __setup_cpu_440gx,
1724 .machine_check = machine_check_440A,
1725 .platform = "ppc440",
1726 },
1727 { /* 440GX Rev. B */
1728 .pvr_mask = 0xf0000fff,
1729 .pvr_value = 0x50000851,
1730 .cpu_name = "440GX Rev. B",
1731 .cpu_features = CPU_FTRS_44X,
1732 .cpu_user_features = COMMON_USER_BOOKE,
1733 .mmu_features = MMU_FTR_TYPE_44x,
1734 .icache_bsize = 32,
1735 .dcache_bsize = 32,
1736 .cpu_setup = __setup_cpu_440gx,
1737 .machine_check = machine_check_440A,
1738 .platform = "ppc440",
1739 },
1740 { /* 440GX Rev. C */
1741 .pvr_mask = 0xf0000fff,
1742 .pvr_value = 0x50000892,
1743 .cpu_name = "440GX Rev. C",
1744 .cpu_features = CPU_FTRS_44X,
1745 .cpu_user_features = COMMON_USER_BOOKE,
1746 .mmu_features = MMU_FTR_TYPE_44x,
1747 .icache_bsize = 32,
1748 .dcache_bsize = 32,
1749 .cpu_setup = __setup_cpu_440gx,
1750 .machine_check = machine_check_440A,
1751 .platform = "ppc440",
1752 },
1753 { /* 440GX Rev. F */
1754 .pvr_mask = 0xf0000fff,
1755 .pvr_value = 0x50000894,
1756 .cpu_name = "440GX Rev. F",
1757 .cpu_features = CPU_FTRS_44X,
1758 .cpu_user_features = COMMON_USER_BOOKE,
1759 .mmu_features = MMU_FTR_TYPE_44x,
1760 .icache_bsize = 32,
1761 .dcache_bsize = 32,
1762 .cpu_setup = __setup_cpu_440gx,
1763 .machine_check = machine_check_440A,
1764 .platform = "ppc440",
1765 },
1766 { /* 440SP Rev. A */
1767 .pvr_mask = 0xfff00fff,
1768 .pvr_value = 0x53200891,
1769 .cpu_name = "440SP Rev. A",
1770 .cpu_features = CPU_FTRS_44X,
1771 .cpu_user_features = COMMON_USER_BOOKE,
1772 .mmu_features = MMU_FTR_TYPE_44x,
1773 .icache_bsize = 32,
1774 .dcache_bsize = 32,
1775 .machine_check = machine_check_4xx,
1776 .platform = "ppc440",
1777 },
1778 { /* 440SPe Rev. A */
1779 .pvr_mask = 0xfff00fff,
1780 .pvr_value = 0x53400890,
1781 .cpu_name = "440SPe Rev. A",
1782 .cpu_features = CPU_FTRS_44X,
1783 .cpu_user_features = COMMON_USER_BOOKE,
1784 .mmu_features = MMU_FTR_TYPE_44x,
1785 .icache_bsize = 32,
1786 .dcache_bsize = 32,
1787 .cpu_setup = __setup_cpu_440spe,
1788 .machine_check = machine_check_440A,
1789 .platform = "ppc440",
1790 },
1791 { /* 440SPe Rev. B */
1792 .pvr_mask = 0xfff00fff,
1793 .pvr_value = 0x53400891,
1794 .cpu_name = "440SPe Rev. B",
1795 .cpu_features = CPU_FTRS_44X,
1796 .cpu_user_features = COMMON_USER_BOOKE,
1797 .mmu_features = MMU_FTR_TYPE_44x,
1798 .icache_bsize = 32,
1799 .dcache_bsize = 32,
1800 .cpu_setup = __setup_cpu_440spe,
1801 .machine_check = machine_check_440A,
1802 .platform = "ppc440",
1803 },
1804 { /* 440 in Xilinx Virtex-5 FXT */
1805 .pvr_mask = 0xfffffff0,
1806 .pvr_value = 0x7ff21910,
1807 .cpu_name = "440 in Virtex-5 FXT",
1808 .cpu_features = CPU_FTRS_44X,
1809 .cpu_user_features = COMMON_USER_BOOKE,
1810 .mmu_features = MMU_FTR_TYPE_44x,
1811 .icache_bsize = 32,
1812 .dcache_bsize = 32,
1813 .cpu_setup = __setup_cpu_440x5,
1814 .machine_check = machine_check_440A,
1815 .platform = "ppc440",
1816 },
1817 { /* 460EX */
1818 .pvr_mask = 0xffff0006,
1819 .pvr_value = 0x13020002,
1820 .cpu_name = "460EX",
1821 .cpu_features = CPU_FTRS_440x6,
1822 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1823 .mmu_features = MMU_FTR_TYPE_44x,
1824 .icache_bsize = 32,
1825 .dcache_bsize = 32,
1826 .cpu_setup = __setup_cpu_460ex,
1827 .machine_check = machine_check_440A,
1828 .platform = "ppc440",
1829 },
1830 { /* 460EX Rev B */
1831 .pvr_mask = 0xffff0007,
1832 .pvr_value = 0x13020004,
1833 .cpu_name = "460EX Rev. B",
1834 .cpu_features = CPU_FTRS_440x6,
1835 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1836 .mmu_features = MMU_FTR_TYPE_44x,
1837 .icache_bsize = 32,
1838 .dcache_bsize = 32,
1839 .cpu_setup = __setup_cpu_460ex,
1840 .machine_check = machine_check_440A,
1841 .platform = "ppc440",
1842 },
1843 { /* 460GT */
1844 .pvr_mask = 0xffff0006,
1845 .pvr_value = 0x13020000,
1846 .cpu_name = "460GT",
1847 .cpu_features = CPU_FTRS_440x6,
1848 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1849 .mmu_features = MMU_FTR_TYPE_44x,
1850 .icache_bsize = 32,
1851 .dcache_bsize = 32,
1852 .cpu_setup = __setup_cpu_460gt,
1853 .machine_check = machine_check_440A,
1854 .platform = "ppc440",
1855 },
1856 { /* 460GT Rev B */
1857 .pvr_mask = 0xffff0007,
1858 .pvr_value = 0x13020005,
1859 .cpu_name = "460GT Rev. B",
1860 .cpu_features = CPU_FTRS_440x6,
1861 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1862 .mmu_features = MMU_FTR_TYPE_44x,
1863 .icache_bsize = 32,
1864 .dcache_bsize = 32,
1865 .cpu_setup = __setup_cpu_460gt,
1866 .machine_check = machine_check_440A,
1867 .platform = "ppc440",
1868 },
1869 { /* 460SX */
1870 .pvr_mask = 0xffffff00,
1871 .pvr_value = 0x13541800,
1872 .cpu_name = "460SX",
1873 .cpu_features = CPU_FTRS_44X,
1874 .cpu_user_features = COMMON_USER_BOOKE,
1875 .mmu_features = MMU_FTR_TYPE_44x,
1876 .icache_bsize = 32,
1877 .dcache_bsize = 32,
1878 .cpu_setup = __setup_cpu_460sx,
1879 .machine_check = machine_check_440A,
1880 .platform = "ppc440",
1881 },
1882 { /* 464 in APM821xx */
1883 .pvr_mask = 0xfffffff0,
1884 .pvr_value = 0x12C41C80,
1885 .cpu_name = "APM821XX",
1886 .cpu_features = CPU_FTRS_44X,
1887 .cpu_user_features = COMMON_USER_BOOKE |
1888 PPC_FEATURE_HAS_FPU,
1889 .mmu_features = MMU_FTR_TYPE_44x,
1890 .icache_bsize = 32,
1891 .dcache_bsize = 32,
1892 .cpu_setup = __setup_cpu_apm821xx,
1893 .machine_check = machine_check_440A,
1894 .platform = "ppc440",
1895 },
1896 { /* 476 DD2 core */
1897 .pvr_mask = 0xffffffff,
1898 .pvr_value = 0x11a52080,
1899 .cpu_name = "476",
1900 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1901 .cpu_user_features = COMMON_USER_BOOKE |
1902 PPC_FEATURE_HAS_FPU,
1903 .mmu_features = MMU_FTR_TYPE_47x |
1904 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1905 .icache_bsize = 32,
1906 .dcache_bsize = 128,
1907 .machine_check = machine_check_47x,
1908 .platform = "ppc470",
1909 },
1910 { /* 476fpe */
1911 .pvr_mask = 0xffff0000,
1912 .pvr_value = 0x7ff50000,
1913 .cpu_name = "476fpe",
1914 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1915 .cpu_user_features = COMMON_USER_BOOKE |
1916 PPC_FEATURE_HAS_FPU,
1917 .mmu_features = MMU_FTR_TYPE_47x |
1918 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1919 .icache_bsize = 32,
1920 .dcache_bsize = 128,
1921 .machine_check = machine_check_47x,
1922 .platform = "ppc470",
1923 },
1924 { /* 476 iss */
1925 .pvr_mask = 0xffff0000,
1926 .pvr_value = 0x00050000,
1927 .cpu_name = "476",
1928 .cpu_features = CPU_FTRS_47X,
1929 .cpu_user_features = COMMON_USER_BOOKE |
1930 PPC_FEATURE_HAS_FPU,
1931 .mmu_features = MMU_FTR_TYPE_47x |
1932 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1933 .icache_bsize = 32,
1934 .dcache_bsize = 128,
1935 .machine_check = machine_check_47x,
1936 .platform = "ppc470",
1937 },
1938 { /* 476 others */
1939 .pvr_mask = 0xffff0000,
1940 .pvr_value = 0x11a50000,
1941 .cpu_name = "476",
1942 .cpu_features = CPU_FTRS_47X,
1943 .cpu_user_features = COMMON_USER_BOOKE |
1944 PPC_FEATURE_HAS_FPU,
1945 .mmu_features = MMU_FTR_TYPE_47x |
1946 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1947 .icache_bsize = 32,
1948 .dcache_bsize = 128,
1949 .machine_check = machine_check_47x,
1950 .platform = "ppc470",
1951 },
1952 { /* default match */
1953 .pvr_mask = 0x00000000,
1954 .pvr_value = 0x00000000,
1955 .cpu_name = "(generic 44x PPC)",
1956 .cpu_features = CPU_FTRS_44X,
1957 .cpu_user_features = COMMON_USER_BOOKE,
1958 .mmu_features = MMU_FTR_TYPE_44x,
1959 .icache_bsize = 32,
1960 .dcache_bsize = 32,
1961 .machine_check = machine_check_4xx,
1962 .platform = "ppc440",
1963 }
1964 #endif /* CONFIG_44x */
1965 #ifdef CONFIG_E200
1966 { /* e200z5 */
1967 .pvr_mask = 0xfff00000,
1968 .pvr_value = 0x81000000,
1969 .cpu_name = "e200z5",
1970 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1971 .cpu_features = CPU_FTRS_E200,
1972 .cpu_user_features = COMMON_USER_BOOKE |
1973 PPC_FEATURE_HAS_EFP_SINGLE |
1974 PPC_FEATURE_UNIFIED_CACHE,
1975 .mmu_features = MMU_FTR_TYPE_FSL_E,
1976 .dcache_bsize = 32,
1977 .machine_check = machine_check_e200,
1978 .platform = "ppc5554",
1979 },
1980 { /* e200z6 */
1981 .pvr_mask = 0xfff00000,
1982 .pvr_value = 0x81100000,
1983 .cpu_name = "e200z6",
1984 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1985 .cpu_features = CPU_FTRS_E200,
1986 .cpu_user_features = COMMON_USER_BOOKE |
1987 PPC_FEATURE_HAS_SPE_COMP |
1988 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1989 PPC_FEATURE_UNIFIED_CACHE,
1990 .mmu_features = MMU_FTR_TYPE_FSL_E,
1991 .dcache_bsize = 32,
1992 .machine_check = machine_check_e200,
1993 .platform = "ppc5554",
1994 },
1995 { /* default match */
1996 .pvr_mask = 0x00000000,
1997 .pvr_value = 0x00000000,
1998 .cpu_name = "(generic E200 PPC)",
1999 .cpu_features = CPU_FTRS_E200,
2000 .cpu_user_features = COMMON_USER_BOOKE |
2001 PPC_FEATURE_HAS_EFP_SINGLE |
2002 PPC_FEATURE_UNIFIED_CACHE,
2003 .mmu_features = MMU_FTR_TYPE_FSL_E,
2004 .dcache_bsize = 32,
2005 .cpu_setup = __setup_cpu_e200,
2006 .machine_check = machine_check_e200,
2007 .platform = "ppc5554",
2008 }
2009 #endif /* CONFIG_E200 */
2010 #endif /* CONFIG_PPC32 */
2011 #ifdef CONFIG_E500
2012 #ifdef CONFIG_PPC32
2013 #ifndef CONFIG_PPC_E500MC
2014 { /* e500 */
2015 .pvr_mask = 0xffff0000,
2016 .pvr_value = 0x80200000,
2017 .cpu_name = "e500",
2018 .cpu_features = CPU_FTRS_E500,
2019 .cpu_user_features = COMMON_USER_BOOKE |
2020 PPC_FEATURE_HAS_SPE_COMP |
2021 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2022 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2023 .mmu_features = MMU_FTR_TYPE_FSL_E,
2024 .icache_bsize = 32,
2025 .dcache_bsize = 32,
2026 .num_pmcs = 4,
2027 .oprofile_cpu_type = "ppc/e500",
2028 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2029 .cpu_setup = __setup_cpu_e500v1,
2030 .machine_check = machine_check_e500,
2031 .platform = "ppc8540",
2032 },
2033 { /* e500v2 */
2034 .pvr_mask = 0xffff0000,
2035 .pvr_value = 0x80210000,
2036 .cpu_name = "e500v2",
2037 .cpu_features = CPU_FTRS_E500_2,
2038 .cpu_user_features = COMMON_USER_BOOKE |
2039 PPC_FEATURE_HAS_SPE_COMP |
2040 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2041 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2042 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2043 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2044 .icache_bsize = 32,
2045 .dcache_bsize = 32,
2046 .num_pmcs = 4,
2047 .oprofile_cpu_type = "ppc/e500",
2048 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2049 .cpu_setup = __setup_cpu_e500v2,
2050 .machine_check = machine_check_e500,
2051 .platform = "ppc8548",
2052 .cpu_down_flush = cpu_down_flush_e500v2,
2053 },
2054 #else
2055 { /* e500mc */
2056 .pvr_mask = 0xffff0000,
2057 .pvr_value = 0x80230000,
2058 .cpu_name = "e500mc",
2059 .cpu_features = CPU_FTRS_E500MC,
2060 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2061 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2062 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2063 MMU_FTR_USE_TLBILX,
2064 .icache_bsize = 64,
2065 .dcache_bsize = 64,
2066 .num_pmcs = 4,
2067 .oprofile_cpu_type = "ppc/e500mc",
2068 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2069 .cpu_setup = __setup_cpu_e500mc,
2070 .machine_check = machine_check_e500mc,
2071 .platform = "ppce500mc",
2072 .cpu_down_flush = cpu_down_flush_e500mc,
2073 },
2074 #endif /* CONFIG_PPC_E500MC */
2075 #endif /* CONFIG_PPC32 */
2076 #ifdef CONFIG_PPC_E500MC
2077 { /* e5500 */
2078 .pvr_mask = 0xffff0000,
2079 .pvr_value = 0x80240000,
2080 .cpu_name = "e5500",
2081 .cpu_features = CPU_FTRS_E5500,
2082 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2083 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2084 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2085 MMU_FTR_USE_TLBILX,
2086 .icache_bsize = 64,
2087 .dcache_bsize = 64,
2088 .num_pmcs = 4,
2089 .oprofile_cpu_type = "ppc/e500mc",
2090 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2091 .cpu_setup = __setup_cpu_e5500,
2092 #ifndef CONFIG_PPC32
2093 .cpu_restore = __restore_cpu_e5500,
2094 #endif
2095 .machine_check = machine_check_e500mc,
2096 .platform = "ppce5500",
2097 .cpu_down_flush = cpu_down_flush_e5500,
2098 },
2099 { /* e6500 */
2100 .pvr_mask = 0xffff0000,
2101 .pvr_value = 0x80400000,
2102 .cpu_name = "e6500",
2103 .cpu_features = CPU_FTRS_E6500,
2104 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2105 PPC_FEATURE_HAS_ALTIVEC_COMP,
2106 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2107 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2108 MMU_FTR_USE_TLBILX,
2109 .icache_bsize = 64,
2110 .dcache_bsize = 64,
2111 .num_pmcs = 6,
2112 .oprofile_cpu_type = "ppc/e6500",
2113 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2114 .cpu_setup = __setup_cpu_e6500,
2115 #ifndef CONFIG_PPC32
2116 .cpu_restore = __restore_cpu_e6500,
2117 #endif
2118 .machine_check = machine_check_e500mc,
2119 .platform = "ppce6500",
2120 .cpu_down_flush = cpu_down_flush_e6500,
2121 },
2122 #endif /* CONFIG_PPC_E500MC */
2123 #ifdef CONFIG_PPC32
2124 { /* default match */
2125 .pvr_mask = 0x00000000,
2126 .pvr_value = 0x00000000,
2127 .cpu_name = "(generic E500 PPC)",
2128 .cpu_features = CPU_FTRS_E500,
2129 .cpu_user_features = COMMON_USER_BOOKE |
2130 PPC_FEATURE_HAS_SPE_COMP |
2131 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2132 .mmu_features = MMU_FTR_TYPE_FSL_E,
2133 .icache_bsize = 32,
2134 .dcache_bsize = 32,
2135 .machine_check = machine_check_e500,
2136 .platform = "powerpc",
2137 }
2138 #endif /* CONFIG_PPC32 */
2139 #endif /* CONFIG_E500 */
2140 };
2141
2142 static struct cpu_spec the_cpu_spec;
2143
2144 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2145 struct cpu_spec *s)
2146 {
2147 struct cpu_spec *t = &the_cpu_spec;
2148 struct cpu_spec old;
2149
2150 t = PTRRELOC(t);
2151 old = *t;
2152
2153 /* Copy everything, then do fixups */
2154 *t = *s;
2155
2156 /*
2157 * If we are overriding a previous value derived from the real
2158 * PVR with a new value obtained using a logical PVR value,
2159 * don't modify the performance monitor fields.
2160 */
2161 if (old.num_pmcs && !s->num_pmcs) {
2162 t->num_pmcs = old.num_pmcs;
2163 t->pmc_type = old.pmc_type;
2164 t->oprofile_type = old.oprofile_type;
2165 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2166 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2167 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2168
2169 /*
2170 * If we have passed through this logic once before and
2171 * have pulled the default case because the real PVR was
2172 * not found inside cpu_specs[], then we are possibly
2173 * running in compatibility mode. In that case, let the
2174 * oprofiler know which set of compatibility counters to
2175 * pull from by making sure the oprofile_cpu_type string
2176 * is set to that of compatibility mode. If the
2177 * oprofile_cpu_type already has a value, then we are
2178 * possibly overriding a real PVR with a logical one,
2179 * and, in that case, keep the current value for
2180 * oprofile_cpu_type.
2181 */
2182 if (old.oprofile_cpu_type != NULL) {
2183 t->oprofile_cpu_type = old.oprofile_cpu_type;
2184 t->oprofile_type = old.oprofile_type;
2185 }
2186 }
2187
2188 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2189
2190 /*
2191 * Set the base platform string once; assumes
2192 * we're called with real pvr first.
2193 */
2194 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2195 *PTRRELOC(&powerpc_base_platform) = t->platform;
2196
2197 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2198 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2199 * that processor. I will consolidate that at a later time, for now,
2200 * just use #ifdef. We also don't need to PTRRELOC the function
2201 * pointer on ppc64 and booke as we are running at 0 in real mode
2202 * on ppc64 and reloc_offset is always 0 on booke.
2203 */
2204 if (t->cpu_setup) {
2205 t->cpu_setup(offset, t);
2206 }
2207 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2208
2209 return t;
2210 }
2211
2212 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2213 {
2214 struct cpu_spec *s = cpu_specs;
2215 int i;
2216
2217 s = PTRRELOC(s);
2218
2219 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2220 if ((pvr & s->pvr_mask) == s->pvr_value)
2221 return setup_cpu_spec(offset, s);
2222 }
2223
2224 BUG();
2225
2226 return NULL;
2227 }
2228
2229 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
2230 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
2231 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2232 };
2233 EXPORT_SYMBOL_GPL(cpu_feature_keys);
2234
2235 void __init cpu_feature_keys_init(void)
2236 {
2237 int i;
2238
2239 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
2240 unsigned long f = 1ul << i;
2241
2242 if (!(cur_cpu_spec->cpu_features & f))
2243 static_branch_disable(&cpu_feature_keys[i]);
2244 }
2245 }
2246
2247 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
2248 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2249 };
2250 EXPORT_SYMBOL_GPL(mmu_feature_keys);
2251
2252 void __init mmu_feature_keys_init(void)
2253 {
2254 int i;
2255
2256 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
2257 unsigned long f = 1ul << i;
2258
2259 if (!(cur_cpu_spec->mmu_features & f))
2260 static_branch_disable(&mmu_feature_keys[i]);
2261 }
2262 }
2263 #endif
Ubuntu Artful kernel mirror