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powerpc32: memset: only use dcbz once cache is enabled
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1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23 #include <asm/setup.h>
24
25 struct cpu_spec* cur_cpu_spec = NULL;
26 EXPORT_SYMBOL(cur_cpu_spec);
27
28 /* The platform string corresponding to the real PVR */
29 const char *powerpc_base_platform;
30
31 /* NOTE:
32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
33 * the responsibility of the appropriate CPU save/restore functions to
34 * eventually copy these settings over. Those save/restore aren't yet
35 * part of the cputable though. That has to be fixed for both ppc32
36 * and ppc64
37 */
38 #ifdef CONFIG_PPC32
39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
61 #endif /* CONFIG_PPC32 */
62 #ifdef CONFIG_PPC64
63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
66 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
67 extern void __restore_cpu_pa6t(void);
68 extern void __restore_cpu_ppc970(void);
69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70 extern void __restore_cpu_power7(void);
71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_power8(void);
73 extern void __restore_cpu_a2(void);
74 extern void __flush_tlb_power7(unsigned int action);
75 extern void __flush_tlb_power8(unsigned int action);
76 extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
77 extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
78 #endif /* CONFIG_PPC64 */
79 #if defined(CONFIG_E500)
80 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
81 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
82 extern void __restore_cpu_e5500(void);
83 extern void __restore_cpu_e6500(void);
84 #endif /* CONFIG_E500 */
85
86 /* This table only contains "desktop" CPUs, it need to be filled with embedded
87 * ones as well...
88 */
89 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
90 PPC_FEATURE_HAS_MMU)
91 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
92 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
93 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
95 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
97 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
99 PPC_FEATURE_TRUE_LE | \
100 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
101 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
102 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
103 PPC_FEATURE_TRUE_LE | \
104 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
105 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
106 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
107 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
108 PPC_FEATURE_TRUE_LE | \
109 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
110 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
111 PPC_FEATURE2_HTM_COMP | \
112 PPC_FEATURE2_HTM_NOSC_COMP | \
113 PPC_FEATURE2_DSCR | \
114 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
115 PPC_FEATURE2_VEC_CRYPTO)
116 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
117 PPC_FEATURE_TRUE_LE | \
118 PPC_FEATURE_HAS_ALTIVEC_COMP)
119 #ifdef CONFIG_PPC_BOOK3E_64
120 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
121 #else
122 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
123 PPC_FEATURE_BOOKE)
124 #endif
125
126 static struct cpu_spec __initdata cpu_specs[] = {
127 #ifdef CONFIG_PPC_BOOK3S_64
128 { /* Power4 */
129 .pvr_mask = 0xffff0000,
130 .pvr_value = 0x00350000,
131 .cpu_name = "POWER4 (gp)",
132 .cpu_features = CPU_FTRS_POWER4,
133 .cpu_user_features = COMMON_USER_POWER4,
134 .mmu_features = MMU_FTRS_POWER4,
135 .icache_bsize = 128,
136 .dcache_bsize = 128,
137 .num_pmcs = 8,
138 .pmc_type = PPC_PMC_IBM,
139 .oprofile_cpu_type = "ppc64/power4",
140 .oprofile_type = PPC_OPROFILE_POWER4,
141 .platform = "power4",
142 },
143 { /* Power4+ */
144 .pvr_mask = 0xffff0000,
145 .pvr_value = 0x00380000,
146 .cpu_name = "POWER4+ (gq)",
147 .cpu_features = CPU_FTRS_POWER4,
148 .cpu_user_features = COMMON_USER_POWER4,
149 .mmu_features = MMU_FTRS_POWER4,
150 .icache_bsize = 128,
151 .dcache_bsize = 128,
152 .num_pmcs = 8,
153 .pmc_type = PPC_PMC_IBM,
154 .oprofile_cpu_type = "ppc64/power4",
155 .oprofile_type = PPC_OPROFILE_POWER4,
156 .platform = "power4",
157 },
158 { /* PPC970 */
159 .pvr_mask = 0xffff0000,
160 .pvr_value = 0x00390000,
161 .cpu_name = "PPC970",
162 .cpu_features = CPU_FTRS_PPC970,
163 .cpu_user_features = COMMON_USER_POWER4 |
164 PPC_FEATURE_HAS_ALTIVEC_COMP,
165 .mmu_features = MMU_FTRS_PPC970,
166 .icache_bsize = 128,
167 .dcache_bsize = 128,
168 .num_pmcs = 8,
169 .pmc_type = PPC_PMC_IBM,
170 .cpu_setup = __setup_cpu_ppc970,
171 .cpu_restore = __restore_cpu_ppc970,
172 .oprofile_cpu_type = "ppc64/970",
173 .oprofile_type = PPC_OPROFILE_POWER4,
174 .platform = "ppc970",
175 },
176 { /* PPC970FX */
177 .pvr_mask = 0xffff0000,
178 .pvr_value = 0x003c0000,
179 .cpu_name = "PPC970FX",
180 .cpu_features = CPU_FTRS_PPC970,
181 .cpu_user_features = COMMON_USER_POWER4 |
182 PPC_FEATURE_HAS_ALTIVEC_COMP,
183 .mmu_features = MMU_FTRS_PPC970,
184 .icache_bsize = 128,
185 .dcache_bsize = 128,
186 .num_pmcs = 8,
187 .pmc_type = PPC_PMC_IBM,
188 .cpu_setup = __setup_cpu_ppc970,
189 .cpu_restore = __restore_cpu_ppc970,
190 .oprofile_cpu_type = "ppc64/970",
191 .oprofile_type = PPC_OPROFILE_POWER4,
192 .platform = "ppc970",
193 },
194 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
195 .pvr_mask = 0xffffffff,
196 .pvr_value = 0x00440100,
197 .cpu_name = "PPC970MP",
198 .cpu_features = CPU_FTRS_PPC970,
199 .cpu_user_features = COMMON_USER_POWER4 |
200 PPC_FEATURE_HAS_ALTIVEC_COMP,
201 .mmu_features = MMU_FTRS_PPC970,
202 .icache_bsize = 128,
203 .dcache_bsize = 128,
204 .num_pmcs = 8,
205 .pmc_type = PPC_PMC_IBM,
206 .cpu_setup = __setup_cpu_ppc970,
207 .cpu_restore = __restore_cpu_ppc970,
208 .oprofile_cpu_type = "ppc64/970MP",
209 .oprofile_type = PPC_OPROFILE_POWER4,
210 .platform = "ppc970",
211 },
212 { /* PPC970MP */
213 .pvr_mask = 0xffff0000,
214 .pvr_value = 0x00440000,
215 .cpu_name = "PPC970MP",
216 .cpu_features = CPU_FTRS_PPC970,
217 .cpu_user_features = COMMON_USER_POWER4 |
218 PPC_FEATURE_HAS_ALTIVEC_COMP,
219 .mmu_features = MMU_FTRS_PPC970,
220 .icache_bsize = 128,
221 .dcache_bsize = 128,
222 .num_pmcs = 8,
223 .pmc_type = PPC_PMC_IBM,
224 .cpu_setup = __setup_cpu_ppc970MP,
225 .cpu_restore = __restore_cpu_ppc970,
226 .oprofile_cpu_type = "ppc64/970MP",
227 .oprofile_type = PPC_OPROFILE_POWER4,
228 .platform = "ppc970",
229 },
230 { /* PPC970GX */
231 .pvr_mask = 0xffff0000,
232 .pvr_value = 0x00450000,
233 .cpu_name = "PPC970GX",
234 .cpu_features = CPU_FTRS_PPC970,
235 .cpu_user_features = COMMON_USER_POWER4 |
236 PPC_FEATURE_HAS_ALTIVEC_COMP,
237 .mmu_features = MMU_FTRS_PPC970,
238 .icache_bsize = 128,
239 .dcache_bsize = 128,
240 .num_pmcs = 8,
241 .pmc_type = PPC_PMC_IBM,
242 .cpu_setup = __setup_cpu_ppc970,
243 .oprofile_cpu_type = "ppc64/970",
244 .oprofile_type = PPC_OPROFILE_POWER4,
245 .platform = "ppc970",
246 },
247 { /* Power5 GR */
248 .pvr_mask = 0xffff0000,
249 .pvr_value = 0x003a0000,
250 .cpu_name = "POWER5 (gr)",
251 .cpu_features = CPU_FTRS_POWER5,
252 .cpu_user_features = COMMON_USER_POWER5,
253 .mmu_features = MMU_FTRS_POWER5,
254 .icache_bsize = 128,
255 .dcache_bsize = 128,
256 .num_pmcs = 6,
257 .pmc_type = PPC_PMC_IBM,
258 .oprofile_cpu_type = "ppc64/power5",
259 .oprofile_type = PPC_OPROFILE_POWER4,
260 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
261 * and above but only works on POWER5 and above
262 */
263 .oprofile_mmcra_sihv = MMCRA_SIHV,
264 .oprofile_mmcra_sipr = MMCRA_SIPR,
265 .platform = "power5",
266 },
267 { /* Power5++ */
268 .pvr_mask = 0xffffff00,
269 .pvr_value = 0x003b0300,
270 .cpu_name = "POWER5+ (gs)",
271 .cpu_features = CPU_FTRS_POWER5,
272 .cpu_user_features = COMMON_USER_POWER5_PLUS,
273 .mmu_features = MMU_FTRS_POWER5,
274 .icache_bsize = 128,
275 .dcache_bsize = 128,
276 .num_pmcs = 6,
277 .oprofile_cpu_type = "ppc64/power5++",
278 .oprofile_type = PPC_OPROFILE_POWER4,
279 .oprofile_mmcra_sihv = MMCRA_SIHV,
280 .oprofile_mmcra_sipr = MMCRA_SIPR,
281 .platform = "power5+",
282 },
283 { /* Power5 GS */
284 .pvr_mask = 0xffff0000,
285 .pvr_value = 0x003b0000,
286 .cpu_name = "POWER5+ (gs)",
287 .cpu_features = CPU_FTRS_POWER5,
288 .cpu_user_features = COMMON_USER_POWER5_PLUS,
289 .mmu_features = MMU_FTRS_POWER5,
290 .icache_bsize = 128,
291 .dcache_bsize = 128,
292 .num_pmcs = 6,
293 .pmc_type = PPC_PMC_IBM,
294 .oprofile_cpu_type = "ppc64/power5+",
295 .oprofile_type = PPC_OPROFILE_POWER4,
296 .oprofile_mmcra_sihv = MMCRA_SIHV,
297 .oprofile_mmcra_sipr = MMCRA_SIPR,
298 .platform = "power5+",
299 },
300 { /* POWER6 in P5+ mode; 2.04-compliant processor */
301 .pvr_mask = 0xffffffff,
302 .pvr_value = 0x0f000001,
303 .cpu_name = "POWER5+",
304 .cpu_features = CPU_FTRS_POWER5,
305 .cpu_user_features = COMMON_USER_POWER5_PLUS,
306 .mmu_features = MMU_FTRS_POWER5,
307 .icache_bsize = 128,
308 .dcache_bsize = 128,
309 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
310 .oprofile_type = PPC_OPROFILE_POWER4,
311 .platform = "power5+",
312 },
313 { /* Power6 */
314 .pvr_mask = 0xffff0000,
315 .pvr_value = 0x003e0000,
316 .cpu_name = "POWER6 (raw)",
317 .cpu_features = CPU_FTRS_POWER6,
318 .cpu_user_features = COMMON_USER_POWER6 |
319 PPC_FEATURE_POWER6_EXT,
320 .mmu_features = MMU_FTRS_POWER6,
321 .icache_bsize = 128,
322 .dcache_bsize = 128,
323 .num_pmcs = 6,
324 .pmc_type = PPC_PMC_IBM,
325 .oprofile_cpu_type = "ppc64/power6",
326 .oprofile_type = PPC_OPROFILE_POWER4,
327 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
328 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
329 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
330 POWER6_MMCRA_OTHER,
331 .platform = "power6x",
332 },
333 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
334 .pvr_mask = 0xffffffff,
335 .pvr_value = 0x0f000002,
336 .cpu_name = "POWER6 (architected)",
337 .cpu_features = CPU_FTRS_POWER6,
338 .cpu_user_features = COMMON_USER_POWER6,
339 .mmu_features = MMU_FTRS_POWER6,
340 .icache_bsize = 128,
341 .dcache_bsize = 128,
342 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
343 .oprofile_type = PPC_OPROFILE_POWER4,
344 .platform = "power6",
345 },
346 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
347 .pvr_mask = 0xffffffff,
348 .pvr_value = 0x0f000003,
349 .cpu_name = "POWER7 (architected)",
350 .cpu_features = CPU_FTRS_POWER7,
351 .cpu_user_features = COMMON_USER_POWER7,
352 .cpu_user_features2 = COMMON_USER2_POWER7,
353 .mmu_features = MMU_FTRS_POWER7,
354 .icache_bsize = 128,
355 .dcache_bsize = 128,
356 .oprofile_type = PPC_OPROFILE_POWER4,
357 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
358 .cpu_setup = __setup_cpu_power7,
359 .cpu_restore = __restore_cpu_power7,
360 .flush_tlb = __flush_tlb_power7,
361 .machine_check_early = __machine_check_early_realmode_p7,
362 .platform = "power7",
363 },
364 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
365 .pvr_mask = 0xffffffff,
366 .pvr_value = 0x0f000004,
367 .cpu_name = "POWER8 (architected)",
368 .cpu_features = CPU_FTRS_POWER8,
369 .cpu_user_features = COMMON_USER_POWER8,
370 .cpu_user_features2 = COMMON_USER2_POWER8,
371 .mmu_features = MMU_FTRS_POWER8,
372 .icache_bsize = 128,
373 .dcache_bsize = 128,
374 .oprofile_type = PPC_OPROFILE_INVALID,
375 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
376 .cpu_setup = __setup_cpu_power8,
377 .cpu_restore = __restore_cpu_power8,
378 .flush_tlb = __flush_tlb_power8,
379 .machine_check_early = __machine_check_early_realmode_p8,
380 .platform = "power8",
381 },
382 { /* Power7 */
383 .pvr_mask = 0xffff0000,
384 .pvr_value = 0x003f0000,
385 .cpu_name = "POWER7 (raw)",
386 .cpu_features = CPU_FTRS_POWER7,
387 .cpu_user_features = COMMON_USER_POWER7,
388 .cpu_user_features2 = COMMON_USER2_POWER7,
389 .mmu_features = MMU_FTRS_POWER7,
390 .icache_bsize = 128,
391 .dcache_bsize = 128,
392 .num_pmcs = 6,
393 .pmc_type = PPC_PMC_IBM,
394 .oprofile_cpu_type = "ppc64/power7",
395 .oprofile_type = PPC_OPROFILE_POWER4,
396 .cpu_setup = __setup_cpu_power7,
397 .cpu_restore = __restore_cpu_power7,
398 .flush_tlb = __flush_tlb_power7,
399 .machine_check_early = __machine_check_early_realmode_p7,
400 .platform = "power7",
401 },
402 { /* Power7+ */
403 .pvr_mask = 0xffff0000,
404 .pvr_value = 0x004A0000,
405 .cpu_name = "POWER7+ (raw)",
406 .cpu_features = CPU_FTRS_POWER7,
407 .cpu_user_features = COMMON_USER_POWER7,
408 .cpu_user_features2 = COMMON_USER2_POWER7,
409 .mmu_features = MMU_FTRS_POWER7,
410 .icache_bsize = 128,
411 .dcache_bsize = 128,
412 .num_pmcs = 6,
413 .pmc_type = PPC_PMC_IBM,
414 .oprofile_cpu_type = "ppc64/power7",
415 .oprofile_type = PPC_OPROFILE_POWER4,
416 .cpu_setup = __setup_cpu_power7,
417 .cpu_restore = __restore_cpu_power7,
418 .flush_tlb = __flush_tlb_power7,
419 .machine_check_early = __machine_check_early_realmode_p7,
420 .platform = "power7+",
421 },
422 { /* Power8E */
423 .pvr_mask = 0xffff0000,
424 .pvr_value = 0x004b0000,
425 .cpu_name = "POWER8E (raw)",
426 .cpu_features = CPU_FTRS_POWER8E,
427 .cpu_user_features = COMMON_USER_POWER8,
428 .cpu_user_features2 = COMMON_USER2_POWER8,
429 .mmu_features = MMU_FTRS_POWER8,
430 .icache_bsize = 128,
431 .dcache_bsize = 128,
432 .num_pmcs = 6,
433 .pmc_type = PPC_PMC_IBM,
434 .oprofile_cpu_type = "ppc64/power8",
435 .oprofile_type = PPC_OPROFILE_INVALID,
436 .cpu_setup = __setup_cpu_power8,
437 .cpu_restore = __restore_cpu_power8,
438 .flush_tlb = __flush_tlb_power8,
439 .machine_check_early = __machine_check_early_realmode_p8,
440 .platform = "power8",
441 },
442 { /* Power8NVL */
443 .pvr_mask = 0xffff0000,
444 .pvr_value = 0x004c0000,
445 .cpu_name = "POWER8NVL (raw)",
446 .cpu_features = CPU_FTRS_POWER8,
447 .cpu_user_features = COMMON_USER_POWER8,
448 .cpu_user_features2 = COMMON_USER2_POWER8,
449 .mmu_features = MMU_FTRS_POWER8,
450 .icache_bsize = 128,
451 .dcache_bsize = 128,
452 .num_pmcs = 6,
453 .pmc_type = PPC_PMC_IBM,
454 .oprofile_cpu_type = "ppc64/power8",
455 .oprofile_type = PPC_OPROFILE_INVALID,
456 .cpu_setup = __setup_cpu_power8,
457 .cpu_restore = __restore_cpu_power8,
458 .flush_tlb = __flush_tlb_power8,
459 .machine_check_early = __machine_check_early_realmode_p8,
460 .platform = "power8",
461 },
462 { /* Power8 DD1: Does not support doorbell IPIs */
463 .pvr_mask = 0xffffff00,
464 .pvr_value = 0x004d0100,
465 .cpu_name = "POWER8 (raw)",
466 .cpu_features = CPU_FTRS_POWER8_DD1,
467 .cpu_user_features = COMMON_USER_POWER8,
468 .cpu_user_features2 = COMMON_USER2_POWER8,
469 .mmu_features = MMU_FTRS_POWER8,
470 .icache_bsize = 128,
471 .dcache_bsize = 128,
472 .num_pmcs = 6,
473 .pmc_type = PPC_PMC_IBM,
474 .oprofile_cpu_type = "ppc64/power8",
475 .oprofile_type = PPC_OPROFILE_INVALID,
476 .cpu_setup = __setup_cpu_power8,
477 .cpu_restore = __restore_cpu_power8,
478 .flush_tlb = __flush_tlb_power8,
479 .machine_check_early = __machine_check_early_realmode_p8,
480 .platform = "power8",
481 },
482 { /* Power8 */
483 .pvr_mask = 0xffff0000,
484 .pvr_value = 0x004d0000,
485 .cpu_name = "POWER8 (raw)",
486 .cpu_features = CPU_FTRS_POWER8,
487 .cpu_user_features = COMMON_USER_POWER8,
488 .cpu_user_features2 = COMMON_USER2_POWER8,
489 .mmu_features = MMU_FTRS_POWER8,
490 .icache_bsize = 128,
491 .dcache_bsize = 128,
492 .num_pmcs = 6,
493 .pmc_type = PPC_PMC_IBM,
494 .oprofile_cpu_type = "ppc64/power8",
495 .oprofile_type = PPC_OPROFILE_INVALID,
496 .cpu_setup = __setup_cpu_power8,
497 .cpu_restore = __restore_cpu_power8,
498 .flush_tlb = __flush_tlb_power8,
499 .machine_check_early = __machine_check_early_realmode_p8,
500 .platform = "power8",
501 },
502 { /* Cell Broadband Engine */
503 .pvr_mask = 0xffff0000,
504 .pvr_value = 0x00700000,
505 .cpu_name = "Cell Broadband Engine",
506 .cpu_features = CPU_FTRS_CELL,
507 .cpu_user_features = COMMON_USER_PPC64 |
508 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
509 PPC_FEATURE_SMT,
510 .mmu_features = MMU_FTRS_CELL,
511 .icache_bsize = 128,
512 .dcache_bsize = 128,
513 .num_pmcs = 4,
514 .pmc_type = PPC_PMC_IBM,
515 .oprofile_cpu_type = "ppc64/cell-be",
516 .oprofile_type = PPC_OPROFILE_CELL,
517 .platform = "ppc-cell-be",
518 },
519 { /* PA Semi PA6T */
520 .pvr_mask = 0x7fff0000,
521 .pvr_value = 0x00900000,
522 .cpu_name = "PA6T",
523 .cpu_features = CPU_FTRS_PA6T,
524 .cpu_user_features = COMMON_USER_PA6T,
525 .mmu_features = MMU_FTRS_PA6T,
526 .icache_bsize = 64,
527 .dcache_bsize = 64,
528 .num_pmcs = 6,
529 .pmc_type = PPC_PMC_PA6T,
530 .cpu_setup = __setup_cpu_pa6t,
531 .cpu_restore = __restore_cpu_pa6t,
532 .oprofile_cpu_type = "ppc64/pa6t",
533 .oprofile_type = PPC_OPROFILE_PA6T,
534 .platform = "pa6t",
535 },
536 { /* default match */
537 .pvr_mask = 0x00000000,
538 .pvr_value = 0x00000000,
539 .cpu_name = "POWER4 (compatible)",
540 .cpu_features = CPU_FTRS_COMPATIBLE,
541 .cpu_user_features = COMMON_USER_PPC64,
542 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
543 .icache_bsize = 128,
544 .dcache_bsize = 128,
545 .num_pmcs = 6,
546 .pmc_type = PPC_PMC_IBM,
547 .platform = "power4",
548 }
549 #endif /* CONFIG_PPC_BOOK3S_64 */
550
551 #ifdef CONFIG_PPC32
552 #ifdef CONFIG_PPC_BOOK3S_32
553 { /* 601 */
554 .pvr_mask = 0xffff0000,
555 .pvr_value = 0x00010000,
556 .cpu_name = "601",
557 .cpu_features = CPU_FTRS_PPC601,
558 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
559 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
560 .mmu_features = MMU_FTR_HPTE_TABLE,
561 .icache_bsize = 32,
562 .dcache_bsize = 32,
563 .machine_check = machine_check_generic,
564 .platform = "ppc601",
565 },
566 { /* 603 */
567 .pvr_mask = 0xffff0000,
568 .pvr_value = 0x00030000,
569 .cpu_name = "603",
570 .cpu_features = CPU_FTRS_603,
571 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
572 .mmu_features = 0,
573 .icache_bsize = 32,
574 .dcache_bsize = 32,
575 .cpu_setup = __setup_cpu_603,
576 .machine_check = machine_check_generic,
577 .platform = "ppc603",
578 },
579 { /* 603e */
580 .pvr_mask = 0xffff0000,
581 .pvr_value = 0x00060000,
582 .cpu_name = "603e",
583 .cpu_features = CPU_FTRS_603,
584 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
585 .mmu_features = 0,
586 .icache_bsize = 32,
587 .dcache_bsize = 32,
588 .cpu_setup = __setup_cpu_603,
589 .machine_check = machine_check_generic,
590 .platform = "ppc603",
591 },
592 { /* 603ev */
593 .pvr_mask = 0xffff0000,
594 .pvr_value = 0x00070000,
595 .cpu_name = "603ev",
596 .cpu_features = CPU_FTRS_603,
597 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
598 .mmu_features = 0,
599 .icache_bsize = 32,
600 .dcache_bsize = 32,
601 .cpu_setup = __setup_cpu_603,
602 .machine_check = machine_check_generic,
603 .platform = "ppc603",
604 },
605 { /* 604 */
606 .pvr_mask = 0xffff0000,
607 .pvr_value = 0x00040000,
608 .cpu_name = "604",
609 .cpu_features = CPU_FTRS_604,
610 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
611 .mmu_features = MMU_FTR_HPTE_TABLE,
612 .icache_bsize = 32,
613 .dcache_bsize = 32,
614 .num_pmcs = 2,
615 .cpu_setup = __setup_cpu_604,
616 .machine_check = machine_check_generic,
617 .platform = "ppc604",
618 },
619 { /* 604e */
620 .pvr_mask = 0xfffff000,
621 .pvr_value = 0x00090000,
622 .cpu_name = "604e",
623 .cpu_features = CPU_FTRS_604,
624 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
625 .mmu_features = MMU_FTR_HPTE_TABLE,
626 .icache_bsize = 32,
627 .dcache_bsize = 32,
628 .num_pmcs = 4,
629 .cpu_setup = __setup_cpu_604,
630 .machine_check = machine_check_generic,
631 .platform = "ppc604",
632 },
633 { /* 604r */
634 .pvr_mask = 0xffff0000,
635 .pvr_value = 0x00090000,
636 .cpu_name = "604r",
637 .cpu_features = CPU_FTRS_604,
638 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
639 .mmu_features = MMU_FTR_HPTE_TABLE,
640 .icache_bsize = 32,
641 .dcache_bsize = 32,
642 .num_pmcs = 4,
643 .cpu_setup = __setup_cpu_604,
644 .machine_check = machine_check_generic,
645 .platform = "ppc604",
646 },
647 { /* 604ev */
648 .pvr_mask = 0xffff0000,
649 .pvr_value = 0x000a0000,
650 .cpu_name = "604ev",
651 .cpu_features = CPU_FTRS_604,
652 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
653 .mmu_features = MMU_FTR_HPTE_TABLE,
654 .icache_bsize = 32,
655 .dcache_bsize = 32,
656 .num_pmcs = 4,
657 .cpu_setup = __setup_cpu_604,
658 .machine_check = machine_check_generic,
659 .platform = "ppc604",
660 },
661 { /* 740/750 (0x4202, don't support TAU ?) */
662 .pvr_mask = 0xffffffff,
663 .pvr_value = 0x00084202,
664 .cpu_name = "740/750",
665 .cpu_features = CPU_FTRS_740_NOTAU,
666 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
667 .mmu_features = MMU_FTR_HPTE_TABLE,
668 .icache_bsize = 32,
669 .dcache_bsize = 32,
670 .num_pmcs = 4,
671 .cpu_setup = __setup_cpu_750,
672 .machine_check = machine_check_generic,
673 .platform = "ppc750",
674 },
675 { /* 750CX (80100 and 8010x?) */
676 .pvr_mask = 0xfffffff0,
677 .pvr_value = 0x00080100,
678 .cpu_name = "750CX",
679 .cpu_features = CPU_FTRS_750,
680 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
681 .mmu_features = MMU_FTR_HPTE_TABLE,
682 .icache_bsize = 32,
683 .dcache_bsize = 32,
684 .num_pmcs = 4,
685 .cpu_setup = __setup_cpu_750cx,
686 .machine_check = machine_check_generic,
687 .platform = "ppc750",
688 },
689 { /* 750CX (82201 and 82202) */
690 .pvr_mask = 0xfffffff0,
691 .pvr_value = 0x00082200,
692 .cpu_name = "750CX",
693 .cpu_features = CPU_FTRS_750,
694 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
695 .mmu_features = MMU_FTR_HPTE_TABLE,
696 .icache_bsize = 32,
697 .dcache_bsize = 32,
698 .num_pmcs = 4,
699 .pmc_type = PPC_PMC_IBM,
700 .cpu_setup = __setup_cpu_750cx,
701 .machine_check = machine_check_generic,
702 .platform = "ppc750",
703 },
704 { /* 750CXe (82214) */
705 .pvr_mask = 0xfffffff0,
706 .pvr_value = 0x00082210,
707 .cpu_name = "750CXe",
708 .cpu_features = CPU_FTRS_750,
709 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
710 .mmu_features = MMU_FTR_HPTE_TABLE,
711 .icache_bsize = 32,
712 .dcache_bsize = 32,
713 .num_pmcs = 4,
714 .pmc_type = PPC_PMC_IBM,
715 .cpu_setup = __setup_cpu_750cx,
716 .machine_check = machine_check_generic,
717 .platform = "ppc750",
718 },
719 { /* 750CXe "Gekko" (83214) */
720 .pvr_mask = 0xffffffff,
721 .pvr_value = 0x00083214,
722 .cpu_name = "750CXe",
723 .cpu_features = CPU_FTRS_750,
724 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
725 .mmu_features = MMU_FTR_HPTE_TABLE,
726 .icache_bsize = 32,
727 .dcache_bsize = 32,
728 .num_pmcs = 4,
729 .pmc_type = PPC_PMC_IBM,
730 .cpu_setup = __setup_cpu_750cx,
731 .machine_check = machine_check_generic,
732 .platform = "ppc750",
733 },
734 { /* 750CL (and "Broadway") */
735 .pvr_mask = 0xfffff0e0,
736 .pvr_value = 0x00087000,
737 .cpu_name = "750CL",
738 .cpu_features = CPU_FTRS_750CL,
739 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
740 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
741 .icache_bsize = 32,
742 .dcache_bsize = 32,
743 .num_pmcs = 4,
744 .pmc_type = PPC_PMC_IBM,
745 .cpu_setup = __setup_cpu_750,
746 .machine_check = machine_check_generic,
747 .platform = "ppc750",
748 .oprofile_cpu_type = "ppc/750",
749 .oprofile_type = PPC_OPROFILE_G4,
750 },
751 { /* 745/755 */
752 .pvr_mask = 0xfffff000,
753 .pvr_value = 0x00083000,
754 .cpu_name = "745/755",
755 .cpu_features = CPU_FTRS_750,
756 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
757 .mmu_features = MMU_FTR_HPTE_TABLE,
758 .icache_bsize = 32,
759 .dcache_bsize = 32,
760 .num_pmcs = 4,
761 .pmc_type = PPC_PMC_IBM,
762 .cpu_setup = __setup_cpu_750,
763 .machine_check = machine_check_generic,
764 .platform = "ppc750",
765 },
766 { /* 750FX rev 1.x */
767 .pvr_mask = 0xffffff00,
768 .pvr_value = 0x70000100,
769 .cpu_name = "750FX",
770 .cpu_features = CPU_FTRS_750FX1,
771 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
772 .mmu_features = MMU_FTR_HPTE_TABLE,
773 .icache_bsize = 32,
774 .dcache_bsize = 32,
775 .num_pmcs = 4,
776 .pmc_type = PPC_PMC_IBM,
777 .cpu_setup = __setup_cpu_750,
778 .machine_check = machine_check_generic,
779 .platform = "ppc750",
780 .oprofile_cpu_type = "ppc/750",
781 .oprofile_type = PPC_OPROFILE_G4,
782 },
783 { /* 750FX rev 2.0 must disable HID0[DPM] */
784 .pvr_mask = 0xffffffff,
785 .pvr_value = 0x70000200,
786 .cpu_name = "750FX",
787 .cpu_features = CPU_FTRS_750FX2,
788 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
789 .mmu_features = MMU_FTR_HPTE_TABLE,
790 .icache_bsize = 32,
791 .dcache_bsize = 32,
792 .num_pmcs = 4,
793 .pmc_type = PPC_PMC_IBM,
794 .cpu_setup = __setup_cpu_750,
795 .machine_check = machine_check_generic,
796 .platform = "ppc750",
797 .oprofile_cpu_type = "ppc/750",
798 .oprofile_type = PPC_OPROFILE_G4,
799 },
800 { /* 750FX (All revs except 2.0) */
801 .pvr_mask = 0xffff0000,
802 .pvr_value = 0x70000000,
803 .cpu_name = "750FX",
804 .cpu_features = CPU_FTRS_750FX,
805 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
806 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
807 .icache_bsize = 32,
808 .dcache_bsize = 32,
809 .num_pmcs = 4,
810 .pmc_type = PPC_PMC_IBM,
811 .cpu_setup = __setup_cpu_750fx,
812 .machine_check = machine_check_generic,
813 .platform = "ppc750",
814 .oprofile_cpu_type = "ppc/750",
815 .oprofile_type = PPC_OPROFILE_G4,
816 },
817 { /* 750GX */
818 .pvr_mask = 0xffff0000,
819 .pvr_value = 0x70020000,
820 .cpu_name = "750GX",
821 .cpu_features = CPU_FTRS_750GX,
822 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
823 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
824 .icache_bsize = 32,
825 .dcache_bsize = 32,
826 .num_pmcs = 4,
827 .pmc_type = PPC_PMC_IBM,
828 .cpu_setup = __setup_cpu_750fx,
829 .machine_check = machine_check_generic,
830 .platform = "ppc750",
831 .oprofile_cpu_type = "ppc/750",
832 .oprofile_type = PPC_OPROFILE_G4,
833 },
834 { /* 740/750 (L2CR bit need fixup for 740) */
835 .pvr_mask = 0xffff0000,
836 .pvr_value = 0x00080000,
837 .cpu_name = "740/750",
838 .cpu_features = CPU_FTRS_740,
839 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
840 .mmu_features = MMU_FTR_HPTE_TABLE,
841 .icache_bsize = 32,
842 .dcache_bsize = 32,
843 .num_pmcs = 4,
844 .pmc_type = PPC_PMC_IBM,
845 .cpu_setup = __setup_cpu_750,
846 .machine_check = machine_check_generic,
847 .platform = "ppc750",
848 },
849 { /* 7400 rev 1.1 ? (no TAU) */
850 .pvr_mask = 0xffffffff,
851 .pvr_value = 0x000c1101,
852 .cpu_name = "7400 (1.1)",
853 .cpu_features = CPU_FTRS_7400_NOTAU,
854 .cpu_user_features = COMMON_USER |
855 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
856 .mmu_features = MMU_FTR_HPTE_TABLE,
857 .icache_bsize = 32,
858 .dcache_bsize = 32,
859 .num_pmcs = 4,
860 .pmc_type = PPC_PMC_G4,
861 .cpu_setup = __setup_cpu_7400,
862 .machine_check = machine_check_generic,
863 .platform = "ppc7400",
864 },
865 { /* 7400 */
866 .pvr_mask = 0xffff0000,
867 .pvr_value = 0x000c0000,
868 .cpu_name = "7400",
869 .cpu_features = CPU_FTRS_7400,
870 .cpu_user_features = COMMON_USER |
871 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
872 .mmu_features = MMU_FTR_HPTE_TABLE,
873 .icache_bsize = 32,
874 .dcache_bsize = 32,
875 .num_pmcs = 4,
876 .pmc_type = PPC_PMC_G4,
877 .cpu_setup = __setup_cpu_7400,
878 .machine_check = machine_check_generic,
879 .platform = "ppc7400",
880 },
881 { /* 7410 */
882 .pvr_mask = 0xffff0000,
883 .pvr_value = 0x800c0000,
884 .cpu_name = "7410",
885 .cpu_features = CPU_FTRS_7400,
886 .cpu_user_features = COMMON_USER |
887 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
888 .mmu_features = MMU_FTR_HPTE_TABLE,
889 .icache_bsize = 32,
890 .dcache_bsize = 32,
891 .num_pmcs = 4,
892 .pmc_type = PPC_PMC_G4,
893 .cpu_setup = __setup_cpu_7410,
894 .machine_check = machine_check_generic,
895 .platform = "ppc7400",
896 },
897 { /* 7450 2.0 - no doze/nap */
898 .pvr_mask = 0xffffffff,
899 .pvr_value = 0x80000200,
900 .cpu_name = "7450",
901 .cpu_features = CPU_FTRS_7450_20,
902 .cpu_user_features = COMMON_USER |
903 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
904 .mmu_features = MMU_FTR_HPTE_TABLE,
905 .icache_bsize = 32,
906 .dcache_bsize = 32,
907 .num_pmcs = 6,
908 .pmc_type = PPC_PMC_G4,
909 .cpu_setup = __setup_cpu_745x,
910 .oprofile_cpu_type = "ppc/7450",
911 .oprofile_type = PPC_OPROFILE_G4,
912 .machine_check = machine_check_generic,
913 .platform = "ppc7450",
914 },
915 { /* 7450 2.1 */
916 .pvr_mask = 0xffffffff,
917 .pvr_value = 0x80000201,
918 .cpu_name = "7450",
919 .cpu_features = CPU_FTRS_7450_21,
920 .cpu_user_features = COMMON_USER |
921 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
922 .mmu_features = MMU_FTR_HPTE_TABLE,
923 .icache_bsize = 32,
924 .dcache_bsize = 32,
925 .num_pmcs = 6,
926 .pmc_type = PPC_PMC_G4,
927 .cpu_setup = __setup_cpu_745x,
928 .oprofile_cpu_type = "ppc/7450",
929 .oprofile_type = PPC_OPROFILE_G4,
930 .machine_check = machine_check_generic,
931 .platform = "ppc7450",
932 },
933 { /* 7450 2.3 and newer */
934 .pvr_mask = 0xffff0000,
935 .pvr_value = 0x80000000,
936 .cpu_name = "7450",
937 .cpu_features = CPU_FTRS_7450_23,
938 .cpu_user_features = COMMON_USER |
939 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
940 .mmu_features = MMU_FTR_HPTE_TABLE,
941 .icache_bsize = 32,
942 .dcache_bsize = 32,
943 .num_pmcs = 6,
944 .pmc_type = PPC_PMC_G4,
945 .cpu_setup = __setup_cpu_745x,
946 .oprofile_cpu_type = "ppc/7450",
947 .oprofile_type = PPC_OPROFILE_G4,
948 .machine_check = machine_check_generic,
949 .platform = "ppc7450",
950 },
951 { /* 7455 rev 1.x */
952 .pvr_mask = 0xffffff00,
953 .pvr_value = 0x80010100,
954 .cpu_name = "7455",
955 .cpu_features = CPU_FTRS_7455_1,
956 .cpu_user_features = COMMON_USER |
957 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
958 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
959 .icache_bsize = 32,
960 .dcache_bsize = 32,
961 .num_pmcs = 6,
962 .pmc_type = PPC_PMC_G4,
963 .cpu_setup = __setup_cpu_745x,
964 .oprofile_cpu_type = "ppc/7450",
965 .oprofile_type = PPC_OPROFILE_G4,
966 .machine_check = machine_check_generic,
967 .platform = "ppc7450",
968 },
969 { /* 7455 rev 2.0 */
970 .pvr_mask = 0xffffffff,
971 .pvr_value = 0x80010200,
972 .cpu_name = "7455",
973 .cpu_features = CPU_FTRS_7455_20,
974 .cpu_user_features = COMMON_USER |
975 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
976 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
977 .icache_bsize = 32,
978 .dcache_bsize = 32,
979 .num_pmcs = 6,
980 .pmc_type = PPC_PMC_G4,
981 .cpu_setup = __setup_cpu_745x,
982 .oprofile_cpu_type = "ppc/7450",
983 .oprofile_type = PPC_OPROFILE_G4,
984 .machine_check = machine_check_generic,
985 .platform = "ppc7450",
986 },
987 { /* 7455 others */
988 .pvr_mask = 0xffff0000,
989 .pvr_value = 0x80010000,
990 .cpu_name = "7455",
991 .cpu_features = CPU_FTRS_7455,
992 .cpu_user_features = COMMON_USER |
993 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
994 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
995 .icache_bsize = 32,
996 .dcache_bsize = 32,
997 .num_pmcs = 6,
998 .pmc_type = PPC_PMC_G4,
999 .cpu_setup = __setup_cpu_745x,
1000 .oprofile_cpu_type = "ppc/7450",
1001 .oprofile_type = PPC_OPROFILE_G4,
1002 .machine_check = machine_check_generic,
1003 .platform = "ppc7450",
1004 },
1005 { /* 7447/7457 Rev 1.0 */
1006 .pvr_mask = 0xffffffff,
1007 .pvr_value = 0x80020100,
1008 .cpu_name = "7447/7457",
1009 .cpu_features = CPU_FTRS_7447_10,
1010 .cpu_user_features = COMMON_USER |
1011 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1012 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1013 .icache_bsize = 32,
1014 .dcache_bsize = 32,
1015 .num_pmcs = 6,
1016 .pmc_type = PPC_PMC_G4,
1017 .cpu_setup = __setup_cpu_745x,
1018 .oprofile_cpu_type = "ppc/7450",
1019 .oprofile_type = PPC_OPROFILE_G4,
1020 .machine_check = machine_check_generic,
1021 .platform = "ppc7450",
1022 },
1023 { /* 7447/7457 Rev 1.1 */
1024 .pvr_mask = 0xffffffff,
1025 .pvr_value = 0x80020101,
1026 .cpu_name = "7447/7457",
1027 .cpu_features = CPU_FTRS_7447_10,
1028 .cpu_user_features = COMMON_USER |
1029 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1030 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1031 .icache_bsize = 32,
1032 .dcache_bsize = 32,
1033 .num_pmcs = 6,
1034 .pmc_type = PPC_PMC_G4,
1035 .cpu_setup = __setup_cpu_745x,
1036 .oprofile_cpu_type = "ppc/7450",
1037 .oprofile_type = PPC_OPROFILE_G4,
1038 .machine_check = machine_check_generic,
1039 .platform = "ppc7450",
1040 },
1041 { /* 7447/7457 Rev 1.2 and later */
1042 .pvr_mask = 0xffff0000,
1043 .pvr_value = 0x80020000,
1044 .cpu_name = "7447/7457",
1045 .cpu_features = CPU_FTRS_7447,
1046 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1047 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1048 .icache_bsize = 32,
1049 .dcache_bsize = 32,
1050 .num_pmcs = 6,
1051 .pmc_type = PPC_PMC_G4,
1052 .cpu_setup = __setup_cpu_745x,
1053 .oprofile_cpu_type = "ppc/7450",
1054 .oprofile_type = PPC_OPROFILE_G4,
1055 .machine_check = machine_check_generic,
1056 .platform = "ppc7450",
1057 },
1058 { /* 7447A */
1059 .pvr_mask = 0xffff0000,
1060 .pvr_value = 0x80030000,
1061 .cpu_name = "7447A",
1062 .cpu_features = CPU_FTRS_7447A,
1063 .cpu_user_features = COMMON_USER |
1064 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1065 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1066 .icache_bsize = 32,
1067 .dcache_bsize = 32,
1068 .num_pmcs = 6,
1069 .pmc_type = PPC_PMC_G4,
1070 .cpu_setup = __setup_cpu_745x,
1071 .oprofile_cpu_type = "ppc/7450",
1072 .oprofile_type = PPC_OPROFILE_G4,
1073 .machine_check = machine_check_generic,
1074 .platform = "ppc7450",
1075 },
1076 { /* 7448 */
1077 .pvr_mask = 0xffff0000,
1078 .pvr_value = 0x80040000,
1079 .cpu_name = "7448",
1080 .cpu_features = CPU_FTRS_7448,
1081 .cpu_user_features = COMMON_USER |
1082 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1083 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1084 .icache_bsize = 32,
1085 .dcache_bsize = 32,
1086 .num_pmcs = 6,
1087 .pmc_type = PPC_PMC_G4,
1088 .cpu_setup = __setup_cpu_745x,
1089 .oprofile_cpu_type = "ppc/7450",
1090 .oprofile_type = PPC_OPROFILE_G4,
1091 .machine_check = machine_check_generic,
1092 .platform = "ppc7450",
1093 },
1094 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1095 .pvr_mask = 0x7fff0000,
1096 .pvr_value = 0x00810000,
1097 .cpu_name = "82xx",
1098 .cpu_features = CPU_FTRS_82XX,
1099 .cpu_user_features = COMMON_USER,
1100 .mmu_features = 0,
1101 .icache_bsize = 32,
1102 .dcache_bsize = 32,
1103 .cpu_setup = __setup_cpu_603,
1104 .machine_check = machine_check_generic,
1105 .platform = "ppc603",
1106 },
1107 { /* All G2_LE (603e core, plus some) have the same pvr */
1108 .pvr_mask = 0x7fff0000,
1109 .pvr_value = 0x00820000,
1110 .cpu_name = "G2_LE",
1111 .cpu_features = CPU_FTRS_G2_LE,
1112 .cpu_user_features = COMMON_USER,
1113 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1114 .icache_bsize = 32,
1115 .dcache_bsize = 32,
1116 .cpu_setup = __setup_cpu_603,
1117 .machine_check = machine_check_generic,
1118 .platform = "ppc603",
1119 },
1120 { /* e300c1 (a 603e core, plus some) on 83xx */
1121 .pvr_mask = 0x7fff0000,
1122 .pvr_value = 0x00830000,
1123 .cpu_name = "e300c1",
1124 .cpu_features = CPU_FTRS_E300,
1125 .cpu_user_features = COMMON_USER,
1126 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1127 .icache_bsize = 32,
1128 .dcache_bsize = 32,
1129 .cpu_setup = __setup_cpu_603,
1130 .machine_check = machine_check_generic,
1131 .platform = "ppc603",
1132 },
1133 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1134 .pvr_mask = 0x7fff0000,
1135 .pvr_value = 0x00840000,
1136 .cpu_name = "e300c2",
1137 .cpu_features = CPU_FTRS_E300C2,
1138 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1139 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1140 MMU_FTR_NEED_DTLB_SW_LRU,
1141 .icache_bsize = 32,
1142 .dcache_bsize = 32,
1143 .cpu_setup = __setup_cpu_603,
1144 .machine_check = machine_check_generic,
1145 .platform = "ppc603",
1146 },
1147 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1148 .pvr_mask = 0x7fff0000,
1149 .pvr_value = 0x00850000,
1150 .cpu_name = "e300c3",
1151 .cpu_features = CPU_FTRS_E300,
1152 .cpu_user_features = COMMON_USER,
1153 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1154 MMU_FTR_NEED_DTLB_SW_LRU,
1155 .icache_bsize = 32,
1156 .dcache_bsize = 32,
1157 .cpu_setup = __setup_cpu_603,
1158 .machine_check = machine_check_generic,
1159 .num_pmcs = 4,
1160 .oprofile_cpu_type = "ppc/e300",
1161 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1162 .platform = "ppc603",
1163 },
1164 { /* e300c4 (e300c1, plus one IU) */
1165 .pvr_mask = 0x7fff0000,
1166 .pvr_value = 0x00860000,
1167 .cpu_name = "e300c4",
1168 .cpu_features = CPU_FTRS_E300,
1169 .cpu_user_features = COMMON_USER,
1170 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1171 MMU_FTR_NEED_DTLB_SW_LRU,
1172 .icache_bsize = 32,
1173 .dcache_bsize = 32,
1174 .cpu_setup = __setup_cpu_603,
1175 .machine_check = machine_check_generic,
1176 .num_pmcs = 4,
1177 .oprofile_cpu_type = "ppc/e300",
1178 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1179 .platform = "ppc603",
1180 },
1181 { /* default match, we assume split I/D cache & TB (non-601)... */
1182 .pvr_mask = 0x00000000,
1183 .pvr_value = 0x00000000,
1184 .cpu_name = "(generic PPC)",
1185 .cpu_features = CPU_FTRS_CLASSIC32,
1186 .cpu_user_features = COMMON_USER,
1187 .mmu_features = MMU_FTR_HPTE_TABLE,
1188 .icache_bsize = 32,
1189 .dcache_bsize = 32,
1190 .machine_check = machine_check_generic,
1191 .platform = "ppc603",
1192 },
1193 #endif /* CONFIG_PPC_BOOK3S_32 */
1194 #ifdef CONFIG_8xx
1195 { /* 8xx */
1196 .pvr_mask = 0xffff0000,
1197 .pvr_value = 0x00500000,
1198 .cpu_name = "8xx",
1199 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1200 * if the 8xx code is there.... */
1201 .cpu_features = CPU_FTRS_8XX,
1202 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1203 .mmu_features = MMU_FTR_TYPE_8xx,
1204 .icache_bsize = 16,
1205 .dcache_bsize = 16,
1206 .platform = "ppc823",
1207 },
1208 #endif /* CONFIG_8xx */
1209 #ifdef CONFIG_40x
1210 { /* 403GC */
1211 .pvr_mask = 0xffffff00,
1212 .pvr_value = 0x00200200,
1213 .cpu_name = "403GC",
1214 .cpu_features = CPU_FTRS_40X,
1215 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1216 .mmu_features = MMU_FTR_TYPE_40x,
1217 .icache_bsize = 16,
1218 .dcache_bsize = 16,
1219 .machine_check = machine_check_4xx,
1220 .platform = "ppc403",
1221 },
1222 { /* 403GCX */
1223 .pvr_mask = 0xffffff00,
1224 .pvr_value = 0x00201400,
1225 .cpu_name = "403GCX",
1226 .cpu_features = CPU_FTRS_40X,
1227 .cpu_user_features = PPC_FEATURE_32 |
1228 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1229 .mmu_features = MMU_FTR_TYPE_40x,
1230 .icache_bsize = 16,
1231 .dcache_bsize = 16,
1232 .machine_check = machine_check_4xx,
1233 .platform = "ppc403",
1234 },
1235 { /* 403G ?? */
1236 .pvr_mask = 0xffff0000,
1237 .pvr_value = 0x00200000,
1238 .cpu_name = "403G ??",
1239 .cpu_features = CPU_FTRS_40X,
1240 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1241 .mmu_features = MMU_FTR_TYPE_40x,
1242 .icache_bsize = 16,
1243 .dcache_bsize = 16,
1244 .machine_check = machine_check_4xx,
1245 .platform = "ppc403",
1246 },
1247 { /* 405GP */
1248 .pvr_mask = 0xffff0000,
1249 .pvr_value = 0x40110000,
1250 .cpu_name = "405GP",
1251 .cpu_features = CPU_FTRS_40X,
1252 .cpu_user_features = PPC_FEATURE_32 |
1253 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1254 .mmu_features = MMU_FTR_TYPE_40x,
1255 .icache_bsize = 32,
1256 .dcache_bsize = 32,
1257 .machine_check = machine_check_4xx,
1258 .platform = "ppc405",
1259 },
1260 { /* STB 03xxx */
1261 .pvr_mask = 0xffff0000,
1262 .pvr_value = 0x40130000,
1263 .cpu_name = "STB03xxx",
1264 .cpu_features = CPU_FTRS_40X,
1265 .cpu_user_features = PPC_FEATURE_32 |
1266 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1267 .mmu_features = MMU_FTR_TYPE_40x,
1268 .icache_bsize = 32,
1269 .dcache_bsize = 32,
1270 .machine_check = machine_check_4xx,
1271 .platform = "ppc405",
1272 },
1273 { /* STB 04xxx */
1274 .pvr_mask = 0xffff0000,
1275 .pvr_value = 0x41810000,
1276 .cpu_name = "STB04xxx",
1277 .cpu_features = CPU_FTRS_40X,
1278 .cpu_user_features = PPC_FEATURE_32 |
1279 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1280 .mmu_features = MMU_FTR_TYPE_40x,
1281 .icache_bsize = 32,
1282 .dcache_bsize = 32,
1283 .machine_check = machine_check_4xx,
1284 .platform = "ppc405",
1285 },
1286 { /* NP405L */
1287 .pvr_mask = 0xffff0000,
1288 .pvr_value = 0x41610000,
1289 .cpu_name = "NP405L",
1290 .cpu_features = CPU_FTRS_40X,
1291 .cpu_user_features = PPC_FEATURE_32 |
1292 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1293 .mmu_features = MMU_FTR_TYPE_40x,
1294 .icache_bsize = 32,
1295 .dcache_bsize = 32,
1296 .machine_check = machine_check_4xx,
1297 .platform = "ppc405",
1298 },
1299 { /* NP4GS3 */
1300 .pvr_mask = 0xffff0000,
1301 .pvr_value = 0x40B10000,
1302 .cpu_name = "NP4GS3",
1303 .cpu_features = CPU_FTRS_40X,
1304 .cpu_user_features = PPC_FEATURE_32 |
1305 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1306 .mmu_features = MMU_FTR_TYPE_40x,
1307 .icache_bsize = 32,
1308 .dcache_bsize = 32,
1309 .machine_check = machine_check_4xx,
1310 .platform = "ppc405",
1311 },
1312 { /* NP405H */
1313 .pvr_mask = 0xffff0000,
1314 .pvr_value = 0x41410000,
1315 .cpu_name = "NP405H",
1316 .cpu_features = CPU_FTRS_40X,
1317 .cpu_user_features = PPC_FEATURE_32 |
1318 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1319 .mmu_features = MMU_FTR_TYPE_40x,
1320 .icache_bsize = 32,
1321 .dcache_bsize = 32,
1322 .machine_check = machine_check_4xx,
1323 .platform = "ppc405",
1324 },
1325 { /* 405GPr */
1326 .pvr_mask = 0xffff0000,
1327 .pvr_value = 0x50910000,
1328 .cpu_name = "405GPr",
1329 .cpu_features = CPU_FTRS_40X,
1330 .cpu_user_features = PPC_FEATURE_32 |
1331 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1332 .mmu_features = MMU_FTR_TYPE_40x,
1333 .icache_bsize = 32,
1334 .dcache_bsize = 32,
1335 .machine_check = machine_check_4xx,
1336 .platform = "ppc405",
1337 },
1338 { /* STBx25xx */
1339 .pvr_mask = 0xffff0000,
1340 .pvr_value = 0x51510000,
1341 .cpu_name = "STBx25xx",
1342 .cpu_features = CPU_FTRS_40X,
1343 .cpu_user_features = PPC_FEATURE_32 |
1344 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1345 .mmu_features = MMU_FTR_TYPE_40x,
1346 .icache_bsize = 32,
1347 .dcache_bsize = 32,
1348 .machine_check = machine_check_4xx,
1349 .platform = "ppc405",
1350 },
1351 { /* 405LP */
1352 .pvr_mask = 0xffff0000,
1353 .pvr_value = 0x41F10000,
1354 .cpu_name = "405LP",
1355 .cpu_features = CPU_FTRS_40X,
1356 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1357 .mmu_features = MMU_FTR_TYPE_40x,
1358 .icache_bsize = 32,
1359 .dcache_bsize = 32,
1360 .machine_check = machine_check_4xx,
1361 .platform = "ppc405",
1362 },
1363 { /* Xilinx Virtex-II Pro */
1364 .pvr_mask = 0xfffff000,
1365 .pvr_value = 0x20010000,
1366 .cpu_name = "Virtex-II Pro",
1367 .cpu_features = CPU_FTRS_40X,
1368 .cpu_user_features = PPC_FEATURE_32 |
1369 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1370 .mmu_features = MMU_FTR_TYPE_40x,
1371 .icache_bsize = 32,
1372 .dcache_bsize = 32,
1373 .machine_check = machine_check_4xx,
1374 .platform = "ppc405",
1375 },
1376 { /* Xilinx Virtex-4 FX */
1377 .pvr_mask = 0xfffff000,
1378 .pvr_value = 0x20011000,
1379 .cpu_name = "Virtex-4 FX",
1380 .cpu_features = CPU_FTRS_40X,
1381 .cpu_user_features = PPC_FEATURE_32 |
1382 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1383 .mmu_features = MMU_FTR_TYPE_40x,
1384 .icache_bsize = 32,
1385 .dcache_bsize = 32,
1386 .machine_check = machine_check_4xx,
1387 .platform = "ppc405",
1388 },
1389 { /* 405EP */
1390 .pvr_mask = 0xffff0000,
1391 .pvr_value = 0x51210000,
1392 .cpu_name = "405EP",
1393 .cpu_features = CPU_FTRS_40X,
1394 .cpu_user_features = PPC_FEATURE_32 |
1395 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1396 .mmu_features = MMU_FTR_TYPE_40x,
1397 .icache_bsize = 32,
1398 .dcache_bsize = 32,
1399 .machine_check = machine_check_4xx,
1400 .platform = "ppc405",
1401 },
1402 { /* 405EX Rev. A/B with Security */
1403 .pvr_mask = 0xffff000f,
1404 .pvr_value = 0x12910007,
1405 .cpu_name = "405EX Rev. A/B",
1406 .cpu_features = CPU_FTRS_40X,
1407 .cpu_user_features = PPC_FEATURE_32 |
1408 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1409 .mmu_features = MMU_FTR_TYPE_40x,
1410 .icache_bsize = 32,
1411 .dcache_bsize = 32,
1412 .machine_check = machine_check_4xx,
1413 .platform = "ppc405",
1414 },
1415 { /* 405EX Rev. C without Security */
1416 .pvr_mask = 0xffff000f,
1417 .pvr_value = 0x1291000d,
1418 .cpu_name = "405EX Rev. C",
1419 .cpu_features = CPU_FTRS_40X,
1420 .cpu_user_features = PPC_FEATURE_32 |
1421 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1422 .mmu_features = MMU_FTR_TYPE_40x,
1423 .icache_bsize = 32,
1424 .dcache_bsize = 32,
1425 .machine_check = machine_check_4xx,
1426 .platform = "ppc405",
1427 },
1428 { /* 405EX Rev. C with Security */
1429 .pvr_mask = 0xffff000f,
1430 .pvr_value = 0x1291000f,
1431 .cpu_name = "405EX Rev. C",
1432 .cpu_features = CPU_FTRS_40X,
1433 .cpu_user_features = PPC_FEATURE_32 |
1434 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1435 .mmu_features = MMU_FTR_TYPE_40x,
1436 .icache_bsize = 32,
1437 .dcache_bsize = 32,
1438 .machine_check = machine_check_4xx,
1439 .platform = "ppc405",
1440 },
1441 { /* 405EX Rev. D without Security */
1442 .pvr_mask = 0xffff000f,
1443 .pvr_value = 0x12910003,
1444 .cpu_name = "405EX Rev. D",
1445 .cpu_features = CPU_FTRS_40X,
1446 .cpu_user_features = PPC_FEATURE_32 |
1447 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1448 .mmu_features = MMU_FTR_TYPE_40x,
1449 .icache_bsize = 32,
1450 .dcache_bsize = 32,
1451 .machine_check = machine_check_4xx,
1452 .platform = "ppc405",
1453 },
1454 { /* 405EX Rev. D with Security */
1455 .pvr_mask = 0xffff000f,
1456 .pvr_value = 0x12910005,
1457 .cpu_name = "405EX Rev. D",
1458 .cpu_features = CPU_FTRS_40X,
1459 .cpu_user_features = PPC_FEATURE_32 |
1460 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1461 .mmu_features = MMU_FTR_TYPE_40x,
1462 .icache_bsize = 32,
1463 .dcache_bsize = 32,
1464 .machine_check = machine_check_4xx,
1465 .platform = "ppc405",
1466 },
1467 { /* 405EXr Rev. A/B without Security */
1468 .pvr_mask = 0xffff000f,
1469 .pvr_value = 0x12910001,
1470 .cpu_name = "405EXr Rev. A/B",
1471 .cpu_features = CPU_FTRS_40X,
1472 .cpu_user_features = PPC_FEATURE_32 |
1473 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1474 .mmu_features = MMU_FTR_TYPE_40x,
1475 .icache_bsize = 32,
1476 .dcache_bsize = 32,
1477 .machine_check = machine_check_4xx,
1478 .platform = "ppc405",
1479 },
1480 { /* 405EXr Rev. C without Security */
1481 .pvr_mask = 0xffff000f,
1482 .pvr_value = 0x12910009,
1483 .cpu_name = "405EXr Rev. C",
1484 .cpu_features = CPU_FTRS_40X,
1485 .cpu_user_features = PPC_FEATURE_32 |
1486 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1487 .mmu_features = MMU_FTR_TYPE_40x,
1488 .icache_bsize = 32,
1489 .dcache_bsize = 32,
1490 .machine_check = machine_check_4xx,
1491 .platform = "ppc405",
1492 },
1493 { /* 405EXr Rev. C with Security */
1494 .pvr_mask = 0xffff000f,
1495 .pvr_value = 0x1291000b,
1496 .cpu_name = "405EXr Rev. C",
1497 .cpu_features = CPU_FTRS_40X,
1498 .cpu_user_features = PPC_FEATURE_32 |
1499 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1500 .mmu_features = MMU_FTR_TYPE_40x,
1501 .icache_bsize = 32,
1502 .dcache_bsize = 32,
1503 .machine_check = machine_check_4xx,
1504 .platform = "ppc405",
1505 },
1506 { /* 405EXr Rev. D without Security */
1507 .pvr_mask = 0xffff000f,
1508 .pvr_value = 0x12910000,
1509 .cpu_name = "405EXr Rev. D",
1510 .cpu_features = CPU_FTRS_40X,
1511 .cpu_user_features = PPC_FEATURE_32 |
1512 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1513 .mmu_features = MMU_FTR_TYPE_40x,
1514 .icache_bsize = 32,
1515 .dcache_bsize = 32,
1516 .machine_check = machine_check_4xx,
1517 .platform = "ppc405",
1518 },
1519 { /* 405EXr Rev. D with Security */
1520 .pvr_mask = 0xffff000f,
1521 .pvr_value = 0x12910002,
1522 .cpu_name = "405EXr Rev. D",
1523 .cpu_features = CPU_FTRS_40X,
1524 .cpu_user_features = PPC_FEATURE_32 |
1525 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1526 .mmu_features = MMU_FTR_TYPE_40x,
1527 .icache_bsize = 32,
1528 .dcache_bsize = 32,
1529 .machine_check = machine_check_4xx,
1530 .platform = "ppc405",
1531 },
1532 {
1533 /* 405EZ */
1534 .pvr_mask = 0xffff0000,
1535 .pvr_value = 0x41510000,
1536 .cpu_name = "405EZ",
1537 .cpu_features = CPU_FTRS_40X,
1538 .cpu_user_features = PPC_FEATURE_32 |
1539 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1540 .mmu_features = MMU_FTR_TYPE_40x,
1541 .icache_bsize = 32,
1542 .dcache_bsize = 32,
1543 .machine_check = machine_check_4xx,
1544 .platform = "ppc405",
1545 },
1546 { /* APM8018X */
1547 .pvr_mask = 0xffff0000,
1548 .pvr_value = 0x7ff11432,
1549 .cpu_name = "APM8018X",
1550 .cpu_features = CPU_FTRS_40X,
1551 .cpu_user_features = PPC_FEATURE_32 |
1552 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1553 .mmu_features = MMU_FTR_TYPE_40x,
1554 .icache_bsize = 32,
1555 .dcache_bsize = 32,
1556 .machine_check = machine_check_4xx,
1557 .platform = "ppc405",
1558 },
1559 { /* default match */
1560 .pvr_mask = 0x00000000,
1561 .pvr_value = 0x00000000,
1562 .cpu_name = "(generic 40x PPC)",
1563 .cpu_features = CPU_FTRS_40X,
1564 .cpu_user_features = PPC_FEATURE_32 |
1565 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1566 .mmu_features = MMU_FTR_TYPE_40x,
1567 .icache_bsize = 32,
1568 .dcache_bsize = 32,
1569 .machine_check = machine_check_4xx,
1570 .platform = "ppc405",
1571 }
1572
1573 #endif /* CONFIG_40x */
1574 #ifdef CONFIG_44x
1575 {
1576 .pvr_mask = 0xf0000fff,
1577 .pvr_value = 0x40000850,
1578 .cpu_name = "440GR Rev. A",
1579 .cpu_features = CPU_FTRS_44X,
1580 .cpu_user_features = COMMON_USER_BOOKE,
1581 .mmu_features = MMU_FTR_TYPE_44x,
1582 .icache_bsize = 32,
1583 .dcache_bsize = 32,
1584 .machine_check = machine_check_4xx,
1585 .platform = "ppc440",
1586 },
1587 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1588 .pvr_mask = 0xf0000fff,
1589 .pvr_value = 0x40000858,
1590 .cpu_name = "440EP Rev. A",
1591 .cpu_features = CPU_FTRS_44X,
1592 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1593 .mmu_features = MMU_FTR_TYPE_44x,
1594 .icache_bsize = 32,
1595 .dcache_bsize = 32,
1596 .cpu_setup = __setup_cpu_440ep,
1597 .machine_check = machine_check_4xx,
1598 .platform = "ppc440",
1599 },
1600 {
1601 .pvr_mask = 0xf0000fff,
1602 .pvr_value = 0x400008d3,
1603 .cpu_name = "440GR Rev. B",
1604 .cpu_features = CPU_FTRS_44X,
1605 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1606 .mmu_features = MMU_FTR_TYPE_44x,
1607 .icache_bsize = 32,
1608 .dcache_bsize = 32,
1609 .machine_check = machine_check_4xx,
1610 .platform = "ppc440",
1611 },
1612 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1613 .pvr_mask = 0xf0000ff7,
1614 .pvr_value = 0x400008d4,
1615 .cpu_name = "440EP Rev. C",
1616 .cpu_features = CPU_FTRS_44X,
1617 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1618 .mmu_features = MMU_FTR_TYPE_44x,
1619 .icache_bsize = 32,
1620 .dcache_bsize = 32,
1621 .cpu_setup = __setup_cpu_440ep,
1622 .machine_check = machine_check_4xx,
1623 .platform = "ppc440",
1624 },
1625 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1626 .pvr_mask = 0xf0000fff,
1627 .pvr_value = 0x400008db,
1628 .cpu_name = "440EP Rev. B",
1629 .cpu_features = CPU_FTRS_44X,
1630 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1631 .mmu_features = MMU_FTR_TYPE_44x,
1632 .icache_bsize = 32,
1633 .dcache_bsize = 32,
1634 .cpu_setup = __setup_cpu_440ep,
1635 .machine_check = machine_check_4xx,
1636 .platform = "ppc440",
1637 },
1638 { /* 440GRX */
1639 .pvr_mask = 0xf0000ffb,
1640 .pvr_value = 0x200008D0,
1641 .cpu_name = "440GRX",
1642 .cpu_features = CPU_FTRS_44X,
1643 .cpu_user_features = COMMON_USER_BOOKE,
1644 .mmu_features = MMU_FTR_TYPE_44x,
1645 .icache_bsize = 32,
1646 .dcache_bsize = 32,
1647 .cpu_setup = __setup_cpu_440grx,
1648 .machine_check = machine_check_440A,
1649 .platform = "ppc440",
1650 },
1651 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1652 .pvr_mask = 0xf0000ffb,
1653 .pvr_value = 0x200008D8,
1654 .cpu_name = "440EPX",
1655 .cpu_features = CPU_FTRS_44X,
1656 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1657 .mmu_features = MMU_FTR_TYPE_44x,
1658 .icache_bsize = 32,
1659 .dcache_bsize = 32,
1660 .cpu_setup = __setup_cpu_440epx,
1661 .machine_check = machine_check_440A,
1662 .platform = "ppc440",
1663 },
1664 { /* 440GP Rev. B */
1665 .pvr_mask = 0xf0000fff,
1666 .pvr_value = 0x40000440,
1667 .cpu_name = "440GP Rev. B",
1668 .cpu_features = CPU_FTRS_44X,
1669 .cpu_user_features = COMMON_USER_BOOKE,
1670 .mmu_features = MMU_FTR_TYPE_44x,
1671 .icache_bsize = 32,
1672 .dcache_bsize = 32,
1673 .machine_check = machine_check_4xx,
1674 .platform = "ppc440gp",
1675 },
1676 { /* 440GP Rev. C */
1677 .pvr_mask = 0xf0000fff,
1678 .pvr_value = 0x40000481,
1679 .cpu_name = "440GP Rev. C",
1680 .cpu_features = CPU_FTRS_44X,
1681 .cpu_user_features = COMMON_USER_BOOKE,
1682 .mmu_features = MMU_FTR_TYPE_44x,
1683 .icache_bsize = 32,
1684 .dcache_bsize = 32,
1685 .machine_check = machine_check_4xx,
1686 .platform = "ppc440gp",
1687 },
1688 { /* 440GX Rev. A */
1689 .pvr_mask = 0xf0000fff,
1690 .pvr_value = 0x50000850,
1691 .cpu_name = "440GX Rev. A",
1692 .cpu_features = CPU_FTRS_44X,
1693 .cpu_user_features = COMMON_USER_BOOKE,
1694 .mmu_features = MMU_FTR_TYPE_44x,
1695 .icache_bsize = 32,
1696 .dcache_bsize = 32,
1697 .cpu_setup = __setup_cpu_440gx,
1698 .machine_check = machine_check_440A,
1699 .platform = "ppc440",
1700 },
1701 { /* 440GX Rev. B */
1702 .pvr_mask = 0xf0000fff,
1703 .pvr_value = 0x50000851,
1704 .cpu_name = "440GX Rev. B",
1705 .cpu_features = CPU_FTRS_44X,
1706 .cpu_user_features = COMMON_USER_BOOKE,
1707 .mmu_features = MMU_FTR_TYPE_44x,
1708 .icache_bsize = 32,
1709 .dcache_bsize = 32,
1710 .cpu_setup = __setup_cpu_440gx,
1711 .machine_check = machine_check_440A,
1712 .platform = "ppc440",
1713 },
1714 { /* 440GX Rev. C */
1715 .pvr_mask = 0xf0000fff,
1716 .pvr_value = 0x50000892,
1717 .cpu_name = "440GX Rev. C",
1718 .cpu_features = CPU_FTRS_44X,
1719 .cpu_user_features = COMMON_USER_BOOKE,
1720 .mmu_features = MMU_FTR_TYPE_44x,
1721 .icache_bsize = 32,
1722 .dcache_bsize = 32,
1723 .cpu_setup = __setup_cpu_440gx,
1724 .machine_check = machine_check_440A,
1725 .platform = "ppc440",
1726 },
1727 { /* 440GX Rev. F */
1728 .pvr_mask = 0xf0000fff,
1729 .pvr_value = 0x50000894,
1730 .cpu_name = "440GX Rev. F",
1731 .cpu_features = CPU_FTRS_44X,
1732 .cpu_user_features = COMMON_USER_BOOKE,
1733 .mmu_features = MMU_FTR_TYPE_44x,
1734 .icache_bsize = 32,
1735 .dcache_bsize = 32,
1736 .cpu_setup = __setup_cpu_440gx,
1737 .machine_check = machine_check_440A,
1738 .platform = "ppc440",
1739 },
1740 { /* 440SP Rev. A */
1741 .pvr_mask = 0xfff00fff,
1742 .pvr_value = 0x53200891,
1743 .cpu_name = "440SP Rev. A",
1744 .cpu_features = CPU_FTRS_44X,
1745 .cpu_user_features = COMMON_USER_BOOKE,
1746 .mmu_features = MMU_FTR_TYPE_44x,
1747 .icache_bsize = 32,
1748 .dcache_bsize = 32,
1749 .machine_check = machine_check_4xx,
1750 .platform = "ppc440",
1751 },
1752 { /* 440SPe Rev. A */
1753 .pvr_mask = 0xfff00fff,
1754 .pvr_value = 0x53400890,
1755 .cpu_name = "440SPe Rev. A",
1756 .cpu_features = CPU_FTRS_44X,
1757 .cpu_user_features = COMMON_USER_BOOKE,
1758 .mmu_features = MMU_FTR_TYPE_44x,
1759 .icache_bsize = 32,
1760 .dcache_bsize = 32,
1761 .cpu_setup = __setup_cpu_440spe,
1762 .machine_check = machine_check_440A,
1763 .platform = "ppc440",
1764 },
1765 { /* 440SPe Rev. B */
1766 .pvr_mask = 0xfff00fff,
1767 .pvr_value = 0x53400891,
1768 .cpu_name = "440SPe Rev. B",
1769 .cpu_features = CPU_FTRS_44X,
1770 .cpu_user_features = COMMON_USER_BOOKE,
1771 .mmu_features = MMU_FTR_TYPE_44x,
1772 .icache_bsize = 32,
1773 .dcache_bsize = 32,
1774 .cpu_setup = __setup_cpu_440spe,
1775 .machine_check = machine_check_440A,
1776 .platform = "ppc440",
1777 },
1778 { /* 440 in Xilinx Virtex-5 FXT */
1779 .pvr_mask = 0xfffffff0,
1780 .pvr_value = 0x7ff21910,
1781 .cpu_name = "440 in Virtex-5 FXT",
1782 .cpu_features = CPU_FTRS_44X,
1783 .cpu_user_features = COMMON_USER_BOOKE,
1784 .mmu_features = MMU_FTR_TYPE_44x,
1785 .icache_bsize = 32,
1786 .dcache_bsize = 32,
1787 .cpu_setup = __setup_cpu_440x5,
1788 .machine_check = machine_check_440A,
1789 .platform = "ppc440",
1790 },
1791 { /* 460EX */
1792 .pvr_mask = 0xffff0006,
1793 .pvr_value = 0x13020002,
1794 .cpu_name = "460EX",
1795 .cpu_features = CPU_FTRS_440x6,
1796 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1797 .mmu_features = MMU_FTR_TYPE_44x,
1798 .icache_bsize = 32,
1799 .dcache_bsize = 32,
1800 .cpu_setup = __setup_cpu_460ex,
1801 .machine_check = machine_check_440A,
1802 .platform = "ppc440",
1803 },
1804 { /* 460EX Rev B */
1805 .pvr_mask = 0xffff0007,
1806 .pvr_value = 0x13020004,
1807 .cpu_name = "460EX Rev. B",
1808 .cpu_features = CPU_FTRS_440x6,
1809 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1810 .mmu_features = MMU_FTR_TYPE_44x,
1811 .icache_bsize = 32,
1812 .dcache_bsize = 32,
1813 .cpu_setup = __setup_cpu_460ex,
1814 .machine_check = machine_check_440A,
1815 .platform = "ppc440",
1816 },
1817 { /* 460GT */
1818 .pvr_mask = 0xffff0006,
1819 .pvr_value = 0x13020000,
1820 .cpu_name = "460GT",
1821 .cpu_features = CPU_FTRS_440x6,
1822 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1823 .mmu_features = MMU_FTR_TYPE_44x,
1824 .icache_bsize = 32,
1825 .dcache_bsize = 32,
1826 .cpu_setup = __setup_cpu_460gt,
1827 .machine_check = machine_check_440A,
1828 .platform = "ppc440",
1829 },
1830 { /* 460GT Rev B */
1831 .pvr_mask = 0xffff0007,
1832 .pvr_value = 0x13020005,
1833 .cpu_name = "460GT Rev. B",
1834 .cpu_features = CPU_FTRS_440x6,
1835 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1836 .mmu_features = MMU_FTR_TYPE_44x,
1837 .icache_bsize = 32,
1838 .dcache_bsize = 32,
1839 .cpu_setup = __setup_cpu_460gt,
1840 .machine_check = machine_check_440A,
1841 .platform = "ppc440",
1842 },
1843 { /* 460SX */
1844 .pvr_mask = 0xffffff00,
1845 .pvr_value = 0x13541800,
1846 .cpu_name = "460SX",
1847 .cpu_features = CPU_FTRS_44X,
1848 .cpu_user_features = COMMON_USER_BOOKE,
1849 .mmu_features = MMU_FTR_TYPE_44x,
1850 .icache_bsize = 32,
1851 .dcache_bsize = 32,
1852 .cpu_setup = __setup_cpu_460sx,
1853 .machine_check = machine_check_440A,
1854 .platform = "ppc440",
1855 },
1856 { /* 464 in APM821xx */
1857 .pvr_mask = 0xfffffff0,
1858 .pvr_value = 0x12C41C80,
1859 .cpu_name = "APM821XX",
1860 .cpu_features = CPU_FTRS_44X,
1861 .cpu_user_features = COMMON_USER_BOOKE |
1862 PPC_FEATURE_HAS_FPU,
1863 .mmu_features = MMU_FTR_TYPE_44x,
1864 .icache_bsize = 32,
1865 .dcache_bsize = 32,
1866 .cpu_setup = __setup_cpu_apm821xx,
1867 .machine_check = machine_check_440A,
1868 .platform = "ppc440",
1869 },
1870 { /* 476 DD2 core */
1871 .pvr_mask = 0xffffffff,
1872 .pvr_value = 0x11a52080,
1873 .cpu_name = "476",
1874 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1875 .cpu_user_features = COMMON_USER_BOOKE |
1876 PPC_FEATURE_HAS_FPU,
1877 .mmu_features = MMU_FTR_TYPE_47x |
1878 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1879 .icache_bsize = 32,
1880 .dcache_bsize = 128,
1881 .machine_check = machine_check_47x,
1882 .platform = "ppc470",
1883 },
1884 { /* 476fpe */
1885 .pvr_mask = 0xffff0000,
1886 .pvr_value = 0x7ff50000,
1887 .cpu_name = "476fpe",
1888 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1889 .cpu_user_features = COMMON_USER_BOOKE |
1890 PPC_FEATURE_HAS_FPU,
1891 .mmu_features = MMU_FTR_TYPE_47x |
1892 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1893 .icache_bsize = 32,
1894 .dcache_bsize = 128,
1895 .machine_check = machine_check_47x,
1896 .platform = "ppc470",
1897 },
1898 { /* 476 iss */
1899 .pvr_mask = 0xffff0000,
1900 .pvr_value = 0x00050000,
1901 .cpu_name = "476",
1902 .cpu_features = CPU_FTRS_47X,
1903 .cpu_user_features = COMMON_USER_BOOKE |
1904 PPC_FEATURE_HAS_FPU,
1905 .mmu_features = MMU_FTR_TYPE_47x |
1906 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1907 .icache_bsize = 32,
1908 .dcache_bsize = 128,
1909 .machine_check = machine_check_47x,
1910 .platform = "ppc470",
1911 },
1912 { /* 476 others */
1913 .pvr_mask = 0xffff0000,
1914 .pvr_value = 0x11a50000,
1915 .cpu_name = "476",
1916 .cpu_features = CPU_FTRS_47X,
1917 .cpu_user_features = COMMON_USER_BOOKE |
1918 PPC_FEATURE_HAS_FPU,
1919 .mmu_features = MMU_FTR_TYPE_47x |
1920 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1921 .icache_bsize = 32,
1922 .dcache_bsize = 128,
1923 .machine_check = machine_check_47x,
1924 .platform = "ppc470",
1925 },
1926 { /* default match */
1927 .pvr_mask = 0x00000000,
1928 .pvr_value = 0x00000000,
1929 .cpu_name = "(generic 44x PPC)",
1930 .cpu_features = CPU_FTRS_44X,
1931 .cpu_user_features = COMMON_USER_BOOKE,
1932 .mmu_features = MMU_FTR_TYPE_44x,
1933 .icache_bsize = 32,
1934 .dcache_bsize = 32,
1935 .machine_check = machine_check_4xx,
1936 .platform = "ppc440",
1937 }
1938 #endif /* CONFIG_44x */
1939 #ifdef CONFIG_E200
1940 { /* e200z5 */
1941 .pvr_mask = 0xfff00000,
1942 .pvr_value = 0x81000000,
1943 .cpu_name = "e200z5",
1944 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1945 .cpu_features = CPU_FTRS_E200,
1946 .cpu_user_features = COMMON_USER_BOOKE |
1947 PPC_FEATURE_HAS_EFP_SINGLE |
1948 PPC_FEATURE_UNIFIED_CACHE,
1949 .mmu_features = MMU_FTR_TYPE_FSL_E,
1950 .dcache_bsize = 32,
1951 .machine_check = machine_check_e200,
1952 .platform = "ppc5554",
1953 },
1954 { /* e200z6 */
1955 .pvr_mask = 0xfff00000,
1956 .pvr_value = 0x81100000,
1957 .cpu_name = "e200z6",
1958 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1959 .cpu_features = CPU_FTRS_E200,
1960 .cpu_user_features = COMMON_USER_BOOKE |
1961 PPC_FEATURE_HAS_SPE_COMP |
1962 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1963 PPC_FEATURE_UNIFIED_CACHE,
1964 .mmu_features = MMU_FTR_TYPE_FSL_E,
1965 .dcache_bsize = 32,
1966 .machine_check = machine_check_e200,
1967 .platform = "ppc5554",
1968 },
1969 { /* default match */
1970 .pvr_mask = 0x00000000,
1971 .pvr_value = 0x00000000,
1972 .cpu_name = "(generic E200 PPC)",
1973 .cpu_features = CPU_FTRS_E200,
1974 .cpu_user_features = COMMON_USER_BOOKE |
1975 PPC_FEATURE_HAS_EFP_SINGLE |
1976 PPC_FEATURE_UNIFIED_CACHE,
1977 .mmu_features = MMU_FTR_TYPE_FSL_E,
1978 .dcache_bsize = 32,
1979 .cpu_setup = __setup_cpu_e200,
1980 .machine_check = machine_check_e200,
1981 .platform = "ppc5554",
1982 }
1983 #endif /* CONFIG_E200 */
1984 #endif /* CONFIG_PPC32 */
1985 #ifdef CONFIG_E500
1986 #ifdef CONFIG_PPC32
1987 #ifndef CONFIG_PPC_E500MC
1988 { /* e500 */
1989 .pvr_mask = 0xffff0000,
1990 .pvr_value = 0x80200000,
1991 .cpu_name = "e500",
1992 .cpu_features = CPU_FTRS_E500,
1993 .cpu_user_features = COMMON_USER_BOOKE |
1994 PPC_FEATURE_HAS_SPE_COMP |
1995 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1996 .cpu_user_features2 = PPC_FEATURE2_ISEL,
1997 .mmu_features = MMU_FTR_TYPE_FSL_E,
1998 .icache_bsize = 32,
1999 .dcache_bsize = 32,
2000 .num_pmcs = 4,
2001 .oprofile_cpu_type = "ppc/e500",
2002 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2003 .cpu_setup = __setup_cpu_e500v1,
2004 .machine_check = machine_check_e500,
2005 .platform = "ppc8540",
2006 },
2007 { /* e500v2 */
2008 .pvr_mask = 0xffff0000,
2009 .pvr_value = 0x80210000,
2010 .cpu_name = "e500v2",
2011 .cpu_features = CPU_FTRS_E500_2,
2012 .cpu_user_features = COMMON_USER_BOOKE |
2013 PPC_FEATURE_HAS_SPE_COMP |
2014 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2015 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2016 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2017 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2018 .icache_bsize = 32,
2019 .dcache_bsize = 32,
2020 .num_pmcs = 4,
2021 .oprofile_cpu_type = "ppc/e500",
2022 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2023 .cpu_setup = __setup_cpu_e500v2,
2024 .machine_check = machine_check_e500,
2025 .platform = "ppc8548",
2026 },
2027 #else
2028 { /* e500mc */
2029 .pvr_mask = 0xffff0000,
2030 .pvr_value = 0x80230000,
2031 .cpu_name = "e500mc",
2032 .cpu_features = CPU_FTRS_E500MC,
2033 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2034 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2035 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2036 MMU_FTR_USE_TLBILX,
2037 .icache_bsize = 64,
2038 .dcache_bsize = 64,
2039 .num_pmcs = 4,
2040 .oprofile_cpu_type = "ppc/e500mc",
2041 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2042 .cpu_setup = __setup_cpu_e500mc,
2043 .machine_check = machine_check_e500mc,
2044 .platform = "ppce500mc",
2045 },
2046 #endif /* CONFIG_PPC_E500MC */
2047 #endif /* CONFIG_PPC32 */
2048 #ifdef CONFIG_PPC_E500MC
2049 { /* e5500 */
2050 .pvr_mask = 0xffff0000,
2051 .pvr_value = 0x80240000,
2052 .cpu_name = "e5500",
2053 .cpu_features = CPU_FTRS_E5500,
2054 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2055 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2056 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2057 MMU_FTR_USE_TLBILX,
2058 .icache_bsize = 64,
2059 .dcache_bsize = 64,
2060 .num_pmcs = 4,
2061 .oprofile_cpu_type = "ppc/e500mc",
2062 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2063 .cpu_setup = __setup_cpu_e5500,
2064 #ifndef CONFIG_PPC32
2065 .cpu_restore = __restore_cpu_e5500,
2066 #endif
2067 .machine_check = machine_check_e500mc,
2068 .platform = "ppce5500",
2069 },
2070 { /* e6500 */
2071 .pvr_mask = 0xffff0000,
2072 .pvr_value = 0x80400000,
2073 .cpu_name = "e6500",
2074 .cpu_features = CPU_FTRS_E6500,
2075 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2076 PPC_FEATURE_HAS_ALTIVEC_COMP,
2077 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2078 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2079 MMU_FTR_USE_TLBILX,
2080 .icache_bsize = 64,
2081 .dcache_bsize = 64,
2082 .num_pmcs = 6,
2083 .oprofile_cpu_type = "ppc/e6500",
2084 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2085 .cpu_setup = __setup_cpu_e6500,
2086 #ifndef CONFIG_PPC32
2087 .cpu_restore = __restore_cpu_e6500,
2088 #endif
2089 .machine_check = machine_check_e500mc,
2090 .platform = "ppce6500",
2091 },
2092 #endif /* CONFIG_PPC_E500MC */
2093 #ifdef CONFIG_PPC32
2094 { /* default match */
2095 .pvr_mask = 0x00000000,
2096 .pvr_value = 0x00000000,
2097 .cpu_name = "(generic E500 PPC)",
2098 .cpu_features = CPU_FTRS_E500,
2099 .cpu_user_features = COMMON_USER_BOOKE |
2100 PPC_FEATURE_HAS_SPE_COMP |
2101 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2102 .mmu_features = MMU_FTR_TYPE_FSL_E,
2103 .icache_bsize = 32,
2104 .dcache_bsize = 32,
2105 .machine_check = machine_check_e500,
2106 .platform = "powerpc",
2107 }
2108 #endif /* CONFIG_PPC32 */
2109 #endif /* CONFIG_E500 */
2110 };
2111
2112 static struct cpu_spec the_cpu_spec;
2113
2114 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2115 struct cpu_spec *s)
2116 {
2117 struct cpu_spec *t = &the_cpu_spec;
2118 struct cpu_spec old;
2119
2120 t = PTRRELOC(t);
2121 old = *t;
2122
2123 /* Copy everything, then do fixups */
2124 *t = *s;
2125
2126 /*
2127 * If we are overriding a previous value derived from the real
2128 * PVR with a new value obtained using a logical PVR value,
2129 * don't modify the performance monitor fields.
2130 */
2131 if (old.num_pmcs && !s->num_pmcs) {
2132 t->num_pmcs = old.num_pmcs;
2133 t->pmc_type = old.pmc_type;
2134 t->oprofile_type = old.oprofile_type;
2135 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2136 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2137 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2138
2139 /*
2140 * If we have passed through this logic once before and
2141 * have pulled the default case because the real PVR was
2142 * not found inside cpu_specs[], then we are possibly
2143 * running in compatibility mode. In that case, let the
2144 * oprofiler know which set of compatibility counters to
2145 * pull from by making sure the oprofile_cpu_type string
2146 * is set to that of compatibility mode. If the
2147 * oprofile_cpu_type already has a value, then we are
2148 * possibly overriding a real PVR with a logical one,
2149 * and, in that case, keep the current value for
2150 * oprofile_cpu_type.
2151 */
2152 if (old.oprofile_cpu_type != NULL) {
2153 t->oprofile_cpu_type = old.oprofile_cpu_type;
2154 t->oprofile_type = old.oprofile_type;
2155 }
2156 }
2157
2158 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2159
2160 /*
2161 * Set the base platform string once; assumes
2162 * we're called with real pvr first.
2163 */
2164 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2165 *PTRRELOC(&powerpc_base_platform) = t->platform;
2166
2167 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2168 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2169 * that processor. I will consolidate that at a later time, for now,
2170 * just use #ifdef. We also don't need to PTRRELOC the function
2171 * pointer on ppc64 and booke as we are running at 0 in real mode
2172 * on ppc64 and reloc_offset is always 0 on booke.
2173 */
2174 if (t->cpu_setup) {
2175 t->cpu_setup(offset, t);
2176 }
2177 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2178
2179 return t;
2180 }
2181
2182 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2183 {
2184 struct cpu_spec *s = cpu_specs;
2185 int i;
2186
2187 s = PTRRELOC(s);
2188
2189 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2190 if ((pvr & s->pvr_mask) == s->pvr_value)
2191 return setup_cpu_spec(offset, s);
2192 }
2193
2194 BUG();
2195
2196 return NULL;
2197 }
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