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powerpc/44x: Add support for the AMCC APM821xx SoC
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23
24 struct cpu_spec* cur_cpu_spec = NULL;
25 EXPORT_SYMBOL(cur_cpu_spec);
26
27 /* The platform string corresponding to the real PVR */
28 const char *powerpc_base_platform;
29
30 /* NOTE:
31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
32 * the responsibility of the appropriate CPU save/restore functions to
33 * eventually copy these settings over. Those save/restore aren't yet
34 * part of the cputable though. That has to be fixed for both ppc32
35 * and ppc64
36 */
37 #ifdef CONFIG_PPC32
38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
51 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
52 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
53 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
60 #endif /* CONFIG_PPC32 */
61 #ifdef CONFIG_PPC64
62 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
63 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
64 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
65 extern void __restore_cpu_pa6t(void);
66 extern void __restore_cpu_ppc970(void);
67 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
68 extern void __restore_cpu_power7(void);
69 #endif /* CONFIG_PPC64 */
70
71 /* This table only contains "desktop" CPUs, it need to be filled with embedded
72 * ones as well...
73 */
74 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
75 PPC_FEATURE_HAS_MMU)
76 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
77 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
78 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
79 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
80 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
81 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
82 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
83 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
84 PPC_FEATURE_TRUE_LE | \
85 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
86 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
87 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
88 PPC_FEATURE_TRUE_LE | \
89 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
90 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
91 PPC_FEATURE_TRUE_LE | \
92 PPC_FEATURE_HAS_ALTIVEC_COMP)
93 #ifdef CONFIG_PPC_BOOK3E_64
94 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
95 #else
96 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
97 PPC_FEATURE_BOOKE)
98 #endif
99
100 static struct cpu_spec __initdata cpu_specs[] = {
101 #ifdef CONFIG_PPC_BOOK3S_64
102 { /* Power3 */
103 .pvr_mask = 0xffff0000,
104 .pvr_value = 0x00400000,
105 .cpu_name = "POWER3 (630)",
106 .cpu_features = CPU_FTRS_POWER3,
107 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
108 .mmu_features = MMU_FTR_HPTE_TABLE,
109 .icache_bsize = 128,
110 .dcache_bsize = 128,
111 .num_pmcs = 8,
112 .pmc_type = PPC_PMC_IBM,
113 .oprofile_cpu_type = "ppc64/power3",
114 .oprofile_type = PPC_OPROFILE_RS64,
115 .machine_check = machine_check_generic,
116 .platform = "power3",
117 },
118 { /* Power3+ */
119 .pvr_mask = 0xffff0000,
120 .pvr_value = 0x00410000,
121 .cpu_name = "POWER3 (630+)",
122 .cpu_features = CPU_FTRS_POWER3,
123 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
124 .mmu_features = MMU_FTR_HPTE_TABLE,
125 .icache_bsize = 128,
126 .dcache_bsize = 128,
127 .num_pmcs = 8,
128 .pmc_type = PPC_PMC_IBM,
129 .oprofile_cpu_type = "ppc64/power3",
130 .oprofile_type = PPC_OPROFILE_RS64,
131 .machine_check = machine_check_generic,
132 .platform = "power3",
133 },
134 { /* Northstar */
135 .pvr_mask = 0xffff0000,
136 .pvr_value = 0x00330000,
137 .cpu_name = "RS64-II (northstar)",
138 .cpu_features = CPU_FTRS_RS64,
139 .cpu_user_features = COMMON_USER_PPC64,
140 .mmu_features = MMU_FTR_HPTE_TABLE,
141 .icache_bsize = 128,
142 .dcache_bsize = 128,
143 .num_pmcs = 8,
144 .pmc_type = PPC_PMC_IBM,
145 .oprofile_cpu_type = "ppc64/rs64",
146 .oprofile_type = PPC_OPROFILE_RS64,
147 .machine_check = machine_check_generic,
148 .platform = "rs64",
149 },
150 { /* Pulsar */
151 .pvr_mask = 0xffff0000,
152 .pvr_value = 0x00340000,
153 .cpu_name = "RS64-III (pulsar)",
154 .cpu_features = CPU_FTRS_RS64,
155 .cpu_user_features = COMMON_USER_PPC64,
156 .mmu_features = MMU_FTR_HPTE_TABLE,
157 .icache_bsize = 128,
158 .dcache_bsize = 128,
159 .num_pmcs = 8,
160 .pmc_type = PPC_PMC_IBM,
161 .oprofile_cpu_type = "ppc64/rs64",
162 .oprofile_type = PPC_OPROFILE_RS64,
163 .machine_check = machine_check_generic,
164 .platform = "rs64",
165 },
166 { /* I-star */
167 .pvr_mask = 0xffff0000,
168 .pvr_value = 0x00360000,
169 .cpu_name = "RS64-III (icestar)",
170 .cpu_features = CPU_FTRS_RS64,
171 .cpu_user_features = COMMON_USER_PPC64,
172 .mmu_features = MMU_FTR_HPTE_TABLE,
173 .icache_bsize = 128,
174 .dcache_bsize = 128,
175 .num_pmcs = 8,
176 .pmc_type = PPC_PMC_IBM,
177 .oprofile_cpu_type = "ppc64/rs64",
178 .oprofile_type = PPC_OPROFILE_RS64,
179 .machine_check = machine_check_generic,
180 .platform = "rs64",
181 },
182 { /* S-star */
183 .pvr_mask = 0xffff0000,
184 .pvr_value = 0x00370000,
185 .cpu_name = "RS64-IV (sstar)",
186 .cpu_features = CPU_FTRS_RS64,
187 .cpu_user_features = COMMON_USER_PPC64,
188 .mmu_features = MMU_FTR_HPTE_TABLE,
189 .icache_bsize = 128,
190 .dcache_bsize = 128,
191 .num_pmcs = 8,
192 .pmc_type = PPC_PMC_IBM,
193 .oprofile_cpu_type = "ppc64/rs64",
194 .oprofile_type = PPC_OPROFILE_RS64,
195 .machine_check = machine_check_generic,
196 .platform = "rs64",
197 },
198 { /* Power4 */
199 .pvr_mask = 0xffff0000,
200 .pvr_value = 0x00350000,
201 .cpu_name = "POWER4 (gp)",
202 .cpu_features = CPU_FTRS_POWER4,
203 .cpu_user_features = COMMON_USER_POWER4,
204 .mmu_features = MMU_FTR_HPTE_TABLE,
205 .icache_bsize = 128,
206 .dcache_bsize = 128,
207 .num_pmcs = 8,
208 .pmc_type = PPC_PMC_IBM,
209 .oprofile_cpu_type = "ppc64/power4",
210 .oprofile_type = PPC_OPROFILE_POWER4,
211 .machine_check = machine_check_generic,
212 .platform = "power4",
213 },
214 { /* Power4+ */
215 .pvr_mask = 0xffff0000,
216 .pvr_value = 0x00380000,
217 .cpu_name = "POWER4+ (gq)",
218 .cpu_features = CPU_FTRS_POWER4,
219 .cpu_user_features = COMMON_USER_POWER4,
220 .mmu_features = MMU_FTR_HPTE_TABLE,
221 .icache_bsize = 128,
222 .dcache_bsize = 128,
223 .num_pmcs = 8,
224 .pmc_type = PPC_PMC_IBM,
225 .oprofile_cpu_type = "ppc64/power4",
226 .oprofile_type = PPC_OPROFILE_POWER4,
227 .machine_check = machine_check_generic,
228 .platform = "power4",
229 },
230 { /* PPC970 */
231 .pvr_mask = 0xffff0000,
232 .pvr_value = 0x00390000,
233 .cpu_name = "PPC970",
234 .cpu_features = CPU_FTRS_PPC970,
235 .cpu_user_features = COMMON_USER_POWER4 |
236 PPC_FEATURE_HAS_ALTIVEC_COMP,
237 .mmu_features = MMU_FTR_HPTE_TABLE,
238 .icache_bsize = 128,
239 .dcache_bsize = 128,
240 .num_pmcs = 8,
241 .pmc_type = PPC_PMC_IBM,
242 .cpu_setup = __setup_cpu_ppc970,
243 .cpu_restore = __restore_cpu_ppc970,
244 .oprofile_cpu_type = "ppc64/970",
245 .oprofile_type = PPC_OPROFILE_POWER4,
246 .machine_check = machine_check_generic,
247 .platform = "ppc970",
248 },
249 { /* PPC970FX */
250 .pvr_mask = 0xffff0000,
251 .pvr_value = 0x003c0000,
252 .cpu_name = "PPC970FX",
253 .cpu_features = CPU_FTRS_PPC970,
254 .cpu_user_features = COMMON_USER_POWER4 |
255 PPC_FEATURE_HAS_ALTIVEC_COMP,
256 .mmu_features = MMU_FTR_HPTE_TABLE,
257 .icache_bsize = 128,
258 .dcache_bsize = 128,
259 .num_pmcs = 8,
260 .pmc_type = PPC_PMC_IBM,
261 .cpu_setup = __setup_cpu_ppc970,
262 .cpu_restore = __restore_cpu_ppc970,
263 .oprofile_cpu_type = "ppc64/970",
264 .oprofile_type = PPC_OPROFILE_POWER4,
265 .machine_check = machine_check_generic,
266 .platform = "ppc970",
267 },
268 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
269 .pvr_mask = 0xffffffff,
270 .pvr_value = 0x00440100,
271 .cpu_name = "PPC970MP",
272 .cpu_features = CPU_FTRS_PPC970,
273 .cpu_user_features = COMMON_USER_POWER4 |
274 PPC_FEATURE_HAS_ALTIVEC_COMP,
275 .mmu_features = MMU_FTR_HPTE_TABLE,
276 .icache_bsize = 128,
277 .dcache_bsize = 128,
278 .num_pmcs = 8,
279 .pmc_type = PPC_PMC_IBM,
280 .cpu_setup = __setup_cpu_ppc970,
281 .cpu_restore = __restore_cpu_ppc970,
282 .oprofile_cpu_type = "ppc64/970MP",
283 .oprofile_type = PPC_OPROFILE_POWER4,
284 .machine_check = machine_check_generic,
285 .platform = "ppc970",
286 },
287 { /* PPC970MP */
288 .pvr_mask = 0xffff0000,
289 .pvr_value = 0x00440000,
290 .cpu_name = "PPC970MP",
291 .cpu_features = CPU_FTRS_PPC970,
292 .cpu_user_features = COMMON_USER_POWER4 |
293 PPC_FEATURE_HAS_ALTIVEC_COMP,
294 .mmu_features = MMU_FTR_HPTE_TABLE,
295 .icache_bsize = 128,
296 .dcache_bsize = 128,
297 .num_pmcs = 8,
298 .pmc_type = PPC_PMC_IBM,
299 .cpu_setup = __setup_cpu_ppc970MP,
300 .cpu_restore = __restore_cpu_ppc970,
301 .oprofile_cpu_type = "ppc64/970MP",
302 .oprofile_type = PPC_OPROFILE_POWER4,
303 .machine_check = machine_check_generic,
304 .platform = "ppc970",
305 },
306 { /* PPC970GX */
307 .pvr_mask = 0xffff0000,
308 .pvr_value = 0x00450000,
309 .cpu_name = "PPC970GX",
310 .cpu_features = CPU_FTRS_PPC970,
311 .cpu_user_features = COMMON_USER_POWER4 |
312 PPC_FEATURE_HAS_ALTIVEC_COMP,
313 .mmu_features = MMU_FTR_HPTE_TABLE,
314 .icache_bsize = 128,
315 .dcache_bsize = 128,
316 .num_pmcs = 8,
317 .pmc_type = PPC_PMC_IBM,
318 .cpu_setup = __setup_cpu_ppc970,
319 .oprofile_cpu_type = "ppc64/970",
320 .oprofile_type = PPC_OPROFILE_POWER4,
321 .machine_check = machine_check_generic,
322 .platform = "ppc970",
323 },
324 { /* Power5 GR */
325 .pvr_mask = 0xffff0000,
326 .pvr_value = 0x003a0000,
327 .cpu_name = "POWER5 (gr)",
328 .cpu_features = CPU_FTRS_POWER5,
329 .cpu_user_features = COMMON_USER_POWER5,
330 .mmu_features = MMU_FTR_HPTE_TABLE,
331 .icache_bsize = 128,
332 .dcache_bsize = 128,
333 .num_pmcs = 6,
334 .pmc_type = PPC_PMC_IBM,
335 .oprofile_cpu_type = "ppc64/power5",
336 .oprofile_type = PPC_OPROFILE_POWER4,
337 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
338 * and above but only works on POWER5 and above
339 */
340 .oprofile_mmcra_sihv = MMCRA_SIHV,
341 .oprofile_mmcra_sipr = MMCRA_SIPR,
342 .machine_check = machine_check_generic,
343 .platform = "power5",
344 },
345 { /* Power5++ */
346 .pvr_mask = 0xffffff00,
347 .pvr_value = 0x003b0300,
348 .cpu_name = "POWER5+ (gs)",
349 .cpu_features = CPU_FTRS_POWER5,
350 .cpu_user_features = COMMON_USER_POWER5_PLUS,
351 .mmu_features = MMU_FTR_HPTE_TABLE,
352 .icache_bsize = 128,
353 .dcache_bsize = 128,
354 .num_pmcs = 6,
355 .oprofile_cpu_type = "ppc64/power5++",
356 .oprofile_type = PPC_OPROFILE_POWER4,
357 .oprofile_mmcra_sihv = MMCRA_SIHV,
358 .oprofile_mmcra_sipr = MMCRA_SIPR,
359 .machine_check = machine_check_generic,
360 .platform = "power5+",
361 },
362 { /* Power5 GS */
363 .pvr_mask = 0xffff0000,
364 .pvr_value = 0x003b0000,
365 .cpu_name = "POWER5+ (gs)",
366 .cpu_features = CPU_FTRS_POWER5,
367 .cpu_user_features = COMMON_USER_POWER5_PLUS,
368 .mmu_features = MMU_FTR_HPTE_TABLE,
369 .icache_bsize = 128,
370 .dcache_bsize = 128,
371 .num_pmcs = 6,
372 .pmc_type = PPC_PMC_IBM,
373 .oprofile_cpu_type = "ppc64/power5+",
374 .oprofile_type = PPC_OPROFILE_POWER4,
375 .oprofile_mmcra_sihv = MMCRA_SIHV,
376 .oprofile_mmcra_sipr = MMCRA_SIPR,
377 .machine_check = machine_check_generic,
378 .platform = "power5+",
379 },
380 { /* POWER6 in P5+ mode; 2.04-compliant processor */
381 .pvr_mask = 0xffffffff,
382 .pvr_value = 0x0f000001,
383 .cpu_name = "POWER5+",
384 .cpu_features = CPU_FTRS_POWER5,
385 .cpu_user_features = COMMON_USER_POWER5_PLUS,
386 .mmu_features = MMU_FTR_HPTE_TABLE,
387 .icache_bsize = 128,
388 .dcache_bsize = 128,
389 .machine_check = machine_check_generic,
390 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
391 .oprofile_type = PPC_OPROFILE_POWER4,
392 .platform = "power5+",
393 },
394 { /* Power6 */
395 .pvr_mask = 0xffff0000,
396 .pvr_value = 0x003e0000,
397 .cpu_name = "POWER6 (raw)",
398 .cpu_features = CPU_FTRS_POWER6,
399 .cpu_user_features = COMMON_USER_POWER6 |
400 PPC_FEATURE_POWER6_EXT,
401 .mmu_features = MMU_FTR_HPTE_TABLE,
402 .icache_bsize = 128,
403 .dcache_bsize = 128,
404 .num_pmcs = 6,
405 .pmc_type = PPC_PMC_IBM,
406 .oprofile_cpu_type = "ppc64/power6",
407 .oprofile_type = PPC_OPROFILE_POWER4,
408 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
409 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
410 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
411 POWER6_MMCRA_OTHER,
412 .machine_check = machine_check_generic,
413 .platform = "power6x",
414 },
415 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
416 .pvr_mask = 0xffffffff,
417 .pvr_value = 0x0f000002,
418 .cpu_name = "POWER6 (architected)",
419 .cpu_features = CPU_FTRS_POWER6,
420 .cpu_user_features = COMMON_USER_POWER6,
421 .mmu_features = MMU_FTR_HPTE_TABLE,
422 .icache_bsize = 128,
423 .dcache_bsize = 128,
424 .machine_check = machine_check_generic,
425 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
426 .oprofile_type = PPC_OPROFILE_POWER4,
427 .platform = "power6",
428 },
429 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
430 .pvr_mask = 0xffffffff,
431 .pvr_value = 0x0f000003,
432 .cpu_name = "POWER7 (architected)",
433 .cpu_features = CPU_FTRS_POWER7,
434 .cpu_user_features = COMMON_USER_POWER7,
435 .mmu_features = MMU_FTR_HPTE_TABLE |
436 MMU_FTR_TLBIE_206,
437 .icache_bsize = 128,
438 .dcache_bsize = 128,
439 .machine_check = machine_check_generic,
440 .oprofile_type = PPC_OPROFILE_POWER4,
441 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
442 .platform = "power7",
443 },
444 { /* Power7 */
445 .pvr_mask = 0xffff0000,
446 .pvr_value = 0x003f0000,
447 .cpu_name = "POWER7 (raw)",
448 .cpu_features = CPU_FTRS_POWER7,
449 .cpu_user_features = COMMON_USER_POWER7,
450 .mmu_features = MMU_FTR_HPTE_TABLE |
451 MMU_FTR_TLBIE_206,
452 .icache_bsize = 128,
453 .dcache_bsize = 128,
454 .num_pmcs = 6,
455 .pmc_type = PPC_PMC_IBM,
456 .cpu_setup = __setup_cpu_power7,
457 .cpu_restore = __restore_cpu_power7,
458 .oprofile_cpu_type = "ppc64/power7",
459 .oprofile_type = PPC_OPROFILE_POWER4,
460 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
461 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
462 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
463 POWER6_MMCRA_OTHER,
464 .platform = "power7",
465 },
466 { /* Cell Broadband Engine */
467 .pvr_mask = 0xffff0000,
468 .pvr_value = 0x00700000,
469 .cpu_name = "Cell Broadband Engine",
470 .cpu_features = CPU_FTRS_CELL,
471 .cpu_user_features = COMMON_USER_PPC64 |
472 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
473 PPC_FEATURE_SMT,
474 .mmu_features = MMU_FTR_HPTE_TABLE,
475 .icache_bsize = 128,
476 .dcache_bsize = 128,
477 .num_pmcs = 4,
478 .pmc_type = PPC_PMC_IBM,
479 .oprofile_cpu_type = "ppc64/cell-be",
480 .oprofile_type = PPC_OPROFILE_CELL,
481 .machine_check = machine_check_generic,
482 .platform = "ppc-cell-be",
483 },
484 { /* PA Semi PA6T */
485 .pvr_mask = 0x7fff0000,
486 .pvr_value = 0x00900000,
487 .cpu_name = "PA6T",
488 .cpu_features = CPU_FTRS_PA6T,
489 .cpu_user_features = COMMON_USER_PA6T,
490 .mmu_features = MMU_FTR_HPTE_TABLE,
491 .icache_bsize = 64,
492 .dcache_bsize = 64,
493 .num_pmcs = 6,
494 .pmc_type = PPC_PMC_PA6T,
495 .cpu_setup = __setup_cpu_pa6t,
496 .cpu_restore = __restore_cpu_pa6t,
497 .oprofile_cpu_type = "ppc64/pa6t",
498 .oprofile_type = PPC_OPROFILE_PA6T,
499 .machine_check = machine_check_generic,
500 .platform = "pa6t",
501 },
502 { /* default match */
503 .pvr_mask = 0x00000000,
504 .pvr_value = 0x00000000,
505 .cpu_name = "POWER4 (compatible)",
506 .cpu_features = CPU_FTRS_COMPATIBLE,
507 .cpu_user_features = COMMON_USER_PPC64,
508 .mmu_features = MMU_FTR_HPTE_TABLE,
509 .icache_bsize = 128,
510 .dcache_bsize = 128,
511 .num_pmcs = 6,
512 .pmc_type = PPC_PMC_IBM,
513 .machine_check = machine_check_generic,
514 .platform = "power4",
515 }
516 #endif /* CONFIG_PPC_BOOK3S_64 */
517
518 #ifdef CONFIG_PPC32
519 #if CLASSIC_PPC
520 { /* 601 */
521 .pvr_mask = 0xffff0000,
522 .pvr_value = 0x00010000,
523 .cpu_name = "601",
524 .cpu_features = CPU_FTRS_PPC601,
525 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
526 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
527 .mmu_features = MMU_FTR_HPTE_TABLE,
528 .icache_bsize = 32,
529 .dcache_bsize = 32,
530 .machine_check = machine_check_generic,
531 .platform = "ppc601",
532 },
533 { /* 603 */
534 .pvr_mask = 0xffff0000,
535 .pvr_value = 0x00030000,
536 .cpu_name = "603",
537 .cpu_features = CPU_FTRS_603,
538 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
539 .mmu_features = 0,
540 .icache_bsize = 32,
541 .dcache_bsize = 32,
542 .cpu_setup = __setup_cpu_603,
543 .machine_check = machine_check_generic,
544 .platform = "ppc603",
545 },
546 { /* 603e */
547 .pvr_mask = 0xffff0000,
548 .pvr_value = 0x00060000,
549 .cpu_name = "603e",
550 .cpu_features = CPU_FTRS_603,
551 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
552 .mmu_features = 0,
553 .icache_bsize = 32,
554 .dcache_bsize = 32,
555 .cpu_setup = __setup_cpu_603,
556 .machine_check = machine_check_generic,
557 .platform = "ppc603",
558 },
559 { /* 603ev */
560 .pvr_mask = 0xffff0000,
561 .pvr_value = 0x00070000,
562 .cpu_name = "603ev",
563 .cpu_features = CPU_FTRS_603,
564 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
565 .mmu_features = 0,
566 .icache_bsize = 32,
567 .dcache_bsize = 32,
568 .cpu_setup = __setup_cpu_603,
569 .machine_check = machine_check_generic,
570 .platform = "ppc603",
571 },
572 { /* 604 */
573 .pvr_mask = 0xffff0000,
574 .pvr_value = 0x00040000,
575 .cpu_name = "604",
576 .cpu_features = CPU_FTRS_604,
577 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
578 .mmu_features = MMU_FTR_HPTE_TABLE,
579 .icache_bsize = 32,
580 .dcache_bsize = 32,
581 .num_pmcs = 2,
582 .cpu_setup = __setup_cpu_604,
583 .machine_check = machine_check_generic,
584 .platform = "ppc604",
585 },
586 { /* 604e */
587 .pvr_mask = 0xfffff000,
588 .pvr_value = 0x00090000,
589 .cpu_name = "604e",
590 .cpu_features = CPU_FTRS_604,
591 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
592 .mmu_features = MMU_FTR_HPTE_TABLE,
593 .icache_bsize = 32,
594 .dcache_bsize = 32,
595 .num_pmcs = 4,
596 .cpu_setup = __setup_cpu_604,
597 .machine_check = machine_check_generic,
598 .platform = "ppc604",
599 },
600 { /* 604r */
601 .pvr_mask = 0xffff0000,
602 .pvr_value = 0x00090000,
603 .cpu_name = "604r",
604 .cpu_features = CPU_FTRS_604,
605 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
606 .mmu_features = MMU_FTR_HPTE_TABLE,
607 .icache_bsize = 32,
608 .dcache_bsize = 32,
609 .num_pmcs = 4,
610 .cpu_setup = __setup_cpu_604,
611 .machine_check = machine_check_generic,
612 .platform = "ppc604",
613 },
614 { /* 604ev */
615 .pvr_mask = 0xffff0000,
616 .pvr_value = 0x000a0000,
617 .cpu_name = "604ev",
618 .cpu_features = CPU_FTRS_604,
619 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
620 .mmu_features = MMU_FTR_HPTE_TABLE,
621 .icache_bsize = 32,
622 .dcache_bsize = 32,
623 .num_pmcs = 4,
624 .cpu_setup = __setup_cpu_604,
625 .machine_check = machine_check_generic,
626 .platform = "ppc604",
627 },
628 { /* 740/750 (0x4202, don't support TAU ?) */
629 .pvr_mask = 0xffffffff,
630 .pvr_value = 0x00084202,
631 .cpu_name = "740/750",
632 .cpu_features = CPU_FTRS_740_NOTAU,
633 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
634 .mmu_features = MMU_FTR_HPTE_TABLE,
635 .icache_bsize = 32,
636 .dcache_bsize = 32,
637 .num_pmcs = 4,
638 .cpu_setup = __setup_cpu_750,
639 .machine_check = machine_check_generic,
640 .platform = "ppc750",
641 },
642 { /* 750CX (80100 and 8010x?) */
643 .pvr_mask = 0xfffffff0,
644 .pvr_value = 0x00080100,
645 .cpu_name = "750CX",
646 .cpu_features = CPU_FTRS_750,
647 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
648 .mmu_features = MMU_FTR_HPTE_TABLE,
649 .icache_bsize = 32,
650 .dcache_bsize = 32,
651 .num_pmcs = 4,
652 .cpu_setup = __setup_cpu_750cx,
653 .machine_check = machine_check_generic,
654 .platform = "ppc750",
655 },
656 { /* 750CX (82201 and 82202) */
657 .pvr_mask = 0xfffffff0,
658 .pvr_value = 0x00082200,
659 .cpu_name = "750CX",
660 .cpu_features = CPU_FTRS_750,
661 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
662 .mmu_features = MMU_FTR_HPTE_TABLE,
663 .icache_bsize = 32,
664 .dcache_bsize = 32,
665 .num_pmcs = 4,
666 .pmc_type = PPC_PMC_IBM,
667 .cpu_setup = __setup_cpu_750cx,
668 .machine_check = machine_check_generic,
669 .platform = "ppc750",
670 },
671 { /* 750CXe (82214) */
672 .pvr_mask = 0xfffffff0,
673 .pvr_value = 0x00082210,
674 .cpu_name = "750CXe",
675 .cpu_features = CPU_FTRS_750,
676 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
677 .mmu_features = MMU_FTR_HPTE_TABLE,
678 .icache_bsize = 32,
679 .dcache_bsize = 32,
680 .num_pmcs = 4,
681 .pmc_type = PPC_PMC_IBM,
682 .cpu_setup = __setup_cpu_750cx,
683 .machine_check = machine_check_generic,
684 .platform = "ppc750",
685 },
686 { /* 750CXe "Gekko" (83214) */
687 .pvr_mask = 0xffffffff,
688 .pvr_value = 0x00083214,
689 .cpu_name = "750CXe",
690 .cpu_features = CPU_FTRS_750,
691 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
692 .mmu_features = MMU_FTR_HPTE_TABLE,
693 .icache_bsize = 32,
694 .dcache_bsize = 32,
695 .num_pmcs = 4,
696 .pmc_type = PPC_PMC_IBM,
697 .cpu_setup = __setup_cpu_750cx,
698 .machine_check = machine_check_generic,
699 .platform = "ppc750",
700 },
701 { /* 750CL (and "Broadway") */
702 .pvr_mask = 0xfffff0e0,
703 .pvr_value = 0x00087000,
704 .cpu_name = "750CL",
705 .cpu_features = CPU_FTRS_750CL,
706 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
707 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
708 .icache_bsize = 32,
709 .dcache_bsize = 32,
710 .num_pmcs = 4,
711 .pmc_type = PPC_PMC_IBM,
712 .cpu_setup = __setup_cpu_750,
713 .machine_check = machine_check_generic,
714 .platform = "ppc750",
715 .oprofile_cpu_type = "ppc/750",
716 .oprofile_type = PPC_OPROFILE_G4,
717 },
718 { /* 745/755 */
719 .pvr_mask = 0xfffff000,
720 .pvr_value = 0x00083000,
721 .cpu_name = "745/755",
722 .cpu_features = CPU_FTRS_750,
723 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
724 .mmu_features = MMU_FTR_HPTE_TABLE,
725 .icache_bsize = 32,
726 .dcache_bsize = 32,
727 .num_pmcs = 4,
728 .pmc_type = PPC_PMC_IBM,
729 .cpu_setup = __setup_cpu_750,
730 .machine_check = machine_check_generic,
731 .platform = "ppc750",
732 },
733 { /* 750FX rev 1.x */
734 .pvr_mask = 0xffffff00,
735 .pvr_value = 0x70000100,
736 .cpu_name = "750FX",
737 .cpu_features = CPU_FTRS_750FX1,
738 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
739 .mmu_features = MMU_FTR_HPTE_TABLE,
740 .icache_bsize = 32,
741 .dcache_bsize = 32,
742 .num_pmcs = 4,
743 .pmc_type = PPC_PMC_IBM,
744 .cpu_setup = __setup_cpu_750,
745 .machine_check = machine_check_generic,
746 .platform = "ppc750",
747 .oprofile_cpu_type = "ppc/750",
748 .oprofile_type = PPC_OPROFILE_G4,
749 },
750 { /* 750FX rev 2.0 must disable HID0[DPM] */
751 .pvr_mask = 0xffffffff,
752 .pvr_value = 0x70000200,
753 .cpu_name = "750FX",
754 .cpu_features = CPU_FTRS_750FX2,
755 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
756 .mmu_features = MMU_FTR_HPTE_TABLE,
757 .icache_bsize = 32,
758 .dcache_bsize = 32,
759 .num_pmcs = 4,
760 .pmc_type = PPC_PMC_IBM,
761 .cpu_setup = __setup_cpu_750,
762 .machine_check = machine_check_generic,
763 .platform = "ppc750",
764 .oprofile_cpu_type = "ppc/750",
765 .oprofile_type = PPC_OPROFILE_G4,
766 },
767 { /* 750FX (All revs except 2.0) */
768 .pvr_mask = 0xffff0000,
769 .pvr_value = 0x70000000,
770 .cpu_name = "750FX",
771 .cpu_features = CPU_FTRS_750FX,
772 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
773 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
774 .icache_bsize = 32,
775 .dcache_bsize = 32,
776 .num_pmcs = 4,
777 .pmc_type = PPC_PMC_IBM,
778 .cpu_setup = __setup_cpu_750fx,
779 .machine_check = machine_check_generic,
780 .platform = "ppc750",
781 .oprofile_cpu_type = "ppc/750",
782 .oprofile_type = PPC_OPROFILE_G4,
783 },
784 { /* 750GX */
785 .pvr_mask = 0xffff0000,
786 .pvr_value = 0x70020000,
787 .cpu_name = "750GX",
788 .cpu_features = CPU_FTRS_750GX,
789 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
790 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
791 .icache_bsize = 32,
792 .dcache_bsize = 32,
793 .num_pmcs = 4,
794 .pmc_type = PPC_PMC_IBM,
795 .cpu_setup = __setup_cpu_750fx,
796 .machine_check = machine_check_generic,
797 .platform = "ppc750",
798 .oprofile_cpu_type = "ppc/750",
799 .oprofile_type = PPC_OPROFILE_G4,
800 },
801 { /* 740/750 (L2CR bit need fixup for 740) */
802 .pvr_mask = 0xffff0000,
803 .pvr_value = 0x00080000,
804 .cpu_name = "740/750",
805 .cpu_features = CPU_FTRS_740,
806 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
807 .mmu_features = MMU_FTR_HPTE_TABLE,
808 .icache_bsize = 32,
809 .dcache_bsize = 32,
810 .num_pmcs = 4,
811 .pmc_type = PPC_PMC_IBM,
812 .cpu_setup = __setup_cpu_750,
813 .machine_check = machine_check_generic,
814 .platform = "ppc750",
815 },
816 { /* 7400 rev 1.1 ? (no TAU) */
817 .pvr_mask = 0xffffffff,
818 .pvr_value = 0x000c1101,
819 .cpu_name = "7400 (1.1)",
820 .cpu_features = CPU_FTRS_7400_NOTAU,
821 .cpu_user_features = COMMON_USER |
822 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
823 .mmu_features = MMU_FTR_HPTE_TABLE,
824 .icache_bsize = 32,
825 .dcache_bsize = 32,
826 .num_pmcs = 4,
827 .pmc_type = PPC_PMC_G4,
828 .cpu_setup = __setup_cpu_7400,
829 .machine_check = machine_check_generic,
830 .platform = "ppc7400",
831 },
832 { /* 7400 */
833 .pvr_mask = 0xffff0000,
834 .pvr_value = 0x000c0000,
835 .cpu_name = "7400",
836 .cpu_features = CPU_FTRS_7400,
837 .cpu_user_features = COMMON_USER |
838 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
839 .mmu_features = MMU_FTR_HPTE_TABLE,
840 .icache_bsize = 32,
841 .dcache_bsize = 32,
842 .num_pmcs = 4,
843 .pmc_type = PPC_PMC_G4,
844 .cpu_setup = __setup_cpu_7400,
845 .machine_check = machine_check_generic,
846 .platform = "ppc7400",
847 },
848 { /* 7410 */
849 .pvr_mask = 0xffff0000,
850 .pvr_value = 0x800c0000,
851 .cpu_name = "7410",
852 .cpu_features = CPU_FTRS_7400,
853 .cpu_user_features = COMMON_USER |
854 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
855 .mmu_features = MMU_FTR_HPTE_TABLE,
856 .icache_bsize = 32,
857 .dcache_bsize = 32,
858 .num_pmcs = 4,
859 .pmc_type = PPC_PMC_G4,
860 .cpu_setup = __setup_cpu_7410,
861 .machine_check = machine_check_generic,
862 .platform = "ppc7400",
863 },
864 { /* 7450 2.0 - no doze/nap */
865 .pvr_mask = 0xffffffff,
866 .pvr_value = 0x80000200,
867 .cpu_name = "7450",
868 .cpu_features = CPU_FTRS_7450_20,
869 .cpu_user_features = COMMON_USER |
870 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
871 .mmu_features = MMU_FTR_HPTE_TABLE,
872 .icache_bsize = 32,
873 .dcache_bsize = 32,
874 .num_pmcs = 6,
875 .pmc_type = PPC_PMC_G4,
876 .cpu_setup = __setup_cpu_745x,
877 .oprofile_cpu_type = "ppc/7450",
878 .oprofile_type = PPC_OPROFILE_G4,
879 .machine_check = machine_check_generic,
880 .platform = "ppc7450",
881 },
882 { /* 7450 2.1 */
883 .pvr_mask = 0xffffffff,
884 .pvr_value = 0x80000201,
885 .cpu_name = "7450",
886 .cpu_features = CPU_FTRS_7450_21,
887 .cpu_user_features = COMMON_USER |
888 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
889 .mmu_features = MMU_FTR_HPTE_TABLE,
890 .icache_bsize = 32,
891 .dcache_bsize = 32,
892 .num_pmcs = 6,
893 .pmc_type = PPC_PMC_G4,
894 .cpu_setup = __setup_cpu_745x,
895 .oprofile_cpu_type = "ppc/7450",
896 .oprofile_type = PPC_OPROFILE_G4,
897 .machine_check = machine_check_generic,
898 .platform = "ppc7450",
899 },
900 { /* 7450 2.3 and newer */
901 .pvr_mask = 0xffff0000,
902 .pvr_value = 0x80000000,
903 .cpu_name = "7450",
904 .cpu_features = CPU_FTRS_7450_23,
905 .cpu_user_features = COMMON_USER |
906 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
907 .mmu_features = MMU_FTR_HPTE_TABLE,
908 .icache_bsize = 32,
909 .dcache_bsize = 32,
910 .num_pmcs = 6,
911 .pmc_type = PPC_PMC_G4,
912 .cpu_setup = __setup_cpu_745x,
913 .oprofile_cpu_type = "ppc/7450",
914 .oprofile_type = PPC_OPROFILE_G4,
915 .machine_check = machine_check_generic,
916 .platform = "ppc7450",
917 },
918 { /* 7455 rev 1.x */
919 .pvr_mask = 0xffffff00,
920 .pvr_value = 0x80010100,
921 .cpu_name = "7455",
922 .cpu_features = CPU_FTRS_7455_1,
923 .cpu_user_features = COMMON_USER |
924 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
925 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
926 .icache_bsize = 32,
927 .dcache_bsize = 32,
928 .num_pmcs = 6,
929 .pmc_type = PPC_PMC_G4,
930 .cpu_setup = __setup_cpu_745x,
931 .oprofile_cpu_type = "ppc/7450",
932 .oprofile_type = PPC_OPROFILE_G4,
933 .machine_check = machine_check_generic,
934 .platform = "ppc7450",
935 },
936 { /* 7455 rev 2.0 */
937 .pvr_mask = 0xffffffff,
938 .pvr_value = 0x80010200,
939 .cpu_name = "7455",
940 .cpu_features = CPU_FTRS_7455_20,
941 .cpu_user_features = COMMON_USER |
942 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
943 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
944 .icache_bsize = 32,
945 .dcache_bsize = 32,
946 .num_pmcs = 6,
947 .pmc_type = PPC_PMC_G4,
948 .cpu_setup = __setup_cpu_745x,
949 .oprofile_cpu_type = "ppc/7450",
950 .oprofile_type = PPC_OPROFILE_G4,
951 .machine_check = machine_check_generic,
952 .platform = "ppc7450",
953 },
954 { /* 7455 others */
955 .pvr_mask = 0xffff0000,
956 .pvr_value = 0x80010000,
957 .cpu_name = "7455",
958 .cpu_features = CPU_FTRS_7455,
959 .cpu_user_features = COMMON_USER |
960 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
961 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
962 .icache_bsize = 32,
963 .dcache_bsize = 32,
964 .num_pmcs = 6,
965 .pmc_type = PPC_PMC_G4,
966 .cpu_setup = __setup_cpu_745x,
967 .oprofile_cpu_type = "ppc/7450",
968 .oprofile_type = PPC_OPROFILE_G4,
969 .machine_check = machine_check_generic,
970 .platform = "ppc7450",
971 },
972 { /* 7447/7457 Rev 1.0 */
973 .pvr_mask = 0xffffffff,
974 .pvr_value = 0x80020100,
975 .cpu_name = "7447/7457",
976 .cpu_features = CPU_FTRS_7447_10,
977 .cpu_user_features = COMMON_USER |
978 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
979 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
980 .icache_bsize = 32,
981 .dcache_bsize = 32,
982 .num_pmcs = 6,
983 .pmc_type = PPC_PMC_G4,
984 .cpu_setup = __setup_cpu_745x,
985 .oprofile_cpu_type = "ppc/7450",
986 .oprofile_type = PPC_OPROFILE_G4,
987 .machine_check = machine_check_generic,
988 .platform = "ppc7450",
989 },
990 { /* 7447/7457 Rev 1.1 */
991 .pvr_mask = 0xffffffff,
992 .pvr_value = 0x80020101,
993 .cpu_name = "7447/7457",
994 .cpu_features = CPU_FTRS_7447_10,
995 .cpu_user_features = COMMON_USER |
996 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
997 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
998 .icache_bsize = 32,
999 .dcache_bsize = 32,
1000 .num_pmcs = 6,
1001 .pmc_type = PPC_PMC_G4,
1002 .cpu_setup = __setup_cpu_745x,
1003 .oprofile_cpu_type = "ppc/7450",
1004 .oprofile_type = PPC_OPROFILE_G4,
1005 .machine_check = machine_check_generic,
1006 .platform = "ppc7450",
1007 },
1008 { /* 7447/7457 Rev 1.2 and later */
1009 .pvr_mask = 0xffff0000,
1010 .pvr_value = 0x80020000,
1011 .cpu_name = "7447/7457",
1012 .cpu_features = CPU_FTRS_7447,
1013 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1014 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1015 .icache_bsize = 32,
1016 .dcache_bsize = 32,
1017 .num_pmcs = 6,
1018 .pmc_type = PPC_PMC_G4,
1019 .cpu_setup = __setup_cpu_745x,
1020 .oprofile_cpu_type = "ppc/7450",
1021 .oprofile_type = PPC_OPROFILE_G4,
1022 .machine_check = machine_check_generic,
1023 .platform = "ppc7450",
1024 },
1025 { /* 7447A */
1026 .pvr_mask = 0xffff0000,
1027 .pvr_value = 0x80030000,
1028 .cpu_name = "7447A",
1029 .cpu_features = CPU_FTRS_7447A,
1030 .cpu_user_features = COMMON_USER |
1031 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1032 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1033 .icache_bsize = 32,
1034 .dcache_bsize = 32,
1035 .num_pmcs = 6,
1036 .pmc_type = PPC_PMC_G4,
1037 .cpu_setup = __setup_cpu_745x,
1038 .oprofile_cpu_type = "ppc/7450",
1039 .oprofile_type = PPC_OPROFILE_G4,
1040 .machine_check = machine_check_generic,
1041 .platform = "ppc7450",
1042 },
1043 { /* 7448 */
1044 .pvr_mask = 0xffff0000,
1045 .pvr_value = 0x80040000,
1046 .cpu_name = "7448",
1047 .cpu_features = CPU_FTRS_7448,
1048 .cpu_user_features = COMMON_USER |
1049 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1050 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1051 .icache_bsize = 32,
1052 .dcache_bsize = 32,
1053 .num_pmcs = 6,
1054 .pmc_type = PPC_PMC_G4,
1055 .cpu_setup = __setup_cpu_745x,
1056 .oprofile_cpu_type = "ppc/7450",
1057 .oprofile_type = PPC_OPROFILE_G4,
1058 .machine_check = machine_check_generic,
1059 .platform = "ppc7450",
1060 },
1061 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1062 .pvr_mask = 0x7fff0000,
1063 .pvr_value = 0x00810000,
1064 .cpu_name = "82xx",
1065 .cpu_features = CPU_FTRS_82XX,
1066 .cpu_user_features = COMMON_USER,
1067 .mmu_features = 0,
1068 .icache_bsize = 32,
1069 .dcache_bsize = 32,
1070 .cpu_setup = __setup_cpu_603,
1071 .machine_check = machine_check_generic,
1072 .platform = "ppc603",
1073 },
1074 { /* All G2_LE (603e core, plus some) have the same pvr */
1075 .pvr_mask = 0x7fff0000,
1076 .pvr_value = 0x00820000,
1077 .cpu_name = "G2_LE",
1078 .cpu_features = CPU_FTRS_G2_LE,
1079 .cpu_user_features = COMMON_USER,
1080 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1081 .icache_bsize = 32,
1082 .dcache_bsize = 32,
1083 .cpu_setup = __setup_cpu_603,
1084 .machine_check = machine_check_generic,
1085 .platform = "ppc603",
1086 },
1087 { /* e300c1 (a 603e core, plus some) on 83xx */
1088 .pvr_mask = 0x7fff0000,
1089 .pvr_value = 0x00830000,
1090 .cpu_name = "e300c1",
1091 .cpu_features = CPU_FTRS_E300,
1092 .cpu_user_features = COMMON_USER,
1093 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1094 .icache_bsize = 32,
1095 .dcache_bsize = 32,
1096 .cpu_setup = __setup_cpu_603,
1097 .machine_check = machine_check_generic,
1098 .platform = "ppc603",
1099 },
1100 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1101 .pvr_mask = 0x7fff0000,
1102 .pvr_value = 0x00840000,
1103 .cpu_name = "e300c2",
1104 .cpu_features = CPU_FTRS_E300C2,
1105 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1106 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1107 MMU_FTR_NEED_DTLB_SW_LRU,
1108 .icache_bsize = 32,
1109 .dcache_bsize = 32,
1110 .cpu_setup = __setup_cpu_603,
1111 .machine_check = machine_check_generic,
1112 .platform = "ppc603",
1113 },
1114 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1115 .pvr_mask = 0x7fff0000,
1116 .pvr_value = 0x00850000,
1117 .cpu_name = "e300c3",
1118 .cpu_features = CPU_FTRS_E300,
1119 .cpu_user_features = COMMON_USER,
1120 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1121 MMU_FTR_NEED_DTLB_SW_LRU,
1122 .icache_bsize = 32,
1123 .dcache_bsize = 32,
1124 .cpu_setup = __setup_cpu_603,
1125 .num_pmcs = 4,
1126 .oprofile_cpu_type = "ppc/e300",
1127 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1128 .platform = "ppc603",
1129 },
1130 { /* e300c4 (e300c1, plus one IU) */
1131 .pvr_mask = 0x7fff0000,
1132 .pvr_value = 0x00860000,
1133 .cpu_name = "e300c4",
1134 .cpu_features = CPU_FTRS_E300,
1135 .cpu_user_features = COMMON_USER,
1136 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1137 MMU_FTR_NEED_DTLB_SW_LRU,
1138 .icache_bsize = 32,
1139 .dcache_bsize = 32,
1140 .cpu_setup = __setup_cpu_603,
1141 .machine_check = machine_check_generic,
1142 .num_pmcs = 4,
1143 .oprofile_cpu_type = "ppc/e300",
1144 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1145 .platform = "ppc603",
1146 },
1147 { /* default match, we assume split I/D cache & TB (non-601)... */
1148 .pvr_mask = 0x00000000,
1149 .pvr_value = 0x00000000,
1150 .cpu_name = "(generic PPC)",
1151 .cpu_features = CPU_FTRS_CLASSIC32,
1152 .cpu_user_features = COMMON_USER,
1153 .mmu_features = MMU_FTR_HPTE_TABLE,
1154 .icache_bsize = 32,
1155 .dcache_bsize = 32,
1156 .machine_check = machine_check_generic,
1157 .platform = "ppc603",
1158 },
1159 #endif /* CLASSIC_PPC */
1160 #ifdef CONFIG_8xx
1161 { /* 8xx */
1162 .pvr_mask = 0xffff0000,
1163 .pvr_value = 0x00500000,
1164 .cpu_name = "8xx",
1165 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1166 * if the 8xx code is there.... */
1167 .cpu_features = CPU_FTRS_8XX,
1168 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1169 .mmu_features = MMU_FTR_TYPE_8xx,
1170 .icache_bsize = 16,
1171 .dcache_bsize = 16,
1172 .platform = "ppc823",
1173 },
1174 #endif /* CONFIG_8xx */
1175 #ifdef CONFIG_40x
1176 { /* 403GC */
1177 .pvr_mask = 0xffffff00,
1178 .pvr_value = 0x00200200,
1179 .cpu_name = "403GC",
1180 .cpu_features = CPU_FTRS_40X,
1181 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1182 .mmu_features = MMU_FTR_TYPE_40x,
1183 .icache_bsize = 16,
1184 .dcache_bsize = 16,
1185 .machine_check = machine_check_4xx,
1186 .platform = "ppc403",
1187 },
1188 { /* 403GCX */
1189 .pvr_mask = 0xffffff00,
1190 .pvr_value = 0x00201400,
1191 .cpu_name = "403GCX",
1192 .cpu_features = CPU_FTRS_40X,
1193 .cpu_user_features = PPC_FEATURE_32 |
1194 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1195 .mmu_features = MMU_FTR_TYPE_40x,
1196 .icache_bsize = 16,
1197 .dcache_bsize = 16,
1198 .machine_check = machine_check_4xx,
1199 .platform = "ppc403",
1200 },
1201 { /* 403G ?? */
1202 .pvr_mask = 0xffff0000,
1203 .pvr_value = 0x00200000,
1204 .cpu_name = "403G ??",
1205 .cpu_features = CPU_FTRS_40X,
1206 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1207 .mmu_features = MMU_FTR_TYPE_40x,
1208 .icache_bsize = 16,
1209 .dcache_bsize = 16,
1210 .machine_check = machine_check_4xx,
1211 .platform = "ppc403",
1212 },
1213 { /* 405GP */
1214 .pvr_mask = 0xffff0000,
1215 .pvr_value = 0x40110000,
1216 .cpu_name = "405GP",
1217 .cpu_features = CPU_FTRS_40X,
1218 .cpu_user_features = PPC_FEATURE_32 |
1219 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1220 .mmu_features = MMU_FTR_TYPE_40x,
1221 .icache_bsize = 32,
1222 .dcache_bsize = 32,
1223 .machine_check = machine_check_4xx,
1224 .platform = "ppc405",
1225 },
1226 { /* STB 03xxx */
1227 .pvr_mask = 0xffff0000,
1228 .pvr_value = 0x40130000,
1229 .cpu_name = "STB03xxx",
1230 .cpu_features = CPU_FTRS_40X,
1231 .cpu_user_features = PPC_FEATURE_32 |
1232 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1233 .mmu_features = MMU_FTR_TYPE_40x,
1234 .icache_bsize = 32,
1235 .dcache_bsize = 32,
1236 .machine_check = machine_check_4xx,
1237 .platform = "ppc405",
1238 },
1239 { /* STB 04xxx */
1240 .pvr_mask = 0xffff0000,
1241 .pvr_value = 0x41810000,
1242 .cpu_name = "STB04xxx",
1243 .cpu_features = CPU_FTRS_40X,
1244 .cpu_user_features = PPC_FEATURE_32 |
1245 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1246 .mmu_features = MMU_FTR_TYPE_40x,
1247 .icache_bsize = 32,
1248 .dcache_bsize = 32,
1249 .machine_check = machine_check_4xx,
1250 .platform = "ppc405",
1251 },
1252 { /* NP405L */
1253 .pvr_mask = 0xffff0000,
1254 .pvr_value = 0x41610000,
1255 .cpu_name = "NP405L",
1256 .cpu_features = CPU_FTRS_40X,
1257 .cpu_user_features = PPC_FEATURE_32 |
1258 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1259 .mmu_features = MMU_FTR_TYPE_40x,
1260 .icache_bsize = 32,
1261 .dcache_bsize = 32,
1262 .machine_check = machine_check_4xx,
1263 .platform = "ppc405",
1264 },
1265 { /* NP4GS3 */
1266 .pvr_mask = 0xffff0000,
1267 .pvr_value = 0x40B10000,
1268 .cpu_name = "NP4GS3",
1269 .cpu_features = CPU_FTRS_40X,
1270 .cpu_user_features = PPC_FEATURE_32 |
1271 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1272 .mmu_features = MMU_FTR_TYPE_40x,
1273 .icache_bsize = 32,
1274 .dcache_bsize = 32,
1275 .machine_check = machine_check_4xx,
1276 .platform = "ppc405",
1277 },
1278 { /* NP405H */
1279 .pvr_mask = 0xffff0000,
1280 .pvr_value = 0x41410000,
1281 .cpu_name = "NP405H",
1282 .cpu_features = CPU_FTRS_40X,
1283 .cpu_user_features = PPC_FEATURE_32 |
1284 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1285 .mmu_features = MMU_FTR_TYPE_40x,
1286 .icache_bsize = 32,
1287 .dcache_bsize = 32,
1288 .machine_check = machine_check_4xx,
1289 .platform = "ppc405",
1290 },
1291 { /* 405GPr */
1292 .pvr_mask = 0xffff0000,
1293 .pvr_value = 0x50910000,
1294 .cpu_name = "405GPr",
1295 .cpu_features = CPU_FTRS_40X,
1296 .cpu_user_features = PPC_FEATURE_32 |
1297 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1298 .mmu_features = MMU_FTR_TYPE_40x,
1299 .icache_bsize = 32,
1300 .dcache_bsize = 32,
1301 .machine_check = machine_check_4xx,
1302 .platform = "ppc405",
1303 },
1304 { /* STBx25xx */
1305 .pvr_mask = 0xffff0000,
1306 .pvr_value = 0x51510000,
1307 .cpu_name = "STBx25xx",
1308 .cpu_features = CPU_FTRS_40X,
1309 .cpu_user_features = PPC_FEATURE_32 |
1310 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1311 .mmu_features = MMU_FTR_TYPE_40x,
1312 .icache_bsize = 32,
1313 .dcache_bsize = 32,
1314 .machine_check = machine_check_4xx,
1315 .platform = "ppc405",
1316 },
1317 { /* 405LP */
1318 .pvr_mask = 0xffff0000,
1319 .pvr_value = 0x41F10000,
1320 .cpu_name = "405LP",
1321 .cpu_features = CPU_FTRS_40X,
1322 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1323 .mmu_features = MMU_FTR_TYPE_40x,
1324 .icache_bsize = 32,
1325 .dcache_bsize = 32,
1326 .machine_check = machine_check_4xx,
1327 .platform = "ppc405",
1328 },
1329 { /* Xilinx Virtex-II Pro */
1330 .pvr_mask = 0xfffff000,
1331 .pvr_value = 0x20010000,
1332 .cpu_name = "Virtex-II Pro",
1333 .cpu_features = CPU_FTRS_40X,
1334 .cpu_user_features = PPC_FEATURE_32 |
1335 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1336 .mmu_features = MMU_FTR_TYPE_40x,
1337 .icache_bsize = 32,
1338 .dcache_bsize = 32,
1339 .machine_check = machine_check_4xx,
1340 .platform = "ppc405",
1341 },
1342 { /* Xilinx Virtex-4 FX */
1343 .pvr_mask = 0xfffff000,
1344 .pvr_value = 0x20011000,
1345 .cpu_name = "Virtex-4 FX",
1346 .cpu_features = CPU_FTRS_40X,
1347 .cpu_user_features = PPC_FEATURE_32 |
1348 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1349 .mmu_features = MMU_FTR_TYPE_40x,
1350 .icache_bsize = 32,
1351 .dcache_bsize = 32,
1352 .machine_check = machine_check_4xx,
1353 .platform = "ppc405",
1354 },
1355 { /* 405EP */
1356 .pvr_mask = 0xffff0000,
1357 .pvr_value = 0x51210000,
1358 .cpu_name = "405EP",
1359 .cpu_features = CPU_FTRS_40X,
1360 .cpu_user_features = PPC_FEATURE_32 |
1361 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1362 .mmu_features = MMU_FTR_TYPE_40x,
1363 .icache_bsize = 32,
1364 .dcache_bsize = 32,
1365 .machine_check = machine_check_4xx,
1366 .platform = "ppc405",
1367 },
1368 { /* 405EX Rev. A/B with Security */
1369 .pvr_mask = 0xffff000f,
1370 .pvr_value = 0x12910007,
1371 .cpu_name = "405EX Rev. A/B",
1372 .cpu_features = CPU_FTRS_40X,
1373 .cpu_user_features = PPC_FEATURE_32 |
1374 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1375 .mmu_features = MMU_FTR_TYPE_40x,
1376 .icache_bsize = 32,
1377 .dcache_bsize = 32,
1378 .machine_check = machine_check_4xx,
1379 .platform = "ppc405",
1380 },
1381 { /* 405EX Rev. C without Security */
1382 .pvr_mask = 0xffff000f,
1383 .pvr_value = 0x1291000d,
1384 .cpu_name = "405EX Rev. C",
1385 .cpu_features = CPU_FTRS_40X,
1386 .cpu_user_features = PPC_FEATURE_32 |
1387 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1388 .mmu_features = MMU_FTR_TYPE_40x,
1389 .icache_bsize = 32,
1390 .dcache_bsize = 32,
1391 .machine_check = machine_check_4xx,
1392 .platform = "ppc405",
1393 },
1394 { /* 405EX Rev. C with Security */
1395 .pvr_mask = 0xffff000f,
1396 .pvr_value = 0x1291000f,
1397 .cpu_name = "405EX Rev. C",
1398 .cpu_features = CPU_FTRS_40X,
1399 .cpu_user_features = PPC_FEATURE_32 |
1400 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1401 .mmu_features = MMU_FTR_TYPE_40x,
1402 .icache_bsize = 32,
1403 .dcache_bsize = 32,
1404 .machine_check = machine_check_4xx,
1405 .platform = "ppc405",
1406 },
1407 { /* 405EX Rev. D without Security */
1408 .pvr_mask = 0xffff000f,
1409 .pvr_value = 0x12910003,
1410 .cpu_name = "405EX Rev. D",
1411 .cpu_features = CPU_FTRS_40X,
1412 .cpu_user_features = PPC_FEATURE_32 |
1413 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1414 .mmu_features = MMU_FTR_TYPE_40x,
1415 .icache_bsize = 32,
1416 .dcache_bsize = 32,
1417 .machine_check = machine_check_4xx,
1418 .platform = "ppc405",
1419 },
1420 { /* 405EX Rev. D with Security */
1421 .pvr_mask = 0xffff000f,
1422 .pvr_value = 0x12910005,
1423 .cpu_name = "405EX Rev. D",
1424 .cpu_features = CPU_FTRS_40X,
1425 .cpu_user_features = PPC_FEATURE_32 |
1426 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1427 .mmu_features = MMU_FTR_TYPE_40x,
1428 .icache_bsize = 32,
1429 .dcache_bsize = 32,
1430 .machine_check = machine_check_4xx,
1431 .platform = "ppc405",
1432 },
1433 { /* 405EXr Rev. A/B without Security */
1434 .pvr_mask = 0xffff000f,
1435 .pvr_value = 0x12910001,
1436 .cpu_name = "405EXr Rev. A/B",
1437 .cpu_features = CPU_FTRS_40X,
1438 .cpu_user_features = PPC_FEATURE_32 |
1439 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1440 .mmu_features = MMU_FTR_TYPE_40x,
1441 .icache_bsize = 32,
1442 .dcache_bsize = 32,
1443 .machine_check = machine_check_4xx,
1444 .platform = "ppc405",
1445 },
1446 { /* 405EXr Rev. C without Security */
1447 .pvr_mask = 0xffff000f,
1448 .pvr_value = 0x12910009,
1449 .cpu_name = "405EXr Rev. C",
1450 .cpu_features = CPU_FTRS_40X,
1451 .cpu_user_features = PPC_FEATURE_32 |
1452 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1453 .mmu_features = MMU_FTR_TYPE_40x,
1454 .icache_bsize = 32,
1455 .dcache_bsize = 32,
1456 .machine_check = machine_check_4xx,
1457 .platform = "ppc405",
1458 },
1459 { /* 405EXr Rev. C with Security */
1460 .pvr_mask = 0xffff000f,
1461 .pvr_value = 0x1291000b,
1462 .cpu_name = "405EXr Rev. C",
1463 .cpu_features = CPU_FTRS_40X,
1464 .cpu_user_features = PPC_FEATURE_32 |
1465 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1466 .mmu_features = MMU_FTR_TYPE_40x,
1467 .icache_bsize = 32,
1468 .dcache_bsize = 32,
1469 .machine_check = machine_check_4xx,
1470 .platform = "ppc405",
1471 },
1472 { /* 405EXr Rev. D without Security */
1473 .pvr_mask = 0xffff000f,
1474 .pvr_value = 0x12910000,
1475 .cpu_name = "405EXr Rev. D",
1476 .cpu_features = CPU_FTRS_40X,
1477 .cpu_user_features = PPC_FEATURE_32 |
1478 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1479 .mmu_features = MMU_FTR_TYPE_40x,
1480 .icache_bsize = 32,
1481 .dcache_bsize = 32,
1482 .machine_check = machine_check_4xx,
1483 .platform = "ppc405",
1484 },
1485 { /* 405EXr Rev. D with Security */
1486 .pvr_mask = 0xffff000f,
1487 .pvr_value = 0x12910002,
1488 .cpu_name = "405EXr Rev. D",
1489 .cpu_features = CPU_FTRS_40X,
1490 .cpu_user_features = PPC_FEATURE_32 |
1491 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1492 .mmu_features = MMU_FTR_TYPE_40x,
1493 .icache_bsize = 32,
1494 .dcache_bsize = 32,
1495 .machine_check = machine_check_4xx,
1496 .platform = "ppc405",
1497 },
1498 {
1499 /* 405EZ */
1500 .pvr_mask = 0xffff0000,
1501 .pvr_value = 0x41510000,
1502 .cpu_name = "405EZ",
1503 .cpu_features = CPU_FTRS_40X,
1504 .cpu_user_features = PPC_FEATURE_32 |
1505 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1506 .mmu_features = MMU_FTR_TYPE_40x,
1507 .icache_bsize = 32,
1508 .dcache_bsize = 32,
1509 .machine_check = machine_check_4xx,
1510 .platform = "ppc405",
1511 },
1512 { /* default match */
1513 .pvr_mask = 0x00000000,
1514 .pvr_value = 0x00000000,
1515 .cpu_name = "(generic 40x PPC)",
1516 .cpu_features = CPU_FTRS_40X,
1517 .cpu_user_features = PPC_FEATURE_32 |
1518 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1519 .mmu_features = MMU_FTR_TYPE_40x,
1520 .icache_bsize = 32,
1521 .dcache_bsize = 32,
1522 .machine_check = machine_check_4xx,
1523 .platform = "ppc405",
1524 }
1525
1526 #endif /* CONFIG_40x */
1527 #ifdef CONFIG_44x
1528 {
1529 .pvr_mask = 0xf0000fff,
1530 .pvr_value = 0x40000850,
1531 .cpu_name = "440GR Rev. A",
1532 .cpu_features = CPU_FTRS_44X,
1533 .cpu_user_features = COMMON_USER_BOOKE,
1534 .mmu_features = MMU_FTR_TYPE_44x,
1535 .icache_bsize = 32,
1536 .dcache_bsize = 32,
1537 .machine_check = machine_check_4xx,
1538 .platform = "ppc440",
1539 },
1540 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1541 .pvr_mask = 0xf0000fff,
1542 .pvr_value = 0x40000858,
1543 .cpu_name = "440EP Rev. A",
1544 .cpu_features = CPU_FTRS_44X,
1545 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1546 .mmu_features = MMU_FTR_TYPE_44x,
1547 .icache_bsize = 32,
1548 .dcache_bsize = 32,
1549 .cpu_setup = __setup_cpu_440ep,
1550 .machine_check = machine_check_4xx,
1551 .platform = "ppc440",
1552 },
1553 {
1554 .pvr_mask = 0xf0000fff,
1555 .pvr_value = 0x400008d3,
1556 .cpu_name = "440GR Rev. B",
1557 .cpu_features = CPU_FTRS_44X,
1558 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1559 .mmu_features = MMU_FTR_TYPE_44x,
1560 .icache_bsize = 32,
1561 .dcache_bsize = 32,
1562 .machine_check = machine_check_4xx,
1563 .platform = "ppc440",
1564 },
1565 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1566 .pvr_mask = 0xf0000ff7,
1567 .pvr_value = 0x400008d4,
1568 .cpu_name = "440EP Rev. C",
1569 .cpu_features = CPU_FTRS_44X,
1570 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1571 .mmu_features = MMU_FTR_TYPE_44x,
1572 .icache_bsize = 32,
1573 .dcache_bsize = 32,
1574 .cpu_setup = __setup_cpu_440ep,
1575 .machine_check = machine_check_4xx,
1576 .platform = "ppc440",
1577 },
1578 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1579 .pvr_mask = 0xf0000fff,
1580 .pvr_value = 0x400008db,
1581 .cpu_name = "440EP Rev. B",
1582 .cpu_features = CPU_FTRS_44X,
1583 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1584 .mmu_features = MMU_FTR_TYPE_44x,
1585 .icache_bsize = 32,
1586 .dcache_bsize = 32,
1587 .cpu_setup = __setup_cpu_440ep,
1588 .machine_check = machine_check_4xx,
1589 .platform = "ppc440",
1590 },
1591 { /* 440GRX */
1592 .pvr_mask = 0xf0000ffb,
1593 .pvr_value = 0x200008D0,
1594 .cpu_name = "440GRX",
1595 .cpu_features = CPU_FTRS_44X,
1596 .cpu_user_features = COMMON_USER_BOOKE,
1597 .mmu_features = MMU_FTR_TYPE_44x,
1598 .icache_bsize = 32,
1599 .dcache_bsize = 32,
1600 .cpu_setup = __setup_cpu_440grx,
1601 .machine_check = machine_check_440A,
1602 .platform = "ppc440",
1603 },
1604 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1605 .pvr_mask = 0xf0000ffb,
1606 .pvr_value = 0x200008D8,
1607 .cpu_name = "440EPX",
1608 .cpu_features = CPU_FTRS_44X,
1609 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1610 .mmu_features = MMU_FTR_TYPE_44x,
1611 .icache_bsize = 32,
1612 .dcache_bsize = 32,
1613 .cpu_setup = __setup_cpu_440epx,
1614 .machine_check = machine_check_440A,
1615 .platform = "ppc440",
1616 },
1617 { /* 440GP Rev. B */
1618 .pvr_mask = 0xf0000fff,
1619 .pvr_value = 0x40000440,
1620 .cpu_name = "440GP Rev. B",
1621 .cpu_features = CPU_FTRS_44X,
1622 .cpu_user_features = COMMON_USER_BOOKE,
1623 .mmu_features = MMU_FTR_TYPE_44x,
1624 .icache_bsize = 32,
1625 .dcache_bsize = 32,
1626 .machine_check = machine_check_4xx,
1627 .platform = "ppc440gp",
1628 },
1629 { /* 440GP Rev. C */
1630 .pvr_mask = 0xf0000fff,
1631 .pvr_value = 0x40000481,
1632 .cpu_name = "440GP Rev. C",
1633 .cpu_features = CPU_FTRS_44X,
1634 .cpu_user_features = COMMON_USER_BOOKE,
1635 .mmu_features = MMU_FTR_TYPE_44x,
1636 .icache_bsize = 32,
1637 .dcache_bsize = 32,
1638 .machine_check = machine_check_4xx,
1639 .platform = "ppc440gp",
1640 },
1641 { /* 440GX Rev. A */
1642 .pvr_mask = 0xf0000fff,
1643 .pvr_value = 0x50000850,
1644 .cpu_name = "440GX Rev. A",
1645 .cpu_features = CPU_FTRS_44X,
1646 .cpu_user_features = COMMON_USER_BOOKE,
1647 .mmu_features = MMU_FTR_TYPE_44x,
1648 .icache_bsize = 32,
1649 .dcache_bsize = 32,
1650 .cpu_setup = __setup_cpu_440gx,
1651 .machine_check = machine_check_440A,
1652 .platform = "ppc440",
1653 },
1654 { /* 440GX Rev. B */
1655 .pvr_mask = 0xf0000fff,
1656 .pvr_value = 0x50000851,
1657 .cpu_name = "440GX Rev. B",
1658 .cpu_features = CPU_FTRS_44X,
1659 .cpu_user_features = COMMON_USER_BOOKE,
1660 .mmu_features = MMU_FTR_TYPE_44x,
1661 .icache_bsize = 32,
1662 .dcache_bsize = 32,
1663 .cpu_setup = __setup_cpu_440gx,
1664 .machine_check = machine_check_440A,
1665 .platform = "ppc440",
1666 },
1667 { /* 440GX Rev. C */
1668 .pvr_mask = 0xf0000fff,
1669 .pvr_value = 0x50000892,
1670 .cpu_name = "440GX Rev. C",
1671 .cpu_features = CPU_FTRS_44X,
1672 .cpu_user_features = COMMON_USER_BOOKE,
1673 .mmu_features = MMU_FTR_TYPE_44x,
1674 .icache_bsize = 32,
1675 .dcache_bsize = 32,
1676 .cpu_setup = __setup_cpu_440gx,
1677 .machine_check = machine_check_440A,
1678 .platform = "ppc440",
1679 },
1680 { /* 440GX Rev. F */
1681 .pvr_mask = 0xf0000fff,
1682 .pvr_value = 0x50000894,
1683 .cpu_name = "440GX Rev. F",
1684 .cpu_features = CPU_FTRS_44X,
1685 .cpu_user_features = COMMON_USER_BOOKE,
1686 .mmu_features = MMU_FTR_TYPE_44x,
1687 .icache_bsize = 32,
1688 .dcache_bsize = 32,
1689 .cpu_setup = __setup_cpu_440gx,
1690 .machine_check = machine_check_440A,
1691 .platform = "ppc440",
1692 },
1693 { /* 440SP Rev. A */
1694 .pvr_mask = 0xfff00fff,
1695 .pvr_value = 0x53200891,
1696 .cpu_name = "440SP Rev. A",
1697 .cpu_features = CPU_FTRS_44X,
1698 .cpu_user_features = COMMON_USER_BOOKE,
1699 .mmu_features = MMU_FTR_TYPE_44x,
1700 .icache_bsize = 32,
1701 .dcache_bsize = 32,
1702 .machine_check = machine_check_4xx,
1703 .platform = "ppc440",
1704 },
1705 { /* 440SPe Rev. A */
1706 .pvr_mask = 0xfff00fff,
1707 .pvr_value = 0x53400890,
1708 .cpu_name = "440SPe Rev. A",
1709 .cpu_features = CPU_FTRS_44X,
1710 .cpu_user_features = COMMON_USER_BOOKE,
1711 .mmu_features = MMU_FTR_TYPE_44x,
1712 .icache_bsize = 32,
1713 .dcache_bsize = 32,
1714 .cpu_setup = __setup_cpu_440spe,
1715 .machine_check = machine_check_440A,
1716 .platform = "ppc440",
1717 },
1718 { /* 440SPe Rev. B */
1719 .pvr_mask = 0xfff00fff,
1720 .pvr_value = 0x53400891,
1721 .cpu_name = "440SPe Rev. B",
1722 .cpu_features = CPU_FTRS_44X,
1723 .cpu_user_features = COMMON_USER_BOOKE,
1724 .mmu_features = MMU_FTR_TYPE_44x,
1725 .icache_bsize = 32,
1726 .dcache_bsize = 32,
1727 .cpu_setup = __setup_cpu_440spe,
1728 .machine_check = machine_check_440A,
1729 .platform = "ppc440",
1730 },
1731 { /* 440 in Xilinx Virtex-5 FXT */
1732 .pvr_mask = 0xfffffff0,
1733 .pvr_value = 0x7ff21910,
1734 .cpu_name = "440 in Virtex-5 FXT",
1735 .cpu_features = CPU_FTRS_44X,
1736 .cpu_user_features = COMMON_USER_BOOKE,
1737 .mmu_features = MMU_FTR_TYPE_44x,
1738 .icache_bsize = 32,
1739 .dcache_bsize = 32,
1740 .cpu_setup = __setup_cpu_440x5,
1741 .machine_check = machine_check_440A,
1742 .platform = "ppc440",
1743 },
1744 { /* 460EX */
1745 .pvr_mask = 0xffff0006,
1746 .pvr_value = 0x13020002,
1747 .cpu_name = "460EX",
1748 .cpu_features = CPU_FTRS_440x6,
1749 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1750 .mmu_features = MMU_FTR_TYPE_44x,
1751 .icache_bsize = 32,
1752 .dcache_bsize = 32,
1753 .cpu_setup = __setup_cpu_460ex,
1754 .machine_check = machine_check_440A,
1755 .platform = "ppc440",
1756 },
1757 { /* 460EX Rev B */
1758 .pvr_mask = 0xffff0007,
1759 .pvr_value = 0x13020004,
1760 .cpu_name = "460EX Rev. B",
1761 .cpu_features = CPU_FTRS_440x6,
1762 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1763 .mmu_features = MMU_FTR_TYPE_44x,
1764 .icache_bsize = 32,
1765 .dcache_bsize = 32,
1766 .cpu_setup = __setup_cpu_460ex,
1767 .machine_check = machine_check_440A,
1768 .platform = "ppc440",
1769 },
1770 { /* 460GT */
1771 .pvr_mask = 0xffff0006,
1772 .pvr_value = 0x13020000,
1773 .cpu_name = "460GT",
1774 .cpu_features = CPU_FTRS_440x6,
1775 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1776 .mmu_features = MMU_FTR_TYPE_44x,
1777 .icache_bsize = 32,
1778 .dcache_bsize = 32,
1779 .cpu_setup = __setup_cpu_460gt,
1780 .machine_check = machine_check_440A,
1781 .platform = "ppc440",
1782 },
1783 { /* 460GT Rev B */
1784 .pvr_mask = 0xffff0007,
1785 .pvr_value = 0x13020005,
1786 .cpu_name = "460GT Rev. B",
1787 .cpu_features = CPU_FTRS_440x6,
1788 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1789 .mmu_features = MMU_FTR_TYPE_44x,
1790 .icache_bsize = 32,
1791 .dcache_bsize = 32,
1792 .cpu_setup = __setup_cpu_460gt,
1793 .machine_check = machine_check_440A,
1794 .platform = "ppc440",
1795 },
1796 { /* 460SX */
1797 .pvr_mask = 0xffffff00,
1798 .pvr_value = 0x13541800,
1799 .cpu_name = "460SX",
1800 .cpu_features = CPU_FTRS_44X,
1801 .cpu_user_features = COMMON_USER_BOOKE,
1802 .mmu_features = MMU_FTR_TYPE_44x,
1803 .icache_bsize = 32,
1804 .dcache_bsize = 32,
1805 .cpu_setup = __setup_cpu_460sx,
1806 .machine_check = machine_check_440A,
1807 .platform = "ppc440",
1808 },
1809 { /* 464 in APM821xx */
1810 .pvr_mask = 0xffffff00,
1811 .pvr_value = 0x12C41C80,
1812 .cpu_name = "APM821XX",
1813 .cpu_features = CPU_FTRS_44X,
1814 .cpu_user_features = COMMON_USER_BOOKE |
1815 PPC_FEATURE_HAS_FPU,
1816 .mmu_features = MMU_FTR_TYPE_44x,
1817 .icache_bsize = 32,
1818 .dcache_bsize = 32,
1819 .cpu_setup = __setup_cpu_apm821xx,
1820 .machine_check = machine_check_440A,
1821 .platform = "ppc440",
1822 },
1823 { /* 476 core */
1824 .pvr_mask = 0xffff0000,
1825 .pvr_value = 0x11a50000,
1826 .cpu_name = "476",
1827 .cpu_features = CPU_FTRS_47X,
1828 .cpu_user_features = COMMON_USER_BOOKE |
1829 PPC_FEATURE_HAS_FPU,
1830 .mmu_features = MMU_FTR_TYPE_47x |
1831 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1832 .icache_bsize = 32,
1833 .dcache_bsize = 128,
1834 .machine_check = machine_check_47x,
1835 .platform = "ppc470",
1836 },
1837 { /* 476 iss */
1838 .pvr_mask = 0xffff0000,
1839 .pvr_value = 0x00050000,
1840 .cpu_name = "476",
1841 .cpu_features = CPU_FTRS_47X,
1842 .cpu_user_features = COMMON_USER_BOOKE |
1843 PPC_FEATURE_HAS_FPU,
1844 .mmu_features = MMU_FTR_TYPE_47x |
1845 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1846 .icache_bsize = 32,
1847 .dcache_bsize = 128,
1848 .machine_check = machine_check_47x,
1849 .platform = "ppc470",
1850 },
1851 { /* default match */
1852 .pvr_mask = 0x00000000,
1853 .pvr_value = 0x00000000,
1854 .cpu_name = "(generic 44x PPC)",
1855 .cpu_features = CPU_FTRS_44X,
1856 .cpu_user_features = COMMON_USER_BOOKE,
1857 .mmu_features = MMU_FTR_TYPE_44x,
1858 .icache_bsize = 32,
1859 .dcache_bsize = 32,
1860 .machine_check = machine_check_4xx,
1861 .platform = "ppc440",
1862 }
1863 #endif /* CONFIG_44x */
1864 #ifdef CONFIG_E200
1865 { /* e200z5 */
1866 .pvr_mask = 0xfff00000,
1867 .pvr_value = 0x81000000,
1868 .cpu_name = "e200z5",
1869 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1870 .cpu_features = CPU_FTRS_E200,
1871 .cpu_user_features = COMMON_USER_BOOKE |
1872 PPC_FEATURE_HAS_EFP_SINGLE |
1873 PPC_FEATURE_UNIFIED_CACHE,
1874 .mmu_features = MMU_FTR_TYPE_FSL_E,
1875 .dcache_bsize = 32,
1876 .machine_check = machine_check_e200,
1877 .platform = "ppc5554",
1878 },
1879 { /* e200z6 */
1880 .pvr_mask = 0xfff00000,
1881 .pvr_value = 0x81100000,
1882 .cpu_name = "e200z6",
1883 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1884 .cpu_features = CPU_FTRS_E200,
1885 .cpu_user_features = COMMON_USER_BOOKE |
1886 PPC_FEATURE_HAS_SPE_COMP |
1887 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1888 PPC_FEATURE_UNIFIED_CACHE,
1889 .mmu_features = MMU_FTR_TYPE_FSL_E,
1890 .dcache_bsize = 32,
1891 .machine_check = machine_check_e200,
1892 .platform = "ppc5554",
1893 },
1894 { /* default match */
1895 .pvr_mask = 0x00000000,
1896 .pvr_value = 0x00000000,
1897 .cpu_name = "(generic E200 PPC)",
1898 .cpu_features = CPU_FTRS_E200,
1899 .cpu_user_features = COMMON_USER_BOOKE |
1900 PPC_FEATURE_HAS_EFP_SINGLE |
1901 PPC_FEATURE_UNIFIED_CACHE,
1902 .mmu_features = MMU_FTR_TYPE_FSL_E,
1903 .dcache_bsize = 32,
1904 .cpu_setup = __setup_cpu_e200,
1905 .machine_check = machine_check_e200,
1906 .platform = "ppc5554",
1907 }
1908 #endif /* CONFIG_E200 */
1909 #ifdef CONFIG_E500
1910 { /* e500 */
1911 .pvr_mask = 0xffff0000,
1912 .pvr_value = 0x80200000,
1913 .cpu_name = "e500",
1914 .cpu_features = CPU_FTRS_E500,
1915 .cpu_user_features = COMMON_USER_BOOKE |
1916 PPC_FEATURE_HAS_SPE_COMP |
1917 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1918 .mmu_features = MMU_FTR_TYPE_FSL_E,
1919 .icache_bsize = 32,
1920 .dcache_bsize = 32,
1921 .num_pmcs = 4,
1922 .oprofile_cpu_type = "ppc/e500",
1923 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1924 .cpu_setup = __setup_cpu_e500v1,
1925 .machine_check = machine_check_e500,
1926 .platform = "ppc8540",
1927 },
1928 { /* e500v2 */
1929 .pvr_mask = 0xffff0000,
1930 .pvr_value = 0x80210000,
1931 .cpu_name = "e500v2",
1932 .cpu_features = CPU_FTRS_E500_2,
1933 .cpu_user_features = COMMON_USER_BOOKE |
1934 PPC_FEATURE_HAS_SPE_COMP |
1935 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1936 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1937 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1938 .icache_bsize = 32,
1939 .dcache_bsize = 32,
1940 .num_pmcs = 4,
1941 .oprofile_cpu_type = "ppc/e500",
1942 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1943 .cpu_setup = __setup_cpu_e500v2,
1944 .machine_check = machine_check_e500,
1945 .platform = "ppc8548",
1946 },
1947 { /* e500mc */
1948 .pvr_mask = 0xffff0000,
1949 .pvr_value = 0x80230000,
1950 .cpu_name = "e500mc",
1951 .cpu_features = CPU_FTRS_E500MC,
1952 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1953 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1954 MMU_FTR_USE_TLBILX,
1955 .icache_bsize = 64,
1956 .dcache_bsize = 64,
1957 .num_pmcs = 4,
1958 .oprofile_cpu_type = "ppc/e500mc",
1959 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1960 .cpu_setup = __setup_cpu_e500mc,
1961 .machine_check = machine_check_e500mc,
1962 .platform = "ppce500mc",
1963 },
1964 { /* default match */
1965 .pvr_mask = 0x00000000,
1966 .pvr_value = 0x00000000,
1967 .cpu_name = "(generic E500 PPC)",
1968 .cpu_features = CPU_FTRS_E500,
1969 .cpu_user_features = COMMON_USER_BOOKE |
1970 PPC_FEATURE_HAS_SPE_COMP |
1971 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1972 .mmu_features = MMU_FTR_TYPE_FSL_E,
1973 .icache_bsize = 32,
1974 .dcache_bsize = 32,
1975 .machine_check = machine_check_e500,
1976 .platform = "powerpc",
1977 }
1978 #endif /* CONFIG_E500 */
1979 #endif /* CONFIG_PPC32 */
1980
1981 #ifdef CONFIG_PPC_BOOK3E_64
1982 { /* This is a default entry to get going, to be replaced by
1983 * a real one at some stage
1984 */
1985 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
1986 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
1987 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
1988 .pvr_mask = 0x00000000,
1989 .pvr_value = 0x00000000,
1990 .cpu_name = "Book3E",
1991 .cpu_features = CPU_FTRS_BASE_BOOK3E,
1992 .cpu_user_features = COMMON_USER_PPC64,
1993 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
1994 MMU_FTR_USE_TLBIVAX_BCAST |
1995 MMU_FTR_LOCK_BCAST_INVAL,
1996 .icache_bsize = 64,
1997 .dcache_bsize = 64,
1998 .num_pmcs = 0,
1999 .machine_check = machine_check_generic,
2000 .platform = "power6",
2001 },
2002 #endif
2003 };
2004
2005 static struct cpu_spec the_cpu_spec;
2006
2007 static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
2008 {
2009 struct cpu_spec *t = &the_cpu_spec;
2010 struct cpu_spec old;
2011
2012 t = PTRRELOC(t);
2013 old = *t;
2014
2015 /* Copy everything, then do fixups */
2016 *t = *s;
2017
2018 /*
2019 * If we are overriding a previous value derived from the real
2020 * PVR with a new value obtained using a logical PVR value,
2021 * don't modify the performance monitor fields.
2022 */
2023 if (old.num_pmcs && !s->num_pmcs) {
2024 t->num_pmcs = old.num_pmcs;
2025 t->pmc_type = old.pmc_type;
2026 t->oprofile_type = old.oprofile_type;
2027 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2028 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2029 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2030
2031 /*
2032 * If we have passed through this logic once before and
2033 * have pulled the default case because the real PVR was
2034 * not found inside cpu_specs[], then we are possibly
2035 * running in compatibility mode. In that case, let the
2036 * oprofiler know which set of compatibility counters to
2037 * pull from by making sure the oprofile_cpu_type string
2038 * is set to that of compatibility mode. If the
2039 * oprofile_cpu_type already has a value, then we are
2040 * possibly overriding a real PVR with a logical one,
2041 * and, in that case, keep the current value for
2042 * oprofile_cpu_type.
2043 */
2044 if (old.oprofile_cpu_type != NULL) {
2045 t->oprofile_cpu_type = old.oprofile_cpu_type;
2046 t->oprofile_type = old.oprofile_type;
2047 }
2048 }
2049
2050 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2051
2052 /*
2053 * Set the base platform string once; assumes
2054 * we're called with real pvr first.
2055 */
2056 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2057 *PTRRELOC(&powerpc_base_platform) = t->platform;
2058
2059 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2060 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2061 * that processor. I will consolidate that at a later time, for now,
2062 * just use #ifdef. We also don't need to PTRRELOC the function
2063 * pointer on ppc64 and booke as we are running at 0 in real mode
2064 * on ppc64 and reloc_offset is always 0 on booke.
2065 */
2066 if (s->cpu_setup) {
2067 s->cpu_setup(offset, s);
2068 }
2069 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2070 }
2071
2072 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2073 {
2074 struct cpu_spec *s = cpu_specs;
2075 int i;
2076
2077 s = PTRRELOC(s);
2078
2079 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2080 if ((pvr & s->pvr_mask) == s->pvr_value) {
2081 setup_cpu_spec(offset, s);
2082 return s;
2083 }
2084 }
2085
2086 BUG();
2087
2088 return NULL;
2089 }
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