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ASoC: cs4271: configure reset GPIO as output
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1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18 #include <linux/jump_label.h>
19
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
22 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
23 #include <asm/mmu.h>
24 #include <asm/setup.h>
25
26 struct cpu_spec* cur_cpu_spec = NULL;
27 EXPORT_SYMBOL(cur_cpu_spec);
28
29 /* The platform string corresponding to the real PVR */
30 const char *powerpc_base_platform;
31
32 /* NOTE:
33 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
34 * the responsibility of the appropriate CPU save/restore functions to
35 * eventually copy these settings over. Those save/restore aren't yet
36 * part of the cputable though. That has to be fixed for both ppc32
37 * and ppc64
38 */
39 #ifdef CONFIG_PPC32
40 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
52 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
53 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
54 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
60 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
61 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
62 #endif /* CONFIG_PPC32 */
63 #ifdef CONFIG_PPC64
64 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
65 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
66 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
67 extern void __restore_cpu_pa6t(void);
68 extern void __restore_cpu_ppc970(void);
69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70 extern void __restore_cpu_power7(void);
71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_power8(void);
73 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec);
74 extern void __restore_cpu_power9(void);
75 extern void __flush_tlb_power7(unsigned int action);
76 extern void __flush_tlb_power8(unsigned int action);
77 extern void __flush_tlb_power9(unsigned int action);
78 extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
79 extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
80 #endif /* CONFIG_PPC64 */
81 #if defined(CONFIG_E500)
82 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
83 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
84 extern void __restore_cpu_e5500(void);
85 extern void __restore_cpu_e6500(void);
86 #endif /* CONFIG_E500 */
87
88 /* This table only contains "desktop" CPUs, it need to be filled with embedded
89 * ones as well...
90 */
91 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
92 PPC_FEATURE_HAS_MMU)
93 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
94 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
95 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
97 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
99 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
101 PPC_FEATURE_TRUE_LE | \
102 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
103 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
104 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
105 PPC_FEATURE_TRUE_LE | \
106 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
107 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
108 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
109 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
110 PPC_FEATURE_TRUE_LE | \
111 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
112 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
113 PPC_FEATURE2_HTM_COMP | \
114 PPC_FEATURE2_HTM_NOSC_COMP | \
115 PPC_FEATURE2_DSCR | \
116 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
117 PPC_FEATURE2_VEC_CRYPTO)
118 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
119 PPC_FEATURE_TRUE_LE | \
120 PPC_FEATURE_HAS_ALTIVEC_COMP)
121 #define COMMON_USER_POWER9 COMMON_USER_POWER8
122 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
123 PPC_FEATURE2_ARCH_3_00 | \
124 PPC_FEATURE2_HAS_IEEE128)
125
126 #ifdef CONFIG_PPC_BOOK3E_64
127 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
128 #else
129 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
130 PPC_FEATURE_BOOKE)
131 #endif
132
133 static struct cpu_spec __initdata cpu_specs[] = {
134 #ifdef CONFIG_PPC_BOOK3S_64
135 { /* Power4 */
136 .pvr_mask = 0xffff0000,
137 .pvr_value = 0x00350000,
138 .cpu_name = "POWER4 (gp)",
139 .cpu_features = CPU_FTRS_POWER4,
140 .cpu_user_features = COMMON_USER_POWER4,
141 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
142 .icache_bsize = 128,
143 .dcache_bsize = 128,
144 .num_pmcs = 8,
145 .pmc_type = PPC_PMC_IBM,
146 .oprofile_cpu_type = "ppc64/power4",
147 .oprofile_type = PPC_OPROFILE_POWER4,
148 .platform = "power4",
149 },
150 { /* Power4+ */
151 .pvr_mask = 0xffff0000,
152 .pvr_value = 0x00380000,
153 .cpu_name = "POWER4+ (gq)",
154 .cpu_features = CPU_FTRS_POWER4,
155 .cpu_user_features = COMMON_USER_POWER4,
156 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
157 .icache_bsize = 128,
158 .dcache_bsize = 128,
159 .num_pmcs = 8,
160 .pmc_type = PPC_PMC_IBM,
161 .oprofile_cpu_type = "ppc64/power4",
162 .oprofile_type = PPC_OPROFILE_POWER4,
163 .platform = "power4",
164 },
165 { /* PPC970 */
166 .pvr_mask = 0xffff0000,
167 .pvr_value = 0x00390000,
168 .cpu_name = "PPC970",
169 .cpu_features = CPU_FTRS_PPC970,
170 .cpu_user_features = COMMON_USER_POWER4 |
171 PPC_FEATURE_HAS_ALTIVEC_COMP,
172 .mmu_features = MMU_FTRS_PPC970,
173 .icache_bsize = 128,
174 .dcache_bsize = 128,
175 .num_pmcs = 8,
176 .pmc_type = PPC_PMC_IBM,
177 .cpu_setup = __setup_cpu_ppc970,
178 .cpu_restore = __restore_cpu_ppc970,
179 .oprofile_cpu_type = "ppc64/970",
180 .oprofile_type = PPC_OPROFILE_POWER4,
181 .platform = "ppc970",
182 },
183 { /* PPC970FX */
184 .pvr_mask = 0xffff0000,
185 .pvr_value = 0x003c0000,
186 .cpu_name = "PPC970FX",
187 .cpu_features = CPU_FTRS_PPC970,
188 .cpu_user_features = COMMON_USER_POWER4 |
189 PPC_FEATURE_HAS_ALTIVEC_COMP,
190 .mmu_features = MMU_FTRS_PPC970,
191 .icache_bsize = 128,
192 .dcache_bsize = 128,
193 .num_pmcs = 8,
194 .pmc_type = PPC_PMC_IBM,
195 .cpu_setup = __setup_cpu_ppc970,
196 .cpu_restore = __restore_cpu_ppc970,
197 .oprofile_cpu_type = "ppc64/970",
198 .oprofile_type = PPC_OPROFILE_POWER4,
199 .platform = "ppc970",
200 },
201 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
202 .pvr_mask = 0xffffffff,
203 .pvr_value = 0x00440100,
204 .cpu_name = "PPC970MP",
205 .cpu_features = CPU_FTRS_PPC970,
206 .cpu_user_features = COMMON_USER_POWER4 |
207 PPC_FEATURE_HAS_ALTIVEC_COMP,
208 .mmu_features = MMU_FTRS_PPC970,
209 .icache_bsize = 128,
210 .dcache_bsize = 128,
211 .num_pmcs = 8,
212 .pmc_type = PPC_PMC_IBM,
213 .cpu_setup = __setup_cpu_ppc970,
214 .cpu_restore = __restore_cpu_ppc970,
215 .oprofile_cpu_type = "ppc64/970MP",
216 .oprofile_type = PPC_OPROFILE_POWER4,
217 .platform = "ppc970",
218 },
219 { /* PPC970MP */
220 .pvr_mask = 0xffff0000,
221 .pvr_value = 0x00440000,
222 .cpu_name = "PPC970MP",
223 .cpu_features = CPU_FTRS_PPC970,
224 .cpu_user_features = COMMON_USER_POWER4 |
225 PPC_FEATURE_HAS_ALTIVEC_COMP,
226 .mmu_features = MMU_FTRS_PPC970,
227 .icache_bsize = 128,
228 .dcache_bsize = 128,
229 .num_pmcs = 8,
230 .pmc_type = PPC_PMC_IBM,
231 .cpu_setup = __setup_cpu_ppc970MP,
232 .cpu_restore = __restore_cpu_ppc970,
233 .oprofile_cpu_type = "ppc64/970MP",
234 .oprofile_type = PPC_OPROFILE_POWER4,
235 .platform = "ppc970",
236 },
237 { /* PPC970GX */
238 .pvr_mask = 0xffff0000,
239 .pvr_value = 0x00450000,
240 .cpu_name = "PPC970GX",
241 .cpu_features = CPU_FTRS_PPC970,
242 .cpu_user_features = COMMON_USER_POWER4 |
243 PPC_FEATURE_HAS_ALTIVEC_COMP,
244 .mmu_features = MMU_FTRS_PPC970,
245 .icache_bsize = 128,
246 .dcache_bsize = 128,
247 .num_pmcs = 8,
248 .pmc_type = PPC_PMC_IBM,
249 .cpu_setup = __setup_cpu_ppc970,
250 .oprofile_cpu_type = "ppc64/970",
251 .oprofile_type = PPC_OPROFILE_POWER4,
252 .platform = "ppc970",
253 },
254 { /* Power5 GR */
255 .pvr_mask = 0xffff0000,
256 .pvr_value = 0x003a0000,
257 .cpu_name = "POWER5 (gr)",
258 .cpu_features = CPU_FTRS_POWER5,
259 .cpu_user_features = COMMON_USER_POWER5,
260 .mmu_features = MMU_FTRS_POWER5,
261 .icache_bsize = 128,
262 .dcache_bsize = 128,
263 .num_pmcs = 6,
264 .pmc_type = PPC_PMC_IBM,
265 .oprofile_cpu_type = "ppc64/power5",
266 .oprofile_type = PPC_OPROFILE_POWER4,
267 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
268 * and above but only works on POWER5 and above
269 */
270 .oprofile_mmcra_sihv = MMCRA_SIHV,
271 .oprofile_mmcra_sipr = MMCRA_SIPR,
272 .platform = "power5",
273 },
274 { /* Power5++ */
275 .pvr_mask = 0xffffff00,
276 .pvr_value = 0x003b0300,
277 .cpu_name = "POWER5+ (gs)",
278 .cpu_features = CPU_FTRS_POWER5,
279 .cpu_user_features = COMMON_USER_POWER5_PLUS,
280 .mmu_features = MMU_FTRS_POWER5,
281 .icache_bsize = 128,
282 .dcache_bsize = 128,
283 .num_pmcs = 6,
284 .oprofile_cpu_type = "ppc64/power5++",
285 .oprofile_type = PPC_OPROFILE_POWER4,
286 .oprofile_mmcra_sihv = MMCRA_SIHV,
287 .oprofile_mmcra_sipr = MMCRA_SIPR,
288 .platform = "power5+",
289 },
290 { /* Power5 GS */
291 .pvr_mask = 0xffff0000,
292 .pvr_value = 0x003b0000,
293 .cpu_name = "POWER5+ (gs)",
294 .cpu_features = CPU_FTRS_POWER5,
295 .cpu_user_features = COMMON_USER_POWER5_PLUS,
296 .mmu_features = MMU_FTRS_POWER5,
297 .icache_bsize = 128,
298 .dcache_bsize = 128,
299 .num_pmcs = 6,
300 .pmc_type = PPC_PMC_IBM,
301 .oprofile_cpu_type = "ppc64/power5+",
302 .oprofile_type = PPC_OPROFILE_POWER4,
303 .oprofile_mmcra_sihv = MMCRA_SIHV,
304 .oprofile_mmcra_sipr = MMCRA_SIPR,
305 .platform = "power5+",
306 },
307 { /* POWER6 in P5+ mode; 2.04-compliant processor */
308 .pvr_mask = 0xffffffff,
309 .pvr_value = 0x0f000001,
310 .cpu_name = "POWER5+",
311 .cpu_features = CPU_FTRS_POWER5,
312 .cpu_user_features = COMMON_USER_POWER5_PLUS,
313 .mmu_features = MMU_FTRS_POWER5,
314 .icache_bsize = 128,
315 .dcache_bsize = 128,
316 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
317 .oprofile_type = PPC_OPROFILE_POWER4,
318 .platform = "power5+",
319 },
320 { /* Power6 */
321 .pvr_mask = 0xffff0000,
322 .pvr_value = 0x003e0000,
323 .cpu_name = "POWER6 (raw)",
324 .cpu_features = CPU_FTRS_POWER6,
325 .cpu_user_features = COMMON_USER_POWER6 |
326 PPC_FEATURE_POWER6_EXT,
327 .mmu_features = MMU_FTRS_POWER6,
328 .icache_bsize = 128,
329 .dcache_bsize = 128,
330 .num_pmcs = 6,
331 .pmc_type = PPC_PMC_IBM,
332 .oprofile_cpu_type = "ppc64/power6",
333 .oprofile_type = PPC_OPROFILE_POWER4,
334 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
335 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
336 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
337 POWER6_MMCRA_OTHER,
338 .platform = "power6x",
339 },
340 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
341 .pvr_mask = 0xffffffff,
342 .pvr_value = 0x0f000002,
343 .cpu_name = "POWER6 (architected)",
344 .cpu_features = CPU_FTRS_POWER6,
345 .cpu_user_features = COMMON_USER_POWER6,
346 .mmu_features = MMU_FTRS_POWER6,
347 .icache_bsize = 128,
348 .dcache_bsize = 128,
349 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
350 .oprofile_type = PPC_OPROFILE_POWER4,
351 .platform = "power6",
352 },
353 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
354 .pvr_mask = 0xffffffff,
355 .pvr_value = 0x0f000003,
356 .cpu_name = "POWER7 (architected)",
357 .cpu_features = CPU_FTRS_POWER7,
358 .cpu_user_features = COMMON_USER_POWER7,
359 .cpu_user_features2 = COMMON_USER2_POWER7,
360 .mmu_features = MMU_FTRS_POWER7,
361 .icache_bsize = 128,
362 .dcache_bsize = 128,
363 .oprofile_type = PPC_OPROFILE_POWER4,
364 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
365 .cpu_setup = __setup_cpu_power7,
366 .cpu_restore = __restore_cpu_power7,
367 .flush_tlb = __flush_tlb_power7,
368 .machine_check_early = __machine_check_early_realmode_p7,
369 .platform = "power7",
370 },
371 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
372 .pvr_mask = 0xffffffff,
373 .pvr_value = 0x0f000004,
374 .cpu_name = "POWER8 (architected)",
375 .cpu_features = CPU_FTRS_POWER8,
376 .cpu_user_features = COMMON_USER_POWER8,
377 .cpu_user_features2 = COMMON_USER2_POWER8,
378 .mmu_features = MMU_FTRS_POWER8,
379 .icache_bsize = 128,
380 .dcache_bsize = 128,
381 .oprofile_type = PPC_OPROFILE_INVALID,
382 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
383 .cpu_setup = __setup_cpu_power8,
384 .cpu_restore = __restore_cpu_power8,
385 .flush_tlb = __flush_tlb_power8,
386 .machine_check_early = __machine_check_early_realmode_p8,
387 .platform = "power8",
388 },
389 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */
390 .pvr_mask = 0xffffffff,
391 .pvr_value = 0x0f000005,
392 .cpu_name = "POWER9 (architected)",
393 .cpu_features = CPU_FTRS_POWER9,
394 .cpu_user_features = COMMON_USER_POWER9,
395 .cpu_user_features2 = COMMON_USER2_POWER9,
396 .mmu_features = MMU_FTRS_POWER9,
397 .icache_bsize = 128,
398 .dcache_bsize = 128,
399 .oprofile_type = PPC_OPROFILE_INVALID,
400 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
401 .cpu_setup = __setup_cpu_power9,
402 .cpu_restore = __restore_cpu_power9,
403 .flush_tlb = __flush_tlb_power9,
404 .platform = "power9",
405 },
406 { /* Power7 */
407 .pvr_mask = 0xffff0000,
408 .pvr_value = 0x003f0000,
409 .cpu_name = "POWER7 (raw)",
410 .cpu_features = CPU_FTRS_POWER7,
411 .cpu_user_features = COMMON_USER_POWER7,
412 .cpu_user_features2 = COMMON_USER2_POWER7,
413 .mmu_features = MMU_FTRS_POWER7,
414 .icache_bsize = 128,
415 .dcache_bsize = 128,
416 .num_pmcs = 6,
417 .pmc_type = PPC_PMC_IBM,
418 .oprofile_cpu_type = "ppc64/power7",
419 .oprofile_type = PPC_OPROFILE_POWER4,
420 .cpu_setup = __setup_cpu_power7,
421 .cpu_restore = __restore_cpu_power7,
422 .flush_tlb = __flush_tlb_power7,
423 .machine_check_early = __machine_check_early_realmode_p7,
424 .platform = "power7",
425 },
426 { /* Power7+ */
427 .pvr_mask = 0xffff0000,
428 .pvr_value = 0x004A0000,
429 .cpu_name = "POWER7+ (raw)",
430 .cpu_features = CPU_FTRS_POWER7,
431 .cpu_user_features = COMMON_USER_POWER7,
432 .cpu_user_features2 = COMMON_USER2_POWER7,
433 .mmu_features = MMU_FTRS_POWER7,
434 .icache_bsize = 128,
435 .dcache_bsize = 128,
436 .num_pmcs = 6,
437 .pmc_type = PPC_PMC_IBM,
438 .oprofile_cpu_type = "ppc64/power7",
439 .oprofile_type = PPC_OPROFILE_POWER4,
440 .cpu_setup = __setup_cpu_power7,
441 .cpu_restore = __restore_cpu_power7,
442 .flush_tlb = __flush_tlb_power7,
443 .machine_check_early = __machine_check_early_realmode_p7,
444 .platform = "power7+",
445 },
446 { /* Power8E */
447 .pvr_mask = 0xffff0000,
448 .pvr_value = 0x004b0000,
449 .cpu_name = "POWER8E (raw)",
450 .cpu_features = CPU_FTRS_POWER8E,
451 .cpu_user_features = COMMON_USER_POWER8,
452 .cpu_user_features2 = COMMON_USER2_POWER8,
453 .mmu_features = MMU_FTRS_POWER8,
454 .icache_bsize = 128,
455 .dcache_bsize = 128,
456 .num_pmcs = 6,
457 .pmc_type = PPC_PMC_IBM,
458 .oprofile_cpu_type = "ppc64/power8",
459 .oprofile_type = PPC_OPROFILE_INVALID,
460 .cpu_setup = __setup_cpu_power8,
461 .cpu_restore = __restore_cpu_power8,
462 .flush_tlb = __flush_tlb_power8,
463 .machine_check_early = __machine_check_early_realmode_p8,
464 .platform = "power8",
465 },
466 { /* Power8NVL */
467 .pvr_mask = 0xffff0000,
468 .pvr_value = 0x004c0000,
469 .cpu_name = "POWER8NVL (raw)",
470 .cpu_features = CPU_FTRS_POWER8,
471 .cpu_user_features = COMMON_USER_POWER8,
472 .cpu_user_features2 = COMMON_USER2_POWER8,
473 .mmu_features = MMU_FTRS_POWER8,
474 .icache_bsize = 128,
475 .dcache_bsize = 128,
476 .num_pmcs = 6,
477 .pmc_type = PPC_PMC_IBM,
478 .oprofile_cpu_type = "ppc64/power8",
479 .oprofile_type = PPC_OPROFILE_INVALID,
480 .cpu_setup = __setup_cpu_power8,
481 .cpu_restore = __restore_cpu_power8,
482 .flush_tlb = __flush_tlb_power8,
483 .machine_check_early = __machine_check_early_realmode_p8,
484 .platform = "power8",
485 },
486 { /* Power8 DD1: Does not support doorbell IPIs */
487 .pvr_mask = 0xffffff00,
488 .pvr_value = 0x004d0100,
489 .cpu_name = "POWER8 (raw)",
490 .cpu_features = CPU_FTRS_POWER8_DD1,
491 .cpu_user_features = COMMON_USER_POWER8,
492 .cpu_user_features2 = COMMON_USER2_POWER8,
493 .mmu_features = MMU_FTRS_POWER8,
494 .icache_bsize = 128,
495 .dcache_bsize = 128,
496 .num_pmcs = 6,
497 .pmc_type = PPC_PMC_IBM,
498 .oprofile_cpu_type = "ppc64/power8",
499 .oprofile_type = PPC_OPROFILE_INVALID,
500 .cpu_setup = __setup_cpu_power8,
501 .cpu_restore = __restore_cpu_power8,
502 .flush_tlb = __flush_tlb_power8,
503 .machine_check_early = __machine_check_early_realmode_p8,
504 .platform = "power8",
505 },
506 { /* Power8 */
507 .pvr_mask = 0xffff0000,
508 .pvr_value = 0x004d0000,
509 .cpu_name = "POWER8 (raw)",
510 .cpu_features = CPU_FTRS_POWER8,
511 .cpu_user_features = COMMON_USER_POWER8,
512 .cpu_user_features2 = COMMON_USER2_POWER8,
513 .mmu_features = MMU_FTRS_POWER8,
514 .icache_bsize = 128,
515 .dcache_bsize = 128,
516 .num_pmcs = 6,
517 .pmc_type = PPC_PMC_IBM,
518 .oprofile_cpu_type = "ppc64/power8",
519 .oprofile_type = PPC_OPROFILE_INVALID,
520 .cpu_setup = __setup_cpu_power8,
521 .cpu_restore = __restore_cpu_power8,
522 .flush_tlb = __flush_tlb_power8,
523 .machine_check_early = __machine_check_early_realmode_p8,
524 .platform = "power8",
525 },
526 { /* Power9 DD1*/
527 .pvr_mask = 0xffffff00,
528 .pvr_value = 0x004e0100,
529 .cpu_name = "POWER9 (raw)",
530 .cpu_features = CPU_FTRS_POWER9_DD1,
531 .cpu_user_features = COMMON_USER_POWER9,
532 .cpu_user_features2 = COMMON_USER2_POWER9,
533 .mmu_features = MMU_FTRS_POWER9,
534 .icache_bsize = 128,
535 .dcache_bsize = 128,
536 .num_pmcs = 6,
537 .pmc_type = PPC_PMC_IBM,
538 .oprofile_cpu_type = "ppc64/power9",
539 .oprofile_type = PPC_OPROFILE_INVALID,
540 .cpu_setup = __setup_cpu_power9,
541 .cpu_restore = __restore_cpu_power9,
542 .flush_tlb = __flush_tlb_power9,
543 .platform = "power9",
544 },
545 { /* Power9 */
546 .pvr_mask = 0xffff0000,
547 .pvr_value = 0x004e0000,
548 .cpu_name = "POWER9 (raw)",
549 .cpu_features = CPU_FTRS_POWER9,
550 .cpu_user_features = COMMON_USER_POWER9,
551 .cpu_user_features2 = COMMON_USER2_POWER9,
552 .mmu_features = MMU_FTRS_POWER9,
553 .icache_bsize = 128,
554 .dcache_bsize = 128,
555 .num_pmcs = 6,
556 .pmc_type = PPC_PMC_IBM,
557 .oprofile_cpu_type = "ppc64/power9",
558 .oprofile_type = PPC_OPROFILE_INVALID,
559 .cpu_setup = __setup_cpu_power9,
560 .cpu_restore = __restore_cpu_power9,
561 .flush_tlb = __flush_tlb_power9,
562 .platform = "power9",
563 },
564 { /* Cell Broadband Engine */
565 .pvr_mask = 0xffff0000,
566 .pvr_value = 0x00700000,
567 .cpu_name = "Cell Broadband Engine",
568 .cpu_features = CPU_FTRS_CELL,
569 .cpu_user_features = COMMON_USER_PPC64 |
570 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
571 PPC_FEATURE_SMT,
572 .mmu_features = MMU_FTRS_CELL,
573 .icache_bsize = 128,
574 .dcache_bsize = 128,
575 .num_pmcs = 4,
576 .pmc_type = PPC_PMC_IBM,
577 .oprofile_cpu_type = "ppc64/cell-be",
578 .oprofile_type = PPC_OPROFILE_CELL,
579 .platform = "ppc-cell-be",
580 },
581 { /* PA Semi PA6T */
582 .pvr_mask = 0x7fff0000,
583 .pvr_value = 0x00900000,
584 .cpu_name = "PA6T",
585 .cpu_features = CPU_FTRS_PA6T,
586 .cpu_user_features = COMMON_USER_PA6T,
587 .mmu_features = MMU_FTRS_PA6T,
588 .icache_bsize = 64,
589 .dcache_bsize = 64,
590 .num_pmcs = 6,
591 .pmc_type = PPC_PMC_PA6T,
592 .cpu_setup = __setup_cpu_pa6t,
593 .cpu_restore = __restore_cpu_pa6t,
594 .oprofile_cpu_type = "ppc64/pa6t",
595 .oprofile_type = PPC_OPROFILE_PA6T,
596 .platform = "pa6t",
597 },
598 { /* default match */
599 .pvr_mask = 0x00000000,
600 .pvr_value = 0x00000000,
601 .cpu_name = "POWER4 (compatible)",
602 .cpu_features = CPU_FTRS_COMPATIBLE,
603 .cpu_user_features = COMMON_USER_PPC64,
604 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
605 .icache_bsize = 128,
606 .dcache_bsize = 128,
607 .num_pmcs = 6,
608 .pmc_type = PPC_PMC_IBM,
609 .platform = "power4",
610 }
611 #endif /* CONFIG_PPC_BOOK3S_64 */
612
613 #ifdef CONFIG_PPC32
614 #ifdef CONFIG_PPC_BOOK3S_32
615 { /* 601 */
616 .pvr_mask = 0xffff0000,
617 .pvr_value = 0x00010000,
618 .cpu_name = "601",
619 .cpu_features = CPU_FTRS_PPC601,
620 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
621 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
622 .mmu_features = MMU_FTR_HPTE_TABLE,
623 .icache_bsize = 32,
624 .dcache_bsize = 32,
625 .machine_check = machine_check_generic,
626 .platform = "ppc601",
627 },
628 { /* 603 */
629 .pvr_mask = 0xffff0000,
630 .pvr_value = 0x00030000,
631 .cpu_name = "603",
632 .cpu_features = CPU_FTRS_603,
633 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
634 .mmu_features = 0,
635 .icache_bsize = 32,
636 .dcache_bsize = 32,
637 .cpu_setup = __setup_cpu_603,
638 .machine_check = machine_check_generic,
639 .platform = "ppc603",
640 },
641 { /* 603e */
642 .pvr_mask = 0xffff0000,
643 .pvr_value = 0x00060000,
644 .cpu_name = "603e",
645 .cpu_features = CPU_FTRS_603,
646 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
647 .mmu_features = 0,
648 .icache_bsize = 32,
649 .dcache_bsize = 32,
650 .cpu_setup = __setup_cpu_603,
651 .machine_check = machine_check_generic,
652 .platform = "ppc603",
653 },
654 { /* 603ev */
655 .pvr_mask = 0xffff0000,
656 .pvr_value = 0x00070000,
657 .cpu_name = "603ev",
658 .cpu_features = CPU_FTRS_603,
659 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
660 .mmu_features = 0,
661 .icache_bsize = 32,
662 .dcache_bsize = 32,
663 .cpu_setup = __setup_cpu_603,
664 .machine_check = machine_check_generic,
665 .platform = "ppc603",
666 },
667 { /* 604 */
668 .pvr_mask = 0xffff0000,
669 .pvr_value = 0x00040000,
670 .cpu_name = "604",
671 .cpu_features = CPU_FTRS_604,
672 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
673 .mmu_features = MMU_FTR_HPTE_TABLE,
674 .icache_bsize = 32,
675 .dcache_bsize = 32,
676 .num_pmcs = 2,
677 .cpu_setup = __setup_cpu_604,
678 .machine_check = machine_check_generic,
679 .platform = "ppc604",
680 },
681 { /* 604e */
682 .pvr_mask = 0xfffff000,
683 .pvr_value = 0x00090000,
684 .cpu_name = "604e",
685 .cpu_features = CPU_FTRS_604,
686 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
687 .mmu_features = MMU_FTR_HPTE_TABLE,
688 .icache_bsize = 32,
689 .dcache_bsize = 32,
690 .num_pmcs = 4,
691 .cpu_setup = __setup_cpu_604,
692 .machine_check = machine_check_generic,
693 .platform = "ppc604",
694 },
695 { /* 604r */
696 .pvr_mask = 0xffff0000,
697 .pvr_value = 0x00090000,
698 .cpu_name = "604r",
699 .cpu_features = CPU_FTRS_604,
700 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
701 .mmu_features = MMU_FTR_HPTE_TABLE,
702 .icache_bsize = 32,
703 .dcache_bsize = 32,
704 .num_pmcs = 4,
705 .cpu_setup = __setup_cpu_604,
706 .machine_check = machine_check_generic,
707 .platform = "ppc604",
708 },
709 { /* 604ev */
710 .pvr_mask = 0xffff0000,
711 .pvr_value = 0x000a0000,
712 .cpu_name = "604ev",
713 .cpu_features = CPU_FTRS_604,
714 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
715 .mmu_features = MMU_FTR_HPTE_TABLE,
716 .icache_bsize = 32,
717 .dcache_bsize = 32,
718 .num_pmcs = 4,
719 .cpu_setup = __setup_cpu_604,
720 .machine_check = machine_check_generic,
721 .platform = "ppc604",
722 },
723 { /* 740/750 (0x4202, don't support TAU ?) */
724 .pvr_mask = 0xffffffff,
725 .pvr_value = 0x00084202,
726 .cpu_name = "740/750",
727 .cpu_features = CPU_FTRS_740_NOTAU,
728 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
729 .mmu_features = MMU_FTR_HPTE_TABLE,
730 .icache_bsize = 32,
731 .dcache_bsize = 32,
732 .num_pmcs = 4,
733 .cpu_setup = __setup_cpu_750,
734 .machine_check = machine_check_generic,
735 .platform = "ppc750",
736 },
737 { /* 750CX (80100 and 8010x?) */
738 .pvr_mask = 0xfffffff0,
739 .pvr_value = 0x00080100,
740 .cpu_name = "750CX",
741 .cpu_features = CPU_FTRS_750,
742 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
743 .mmu_features = MMU_FTR_HPTE_TABLE,
744 .icache_bsize = 32,
745 .dcache_bsize = 32,
746 .num_pmcs = 4,
747 .cpu_setup = __setup_cpu_750cx,
748 .machine_check = machine_check_generic,
749 .platform = "ppc750",
750 },
751 { /* 750CX (82201 and 82202) */
752 .pvr_mask = 0xfffffff0,
753 .pvr_value = 0x00082200,
754 .cpu_name = "750CX",
755 .cpu_features = CPU_FTRS_750,
756 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
757 .mmu_features = MMU_FTR_HPTE_TABLE,
758 .icache_bsize = 32,
759 .dcache_bsize = 32,
760 .num_pmcs = 4,
761 .pmc_type = PPC_PMC_IBM,
762 .cpu_setup = __setup_cpu_750cx,
763 .machine_check = machine_check_generic,
764 .platform = "ppc750",
765 },
766 { /* 750CXe (82214) */
767 .pvr_mask = 0xfffffff0,
768 .pvr_value = 0x00082210,
769 .cpu_name = "750CXe",
770 .cpu_features = CPU_FTRS_750,
771 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
772 .mmu_features = MMU_FTR_HPTE_TABLE,
773 .icache_bsize = 32,
774 .dcache_bsize = 32,
775 .num_pmcs = 4,
776 .pmc_type = PPC_PMC_IBM,
777 .cpu_setup = __setup_cpu_750cx,
778 .machine_check = machine_check_generic,
779 .platform = "ppc750",
780 },
781 { /* 750CXe "Gekko" (83214) */
782 .pvr_mask = 0xffffffff,
783 .pvr_value = 0x00083214,
784 .cpu_name = "750CXe",
785 .cpu_features = CPU_FTRS_750,
786 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
787 .mmu_features = MMU_FTR_HPTE_TABLE,
788 .icache_bsize = 32,
789 .dcache_bsize = 32,
790 .num_pmcs = 4,
791 .pmc_type = PPC_PMC_IBM,
792 .cpu_setup = __setup_cpu_750cx,
793 .machine_check = machine_check_generic,
794 .platform = "ppc750",
795 },
796 { /* 750CL (and "Broadway") */
797 .pvr_mask = 0xfffff0e0,
798 .pvr_value = 0x00087000,
799 .cpu_name = "750CL",
800 .cpu_features = CPU_FTRS_750CL,
801 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
802 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
803 .icache_bsize = 32,
804 .dcache_bsize = 32,
805 .num_pmcs = 4,
806 .pmc_type = PPC_PMC_IBM,
807 .cpu_setup = __setup_cpu_750,
808 .machine_check = machine_check_generic,
809 .platform = "ppc750",
810 .oprofile_cpu_type = "ppc/750",
811 .oprofile_type = PPC_OPROFILE_G4,
812 },
813 { /* 745/755 */
814 .pvr_mask = 0xfffff000,
815 .pvr_value = 0x00083000,
816 .cpu_name = "745/755",
817 .cpu_features = CPU_FTRS_750,
818 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
819 .mmu_features = MMU_FTR_HPTE_TABLE,
820 .icache_bsize = 32,
821 .dcache_bsize = 32,
822 .num_pmcs = 4,
823 .pmc_type = PPC_PMC_IBM,
824 .cpu_setup = __setup_cpu_750,
825 .machine_check = machine_check_generic,
826 .platform = "ppc750",
827 },
828 { /* 750FX rev 1.x */
829 .pvr_mask = 0xffffff00,
830 .pvr_value = 0x70000100,
831 .cpu_name = "750FX",
832 .cpu_features = CPU_FTRS_750FX1,
833 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
834 .mmu_features = MMU_FTR_HPTE_TABLE,
835 .icache_bsize = 32,
836 .dcache_bsize = 32,
837 .num_pmcs = 4,
838 .pmc_type = PPC_PMC_IBM,
839 .cpu_setup = __setup_cpu_750,
840 .machine_check = machine_check_generic,
841 .platform = "ppc750",
842 .oprofile_cpu_type = "ppc/750",
843 .oprofile_type = PPC_OPROFILE_G4,
844 },
845 { /* 750FX rev 2.0 must disable HID0[DPM] */
846 .pvr_mask = 0xffffffff,
847 .pvr_value = 0x70000200,
848 .cpu_name = "750FX",
849 .cpu_features = CPU_FTRS_750FX2,
850 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
851 .mmu_features = MMU_FTR_HPTE_TABLE,
852 .icache_bsize = 32,
853 .dcache_bsize = 32,
854 .num_pmcs = 4,
855 .pmc_type = PPC_PMC_IBM,
856 .cpu_setup = __setup_cpu_750,
857 .machine_check = machine_check_generic,
858 .platform = "ppc750",
859 .oprofile_cpu_type = "ppc/750",
860 .oprofile_type = PPC_OPROFILE_G4,
861 },
862 { /* 750FX (All revs except 2.0) */
863 .pvr_mask = 0xffff0000,
864 .pvr_value = 0x70000000,
865 .cpu_name = "750FX",
866 .cpu_features = CPU_FTRS_750FX,
867 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
868 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
869 .icache_bsize = 32,
870 .dcache_bsize = 32,
871 .num_pmcs = 4,
872 .pmc_type = PPC_PMC_IBM,
873 .cpu_setup = __setup_cpu_750fx,
874 .machine_check = machine_check_generic,
875 .platform = "ppc750",
876 .oprofile_cpu_type = "ppc/750",
877 .oprofile_type = PPC_OPROFILE_G4,
878 },
879 { /* 750GX */
880 .pvr_mask = 0xffff0000,
881 .pvr_value = 0x70020000,
882 .cpu_name = "750GX",
883 .cpu_features = CPU_FTRS_750GX,
884 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
885 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
886 .icache_bsize = 32,
887 .dcache_bsize = 32,
888 .num_pmcs = 4,
889 .pmc_type = PPC_PMC_IBM,
890 .cpu_setup = __setup_cpu_750fx,
891 .machine_check = machine_check_generic,
892 .platform = "ppc750",
893 .oprofile_cpu_type = "ppc/750",
894 .oprofile_type = PPC_OPROFILE_G4,
895 },
896 { /* 740/750 (L2CR bit need fixup for 740) */
897 .pvr_mask = 0xffff0000,
898 .pvr_value = 0x00080000,
899 .cpu_name = "740/750",
900 .cpu_features = CPU_FTRS_740,
901 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
902 .mmu_features = MMU_FTR_HPTE_TABLE,
903 .icache_bsize = 32,
904 .dcache_bsize = 32,
905 .num_pmcs = 4,
906 .pmc_type = PPC_PMC_IBM,
907 .cpu_setup = __setup_cpu_750,
908 .machine_check = machine_check_generic,
909 .platform = "ppc750",
910 },
911 { /* 7400 rev 1.1 ? (no TAU) */
912 .pvr_mask = 0xffffffff,
913 .pvr_value = 0x000c1101,
914 .cpu_name = "7400 (1.1)",
915 .cpu_features = CPU_FTRS_7400_NOTAU,
916 .cpu_user_features = COMMON_USER |
917 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
918 .mmu_features = MMU_FTR_HPTE_TABLE,
919 .icache_bsize = 32,
920 .dcache_bsize = 32,
921 .num_pmcs = 4,
922 .pmc_type = PPC_PMC_G4,
923 .cpu_setup = __setup_cpu_7400,
924 .machine_check = machine_check_generic,
925 .platform = "ppc7400",
926 },
927 { /* 7400 */
928 .pvr_mask = 0xffff0000,
929 .pvr_value = 0x000c0000,
930 .cpu_name = "7400",
931 .cpu_features = CPU_FTRS_7400,
932 .cpu_user_features = COMMON_USER |
933 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
934 .mmu_features = MMU_FTR_HPTE_TABLE,
935 .icache_bsize = 32,
936 .dcache_bsize = 32,
937 .num_pmcs = 4,
938 .pmc_type = PPC_PMC_G4,
939 .cpu_setup = __setup_cpu_7400,
940 .machine_check = machine_check_generic,
941 .platform = "ppc7400",
942 },
943 { /* 7410 */
944 .pvr_mask = 0xffff0000,
945 .pvr_value = 0x800c0000,
946 .cpu_name = "7410",
947 .cpu_features = CPU_FTRS_7400,
948 .cpu_user_features = COMMON_USER |
949 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
950 .mmu_features = MMU_FTR_HPTE_TABLE,
951 .icache_bsize = 32,
952 .dcache_bsize = 32,
953 .num_pmcs = 4,
954 .pmc_type = PPC_PMC_G4,
955 .cpu_setup = __setup_cpu_7410,
956 .machine_check = machine_check_generic,
957 .platform = "ppc7400",
958 },
959 { /* 7450 2.0 - no doze/nap */
960 .pvr_mask = 0xffffffff,
961 .pvr_value = 0x80000200,
962 .cpu_name = "7450",
963 .cpu_features = CPU_FTRS_7450_20,
964 .cpu_user_features = COMMON_USER |
965 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
966 .mmu_features = MMU_FTR_HPTE_TABLE,
967 .icache_bsize = 32,
968 .dcache_bsize = 32,
969 .num_pmcs = 6,
970 .pmc_type = PPC_PMC_G4,
971 .cpu_setup = __setup_cpu_745x,
972 .oprofile_cpu_type = "ppc/7450",
973 .oprofile_type = PPC_OPROFILE_G4,
974 .machine_check = machine_check_generic,
975 .platform = "ppc7450",
976 },
977 { /* 7450 2.1 */
978 .pvr_mask = 0xffffffff,
979 .pvr_value = 0x80000201,
980 .cpu_name = "7450",
981 .cpu_features = CPU_FTRS_7450_21,
982 .cpu_user_features = COMMON_USER |
983 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
984 .mmu_features = MMU_FTR_HPTE_TABLE,
985 .icache_bsize = 32,
986 .dcache_bsize = 32,
987 .num_pmcs = 6,
988 .pmc_type = PPC_PMC_G4,
989 .cpu_setup = __setup_cpu_745x,
990 .oprofile_cpu_type = "ppc/7450",
991 .oprofile_type = PPC_OPROFILE_G4,
992 .machine_check = machine_check_generic,
993 .platform = "ppc7450",
994 },
995 { /* 7450 2.3 and newer */
996 .pvr_mask = 0xffff0000,
997 .pvr_value = 0x80000000,
998 .cpu_name = "7450",
999 .cpu_features = CPU_FTRS_7450_23,
1000 .cpu_user_features = COMMON_USER |
1001 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1002 .mmu_features = MMU_FTR_HPTE_TABLE,
1003 .icache_bsize = 32,
1004 .dcache_bsize = 32,
1005 .num_pmcs = 6,
1006 .pmc_type = PPC_PMC_G4,
1007 .cpu_setup = __setup_cpu_745x,
1008 .oprofile_cpu_type = "ppc/7450",
1009 .oprofile_type = PPC_OPROFILE_G4,
1010 .machine_check = machine_check_generic,
1011 .platform = "ppc7450",
1012 },
1013 { /* 7455 rev 1.x */
1014 .pvr_mask = 0xffffff00,
1015 .pvr_value = 0x80010100,
1016 .cpu_name = "7455",
1017 .cpu_features = CPU_FTRS_7455_1,
1018 .cpu_user_features = COMMON_USER |
1019 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1020 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1021 .icache_bsize = 32,
1022 .dcache_bsize = 32,
1023 .num_pmcs = 6,
1024 .pmc_type = PPC_PMC_G4,
1025 .cpu_setup = __setup_cpu_745x,
1026 .oprofile_cpu_type = "ppc/7450",
1027 .oprofile_type = PPC_OPROFILE_G4,
1028 .machine_check = machine_check_generic,
1029 .platform = "ppc7450",
1030 },
1031 { /* 7455 rev 2.0 */
1032 .pvr_mask = 0xffffffff,
1033 .pvr_value = 0x80010200,
1034 .cpu_name = "7455",
1035 .cpu_features = CPU_FTRS_7455_20,
1036 .cpu_user_features = COMMON_USER |
1037 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1038 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1039 .icache_bsize = 32,
1040 .dcache_bsize = 32,
1041 .num_pmcs = 6,
1042 .pmc_type = PPC_PMC_G4,
1043 .cpu_setup = __setup_cpu_745x,
1044 .oprofile_cpu_type = "ppc/7450",
1045 .oprofile_type = PPC_OPROFILE_G4,
1046 .machine_check = machine_check_generic,
1047 .platform = "ppc7450",
1048 },
1049 { /* 7455 others */
1050 .pvr_mask = 0xffff0000,
1051 .pvr_value = 0x80010000,
1052 .cpu_name = "7455",
1053 .cpu_features = CPU_FTRS_7455,
1054 .cpu_user_features = COMMON_USER |
1055 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1056 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1057 .icache_bsize = 32,
1058 .dcache_bsize = 32,
1059 .num_pmcs = 6,
1060 .pmc_type = PPC_PMC_G4,
1061 .cpu_setup = __setup_cpu_745x,
1062 .oprofile_cpu_type = "ppc/7450",
1063 .oprofile_type = PPC_OPROFILE_G4,
1064 .machine_check = machine_check_generic,
1065 .platform = "ppc7450",
1066 },
1067 { /* 7447/7457 Rev 1.0 */
1068 .pvr_mask = 0xffffffff,
1069 .pvr_value = 0x80020100,
1070 .cpu_name = "7447/7457",
1071 .cpu_features = CPU_FTRS_7447_10,
1072 .cpu_user_features = COMMON_USER |
1073 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1074 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1075 .icache_bsize = 32,
1076 .dcache_bsize = 32,
1077 .num_pmcs = 6,
1078 .pmc_type = PPC_PMC_G4,
1079 .cpu_setup = __setup_cpu_745x,
1080 .oprofile_cpu_type = "ppc/7450",
1081 .oprofile_type = PPC_OPROFILE_G4,
1082 .machine_check = machine_check_generic,
1083 .platform = "ppc7450",
1084 },
1085 { /* 7447/7457 Rev 1.1 */
1086 .pvr_mask = 0xffffffff,
1087 .pvr_value = 0x80020101,
1088 .cpu_name = "7447/7457",
1089 .cpu_features = CPU_FTRS_7447_10,
1090 .cpu_user_features = COMMON_USER |
1091 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1092 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1093 .icache_bsize = 32,
1094 .dcache_bsize = 32,
1095 .num_pmcs = 6,
1096 .pmc_type = PPC_PMC_G4,
1097 .cpu_setup = __setup_cpu_745x,
1098 .oprofile_cpu_type = "ppc/7450",
1099 .oprofile_type = PPC_OPROFILE_G4,
1100 .machine_check = machine_check_generic,
1101 .platform = "ppc7450",
1102 },
1103 { /* 7447/7457 Rev 1.2 and later */
1104 .pvr_mask = 0xffff0000,
1105 .pvr_value = 0x80020000,
1106 .cpu_name = "7447/7457",
1107 .cpu_features = CPU_FTRS_7447,
1108 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1109 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1110 .icache_bsize = 32,
1111 .dcache_bsize = 32,
1112 .num_pmcs = 6,
1113 .pmc_type = PPC_PMC_G4,
1114 .cpu_setup = __setup_cpu_745x,
1115 .oprofile_cpu_type = "ppc/7450",
1116 .oprofile_type = PPC_OPROFILE_G4,
1117 .machine_check = machine_check_generic,
1118 .platform = "ppc7450",
1119 },
1120 { /* 7447A */
1121 .pvr_mask = 0xffff0000,
1122 .pvr_value = 0x80030000,
1123 .cpu_name = "7447A",
1124 .cpu_features = CPU_FTRS_7447A,
1125 .cpu_user_features = COMMON_USER |
1126 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1127 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1128 .icache_bsize = 32,
1129 .dcache_bsize = 32,
1130 .num_pmcs = 6,
1131 .pmc_type = PPC_PMC_G4,
1132 .cpu_setup = __setup_cpu_745x,
1133 .oprofile_cpu_type = "ppc/7450",
1134 .oprofile_type = PPC_OPROFILE_G4,
1135 .machine_check = machine_check_generic,
1136 .platform = "ppc7450",
1137 },
1138 { /* 7448 */
1139 .pvr_mask = 0xffff0000,
1140 .pvr_value = 0x80040000,
1141 .cpu_name = "7448",
1142 .cpu_features = CPU_FTRS_7448,
1143 .cpu_user_features = COMMON_USER |
1144 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1145 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1146 .icache_bsize = 32,
1147 .dcache_bsize = 32,
1148 .num_pmcs = 6,
1149 .pmc_type = PPC_PMC_G4,
1150 .cpu_setup = __setup_cpu_745x,
1151 .oprofile_cpu_type = "ppc/7450",
1152 .oprofile_type = PPC_OPROFILE_G4,
1153 .machine_check = machine_check_generic,
1154 .platform = "ppc7450",
1155 },
1156 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1157 .pvr_mask = 0x7fff0000,
1158 .pvr_value = 0x00810000,
1159 .cpu_name = "82xx",
1160 .cpu_features = CPU_FTRS_82XX,
1161 .cpu_user_features = COMMON_USER,
1162 .mmu_features = 0,
1163 .icache_bsize = 32,
1164 .dcache_bsize = 32,
1165 .cpu_setup = __setup_cpu_603,
1166 .machine_check = machine_check_generic,
1167 .platform = "ppc603",
1168 },
1169 { /* All G2_LE (603e core, plus some) have the same pvr */
1170 .pvr_mask = 0x7fff0000,
1171 .pvr_value = 0x00820000,
1172 .cpu_name = "G2_LE",
1173 .cpu_features = CPU_FTRS_G2_LE,
1174 .cpu_user_features = COMMON_USER,
1175 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1176 .icache_bsize = 32,
1177 .dcache_bsize = 32,
1178 .cpu_setup = __setup_cpu_603,
1179 .machine_check = machine_check_generic,
1180 .platform = "ppc603",
1181 },
1182 { /* e300c1 (a 603e core, plus some) on 83xx */
1183 .pvr_mask = 0x7fff0000,
1184 .pvr_value = 0x00830000,
1185 .cpu_name = "e300c1",
1186 .cpu_features = CPU_FTRS_E300,
1187 .cpu_user_features = COMMON_USER,
1188 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1189 .icache_bsize = 32,
1190 .dcache_bsize = 32,
1191 .cpu_setup = __setup_cpu_603,
1192 .machine_check = machine_check_generic,
1193 .platform = "ppc603",
1194 },
1195 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1196 .pvr_mask = 0x7fff0000,
1197 .pvr_value = 0x00840000,
1198 .cpu_name = "e300c2",
1199 .cpu_features = CPU_FTRS_E300C2,
1200 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1201 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1202 MMU_FTR_NEED_DTLB_SW_LRU,
1203 .icache_bsize = 32,
1204 .dcache_bsize = 32,
1205 .cpu_setup = __setup_cpu_603,
1206 .machine_check = machine_check_generic,
1207 .platform = "ppc603",
1208 },
1209 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1210 .pvr_mask = 0x7fff0000,
1211 .pvr_value = 0x00850000,
1212 .cpu_name = "e300c3",
1213 .cpu_features = CPU_FTRS_E300,
1214 .cpu_user_features = COMMON_USER,
1215 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1216 MMU_FTR_NEED_DTLB_SW_LRU,
1217 .icache_bsize = 32,
1218 .dcache_bsize = 32,
1219 .cpu_setup = __setup_cpu_603,
1220 .machine_check = machine_check_generic,
1221 .num_pmcs = 4,
1222 .oprofile_cpu_type = "ppc/e300",
1223 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1224 .platform = "ppc603",
1225 },
1226 { /* e300c4 (e300c1, plus one IU) */
1227 .pvr_mask = 0x7fff0000,
1228 .pvr_value = 0x00860000,
1229 .cpu_name = "e300c4",
1230 .cpu_features = CPU_FTRS_E300,
1231 .cpu_user_features = COMMON_USER,
1232 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1233 MMU_FTR_NEED_DTLB_SW_LRU,
1234 .icache_bsize = 32,
1235 .dcache_bsize = 32,
1236 .cpu_setup = __setup_cpu_603,
1237 .machine_check = machine_check_generic,
1238 .num_pmcs = 4,
1239 .oprofile_cpu_type = "ppc/e300",
1240 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1241 .platform = "ppc603",
1242 },
1243 { /* default match, we assume split I/D cache & TB (non-601)... */
1244 .pvr_mask = 0x00000000,
1245 .pvr_value = 0x00000000,
1246 .cpu_name = "(generic PPC)",
1247 .cpu_features = CPU_FTRS_CLASSIC32,
1248 .cpu_user_features = COMMON_USER,
1249 .mmu_features = MMU_FTR_HPTE_TABLE,
1250 .icache_bsize = 32,
1251 .dcache_bsize = 32,
1252 .machine_check = machine_check_generic,
1253 .platform = "ppc603",
1254 },
1255 #endif /* CONFIG_PPC_BOOK3S_32 */
1256 #ifdef CONFIG_8xx
1257 { /* 8xx */
1258 .pvr_mask = 0xffff0000,
1259 .pvr_value = 0x00500000,
1260 .cpu_name = "8xx",
1261 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1262 * if the 8xx code is there.... */
1263 .cpu_features = CPU_FTRS_8XX,
1264 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1265 .mmu_features = MMU_FTR_TYPE_8xx,
1266 .icache_bsize = 16,
1267 .dcache_bsize = 16,
1268 .machine_check = machine_check_8xx,
1269 .platform = "ppc823",
1270 },
1271 #endif /* CONFIG_8xx */
1272 #ifdef CONFIG_40x
1273 { /* 403GC */
1274 .pvr_mask = 0xffffff00,
1275 .pvr_value = 0x00200200,
1276 .cpu_name = "403GC",
1277 .cpu_features = CPU_FTRS_40X,
1278 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1279 .mmu_features = MMU_FTR_TYPE_40x,
1280 .icache_bsize = 16,
1281 .dcache_bsize = 16,
1282 .machine_check = machine_check_4xx,
1283 .platform = "ppc403",
1284 },
1285 { /* 403GCX */
1286 .pvr_mask = 0xffffff00,
1287 .pvr_value = 0x00201400,
1288 .cpu_name = "403GCX",
1289 .cpu_features = CPU_FTRS_40X,
1290 .cpu_user_features = PPC_FEATURE_32 |
1291 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1292 .mmu_features = MMU_FTR_TYPE_40x,
1293 .icache_bsize = 16,
1294 .dcache_bsize = 16,
1295 .machine_check = machine_check_4xx,
1296 .platform = "ppc403",
1297 },
1298 { /* 403G ?? */
1299 .pvr_mask = 0xffff0000,
1300 .pvr_value = 0x00200000,
1301 .cpu_name = "403G ??",
1302 .cpu_features = CPU_FTRS_40X,
1303 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1304 .mmu_features = MMU_FTR_TYPE_40x,
1305 .icache_bsize = 16,
1306 .dcache_bsize = 16,
1307 .machine_check = machine_check_4xx,
1308 .platform = "ppc403",
1309 },
1310 { /* 405GP */
1311 .pvr_mask = 0xffff0000,
1312 .pvr_value = 0x40110000,
1313 .cpu_name = "405GP",
1314 .cpu_features = CPU_FTRS_40X,
1315 .cpu_user_features = PPC_FEATURE_32 |
1316 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1317 .mmu_features = MMU_FTR_TYPE_40x,
1318 .icache_bsize = 32,
1319 .dcache_bsize = 32,
1320 .machine_check = machine_check_4xx,
1321 .platform = "ppc405",
1322 },
1323 { /* STB 03xxx */
1324 .pvr_mask = 0xffff0000,
1325 .pvr_value = 0x40130000,
1326 .cpu_name = "STB03xxx",
1327 .cpu_features = CPU_FTRS_40X,
1328 .cpu_user_features = PPC_FEATURE_32 |
1329 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1330 .mmu_features = MMU_FTR_TYPE_40x,
1331 .icache_bsize = 32,
1332 .dcache_bsize = 32,
1333 .machine_check = machine_check_4xx,
1334 .platform = "ppc405",
1335 },
1336 { /* STB 04xxx */
1337 .pvr_mask = 0xffff0000,
1338 .pvr_value = 0x41810000,
1339 .cpu_name = "STB04xxx",
1340 .cpu_features = CPU_FTRS_40X,
1341 .cpu_user_features = PPC_FEATURE_32 |
1342 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1343 .mmu_features = MMU_FTR_TYPE_40x,
1344 .icache_bsize = 32,
1345 .dcache_bsize = 32,
1346 .machine_check = machine_check_4xx,
1347 .platform = "ppc405",
1348 },
1349 { /* NP405L */
1350 .pvr_mask = 0xffff0000,
1351 .pvr_value = 0x41610000,
1352 .cpu_name = "NP405L",
1353 .cpu_features = CPU_FTRS_40X,
1354 .cpu_user_features = PPC_FEATURE_32 |
1355 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1356 .mmu_features = MMU_FTR_TYPE_40x,
1357 .icache_bsize = 32,
1358 .dcache_bsize = 32,
1359 .machine_check = machine_check_4xx,
1360 .platform = "ppc405",
1361 },
1362 { /* NP4GS3 */
1363 .pvr_mask = 0xffff0000,
1364 .pvr_value = 0x40B10000,
1365 .cpu_name = "NP4GS3",
1366 .cpu_features = CPU_FTRS_40X,
1367 .cpu_user_features = PPC_FEATURE_32 |
1368 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1369 .mmu_features = MMU_FTR_TYPE_40x,
1370 .icache_bsize = 32,
1371 .dcache_bsize = 32,
1372 .machine_check = machine_check_4xx,
1373 .platform = "ppc405",
1374 },
1375 { /* NP405H */
1376 .pvr_mask = 0xffff0000,
1377 .pvr_value = 0x41410000,
1378 .cpu_name = "NP405H",
1379 .cpu_features = CPU_FTRS_40X,
1380 .cpu_user_features = PPC_FEATURE_32 |
1381 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1382 .mmu_features = MMU_FTR_TYPE_40x,
1383 .icache_bsize = 32,
1384 .dcache_bsize = 32,
1385 .machine_check = machine_check_4xx,
1386 .platform = "ppc405",
1387 },
1388 { /* 405GPr */
1389 .pvr_mask = 0xffff0000,
1390 .pvr_value = 0x50910000,
1391 .cpu_name = "405GPr",
1392 .cpu_features = CPU_FTRS_40X,
1393 .cpu_user_features = PPC_FEATURE_32 |
1394 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1395 .mmu_features = MMU_FTR_TYPE_40x,
1396 .icache_bsize = 32,
1397 .dcache_bsize = 32,
1398 .machine_check = machine_check_4xx,
1399 .platform = "ppc405",
1400 },
1401 { /* STBx25xx */
1402 .pvr_mask = 0xffff0000,
1403 .pvr_value = 0x51510000,
1404 .cpu_name = "STBx25xx",
1405 .cpu_features = CPU_FTRS_40X,
1406 .cpu_user_features = PPC_FEATURE_32 |
1407 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1408 .mmu_features = MMU_FTR_TYPE_40x,
1409 .icache_bsize = 32,
1410 .dcache_bsize = 32,
1411 .machine_check = machine_check_4xx,
1412 .platform = "ppc405",
1413 },
1414 { /* 405LP */
1415 .pvr_mask = 0xffff0000,
1416 .pvr_value = 0x41F10000,
1417 .cpu_name = "405LP",
1418 .cpu_features = CPU_FTRS_40X,
1419 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1420 .mmu_features = MMU_FTR_TYPE_40x,
1421 .icache_bsize = 32,
1422 .dcache_bsize = 32,
1423 .machine_check = machine_check_4xx,
1424 .platform = "ppc405",
1425 },
1426 { /* Xilinx Virtex-II Pro */
1427 .pvr_mask = 0xfffff000,
1428 .pvr_value = 0x20010000,
1429 .cpu_name = "Virtex-II Pro",
1430 .cpu_features = CPU_FTRS_40X,
1431 .cpu_user_features = PPC_FEATURE_32 |
1432 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1433 .mmu_features = MMU_FTR_TYPE_40x,
1434 .icache_bsize = 32,
1435 .dcache_bsize = 32,
1436 .machine_check = machine_check_4xx,
1437 .platform = "ppc405",
1438 },
1439 { /* Xilinx Virtex-4 FX */
1440 .pvr_mask = 0xfffff000,
1441 .pvr_value = 0x20011000,
1442 .cpu_name = "Virtex-4 FX",
1443 .cpu_features = CPU_FTRS_40X,
1444 .cpu_user_features = PPC_FEATURE_32 |
1445 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1446 .mmu_features = MMU_FTR_TYPE_40x,
1447 .icache_bsize = 32,
1448 .dcache_bsize = 32,
1449 .machine_check = machine_check_4xx,
1450 .platform = "ppc405",
1451 },
1452 { /* 405EP */
1453 .pvr_mask = 0xffff0000,
1454 .pvr_value = 0x51210000,
1455 .cpu_name = "405EP",
1456 .cpu_features = CPU_FTRS_40X,
1457 .cpu_user_features = PPC_FEATURE_32 |
1458 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1459 .mmu_features = MMU_FTR_TYPE_40x,
1460 .icache_bsize = 32,
1461 .dcache_bsize = 32,
1462 .machine_check = machine_check_4xx,
1463 .platform = "ppc405",
1464 },
1465 { /* 405EX Rev. A/B with Security */
1466 .pvr_mask = 0xffff000f,
1467 .pvr_value = 0x12910007,
1468 .cpu_name = "405EX Rev. A/B",
1469 .cpu_features = CPU_FTRS_40X,
1470 .cpu_user_features = PPC_FEATURE_32 |
1471 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1472 .mmu_features = MMU_FTR_TYPE_40x,
1473 .icache_bsize = 32,
1474 .dcache_bsize = 32,
1475 .machine_check = machine_check_4xx,
1476 .platform = "ppc405",
1477 },
1478 { /* 405EX Rev. C without Security */
1479 .pvr_mask = 0xffff000f,
1480 .pvr_value = 0x1291000d,
1481 .cpu_name = "405EX Rev. C",
1482 .cpu_features = CPU_FTRS_40X,
1483 .cpu_user_features = PPC_FEATURE_32 |
1484 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1485 .mmu_features = MMU_FTR_TYPE_40x,
1486 .icache_bsize = 32,
1487 .dcache_bsize = 32,
1488 .machine_check = machine_check_4xx,
1489 .platform = "ppc405",
1490 },
1491 { /* 405EX Rev. C with Security */
1492 .pvr_mask = 0xffff000f,
1493 .pvr_value = 0x1291000f,
1494 .cpu_name = "405EX Rev. C",
1495 .cpu_features = CPU_FTRS_40X,
1496 .cpu_user_features = PPC_FEATURE_32 |
1497 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1498 .mmu_features = MMU_FTR_TYPE_40x,
1499 .icache_bsize = 32,
1500 .dcache_bsize = 32,
1501 .machine_check = machine_check_4xx,
1502 .platform = "ppc405",
1503 },
1504 { /* 405EX Rev. D without Security */
1505 .pvr_mask = 0xffff000f,
1506 .pvr_value = 0x12910003,
1507 .cpu_name = "405EX Rev. D",
1508 .cpu_features = CPU_FTRS_40X,
1509 .cpu_user_features = PPC_FEATURE_32 |
1510 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1511 .mmu_features = MMU_FTR_TYPE_40x,
1512 .icache_bsize = 32,
1513 .dcache_bsize = 32,
1514 .machine_check = machine_check_4xx,
1515 .platform = "ppc405",
1516 },
1517 { /* 405EX Rev. D with Security */
1518 .pvr_mask = 0xffff000f,
1519 .pvr_value = 0x12910005,
1520 .cpu_name = "405EX Rev. D",
1521 .cpu_features = CPU_FTRS_40X,
1522 .cpu_user_features = PPC_FEATURE_32 |
1523 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1524 .mmu_features = MMU_FTR_TYPE_40x,
1525 .icache_bsize = 32,
1526 .dcache_bsize = 32,
1527 .machine_check = machine_check_4xx,
1528 .platform = "ppc405",
1529 },
1530 { /* 405EXr Rev. A/B without Security */
1531 .pvr_mask = 0xffff000f,
1532 .pvr_value = 0x12910001,
1533 .cpu_name = "405EXr Rev. A/B",
1534 .cpu_features = CPU_FTRS_40X,
1535 .cpu_user_features = PPC_FEATURE_32 |
1536 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1537 .mmu_features = MMU_FTR_TYPE_40x,
1538 .icache_bsize = 32,
1539 .dcache_bsize = 32,
1540 .machine_check = machine_check_4xx,
1541 .platform = "ppc405",
1542 },
1543 { /* 405EXr Rev. C without Security */
1544 .pvr_mask = 0xffff000f,
1545 .pvr_value = 0x12910009,
1546 .cpu_name = "405EXr Rev. C",
1547 .cpu_features = CPU_FTRS_40X,
1548 .cpu_user_features = PPC_FEATURE_32 |
1549 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1550 .mmu_features = MMU_FTR_TYPE_40x,
1551 .icache_bsize = 32,
1552 .dcache_bsize = 32,
1553 .machine_check = machine_check_4xx,
1554 .platform = "ppc405",
1555 },
1556 { /* 405EXr Rev. C with Security */
1557 .pvr_mask = 0xffff000f,
1558 .pvr_value = 0x1291000b,
1559 .cpu_name = "405EXr Rev. C",
1560 .cpu_features = CPU_FTRS_40X,
1561 .cpu_user_features = PPC_FEATURE_32 |
1562 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1563 .mmu_features = MMU_FTR_TYPE_40x,
1564 .icache_bsize = 32,
1565 .dcache_bsize = 32,
1566 .machine_check = machine_check_4xx,
1567 .platform = "ppc405",
1568 },
1569 { /* 405EXr Rev. D without Security */
1570 .pvr_mask = 0xffff000f,
1571 .pvr_value = 0x12910000,
1572 .cpu_name = "405EXr Rev. D",
1573 .cpu_features = CPU_FTRS_40X,
1574 .cpu_user_features = PPC_FEATURE_32 |
1575 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1576 .mmu_features = MMU_FTR_TYPE_40x,
1577 .icache_bsize = 32,
1578 .dcache_bsize = 32,
1579 .machine_check = machine_check_4xx,
1580 .platform = "ppc405",
1581 },
1582 { /* 405EXr Rev. D with Security */
1583 .pvr_mask = 0xffff000f,
1584 .pvr_value = 0x12910002,
1585 .cpu_name = "405EXr Rev. D",
1586 .cpu_features = CPU_FTRS_40X,
1587 .cpu_user_features = PPC_FEATURE_32 |
1588 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1589 .mmu_features = MMU_FTR_TYPE_40x,
1590 .icache_bsize = 32,
1591 .dcache_bsize = 32,
1592 .machine_check = machine_check_4xx,
1593 .platform = "ppc405",
1594 },
1595 {
1596 /* 405EZ */
1597 .pvr_mask = 0xffff0000,
1598 .pvr_value = 0x41510000,
1599 .cpu_name = "405EZ",
1600 .cpu_features = CPU_FTRS_40X,
1601 .cpu_user_features = PPC_FEATURE_32 |
1602 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1603 .mmu_features = MMU_FTR_TYPE_40x,
1604 .icache_bsize = 32,
1605 .dcache_bsize = 32,
1606 .machine_check = machine_check_4xx,
1607 .platform = "ppc405",
1608 },
1609 { /* APM8018X */
1610 .pvr_mask = 0xffff0000,
1611 .pvr_value = 0x7ff11432,
1612 .cpu_name = "APM8018X",
1613 .cpu_features = CPU_FTRS_40X,
1614 .cpu_user_features = PPC_FEATURE_32 |
1615 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1616 .mmu_features = MMU_FTR_TYPE_40x,
1617 .icache_bsize = 32,
1618 .dcache_bsize = 32,
1619 .machine_check = machine_check_4xx,
1620 .platform = "ppc405",
1621 },
1622 { /* default match */
1623 .pvr_mask = 0x00000000,
1624 .pvr_value = 0x00000000,
1625 .cpu_name = "(generic 40x PPC)",
1626 .cpu_features = CPU_FTRS_40X,
1627 .cpu_user_features = PPC_FEATURE_32 |
1628 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1629 .mmu_features = MMU_FTR_TYPE_40x,
1630 .icache_bsize = 32,
1631 .dcache_bsize = 32,
1632 .machine_check = machine_check_4xx,
1633 .platform = "ppc405",
1634 }
1635
1636 #endif /* CONFIG_40x */
1637 #ifdef CONFIG_44x
1638 {
1639 .pvr_mask = 0xf0000fff,
1640 .pvr_value = 0x40000850,
1641 .cpu_name = "440GR Rev. A",
1642 .cpu_features = CPU_FTRS_44X,
1643 .cpu_user_features = COMMON_USER_BOOKE,
1644 .mmu_features = MMU_FTR_TYPE_44x,
1645 .icache_bsize = 32,
1646 .dcache_bsize = 32,
1647 .machine_check = machine_check_4xx,
1648 .platform = "ppc440",
1649 },
1650 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1651 .pvr_mask = 0xf0000fff,
1652 .pvr_value = 0x40000858,
1653 .cpu_name = "440EP Rev. A",
1654 .cpu_features = CPU_FTRS_44X,
1655 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1656 .mmu_features = MMU_FTR_TYPE_44x,
1657 .icache_bsize = 32,
1658 .dcache_bsize = 32,
1659 .cpu_setup = __setup_cpu_440ep,
1660 .machine_check = machine_check_4xx,
1661 .platform = "ppc440",
1662 },
1663 {
1664 .pvr_mask = 0xf0000fff,
1665 .pvr_value = 0x400008d3,
1666 .cpu_name = "440GR Rev. B",
1667 .cpu_features = CPU_FTRS_44X,
1668 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1669 .mmu_features = MMU_FTR_TYPE_44x,
1670 .icache_bsize = 32,
1671 .dcache_bsize = 32,
1672 .machine_check = machine_check_4xx,
1673 .platform = "ppc440",
1674 },
1675 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1676 .pvr_mask = 0xf0000ff7,
1677 .pvr_value = 0x400008d4,
1678 .cpu_name = "440EP Rev. C",
1679 .cpu_features = CPU_FTRS_44X,
1680 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1681 .mmu_features = MMU_FTR_TYPE_44x,
1682 .icache_bsize = 32,
1683 .dcache_bsize = 32,
1684 .cpu_setup = __setup_cpu_440ep,
1685 .machine_check = machine_check_4xx,
1686 .platform = "ppc440",
1687 },
1688 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1689 .pvr_mask = 0xf0000fff,
1690 .pvr_value = 0x400008db,
1691 .cpu_name = "440EP Rev. B",
1692 .cpu_features = CPU_FTRS_44X,
1693 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1694 .mmu_features = MMU_FTR_TYPE_44x,
1695 .icache_bsize = 32,
1696 .dcache_bsize = 32,
1697 .cpu_setup = __setup_cpu_440ep,
1698 .machine_check = machine_check_4xx,
1699 .platform = "ppc440",
1700 },
1701 { /* 440GRX */
1702 .pvr_mask = 0xf0000ffb,
1703 .pvr_value = 0x200008D0,
1704 .cpu_name = "440GRX",
1705 .cpu_features = CPU_FTRS_44X,
1706 .cpu_user_features = COMMON_USER_BOOKE,
1707 .mmu_features = MMU_FTR_TYPE_44x,
1708 .icache_bsize = 32,
1709 .dcache_bsize = 32,
1710 .cpu_setup = __setup_cpu_440grx,
1711 .machine_check = machine_check_440A,
1712 .platform = "ppc440",
1713 },
1714 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1715 .pvr_mask = 0xf0000ffb,
1716 .pvr_value = 0x200008D8,
1717 .cpu_name = "440EPX",
1718 .cpu_features = CPU_FTRS_44X,
1719 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1720 .mmu_features = MMU_FTR_TYPE_44x,
1721 .icache_bsize = 32,
1722 .dcache_bsize = 32,
1723 .cpu_setup = __setup_cpu_440epx,
1724 .machine_check = machine_check_440A,
1725 .platform = "ppc440",
1726 },
1727 { /* 440GP Rev. B */
1728 .pvr_mask = 0xf0000fff,
1729 .pvr_value = 0x40000440,
1730 .cpu_name = "440GP Rev. B",
1731 .cpu_features = CPU_FTRS_44X,
1732 .cpu_user_features = COMMON_USER_BOOKE,
1733 .mmu_features = MMU_FTR_TYPE_44x,
1734 .icache_bsize = 32,
1735 .dcache_bsize = 32,
1736 .machine_check = machine_check_4xx,
1737 .platform = "ppc440gp",
1738 },
1739 { /* 440GP Rev. C */
1740 .pvr_mask = 0xf0000fff,
1741 .pvr_value = 0x40000481,
1742 .cpu_name = "440GP Rev. C",
1743 .cpu_features = CPU_FTRS_44X,
1744 .cpu_user_features = COMMON_USER_BOOKE,
1745 .mmu_features = MMU_FTR_TYPE_44x,
1746 .icache_bsize = 32,
1747 .dcache_bsize = 32,
1748 .machine_check = machine_check_4xx,
1749 .platform = "ppc440gp",
1750 },
1751 { /* 440GX Rev. A */
1752 .pvr_mask = 0xf0000fff,
1753 .pvr_value = 0x50000850,
1754 .cpu_name = "440GX Rev. A",
1755 .cpu_features = CPU_FTRS_44X,
1756 .cpu_user_features = COMMON_USER_BOOKE,
1757 .mmu_features = MMU_FTR_TYPE_44x,
1758 .icache_bsize = 32,
1759 .dcache_bsize = 32,
1760 .cpu_setup = __setup_cpu_440gx,
1761 .machine_check = machine_check_440A,
1762 .platform = "ppc440",
1763 },
1764 { /* 440GX Rev. B */
1765 .pvr_mask = 0xf0000fff,
1766 .pvr_value = 0x50000851,
1767 .cpu_name = "440GX Rev. B",
1768 .cpu_features = CPU_FTRS_44X,
1769 .cpu_user_features = COMMON_USER_BOOKE,
1770 .mmu_features = MMU_FTR_TYPE_44x,
1771 .icache_bsize = 32,
1772 .dcache_bsize = 32,
1773 .cpu_setup = __setup_cpu_440gx,
1774 .machine_check = machine_check_440A,
1775 .platform = "ppc440",
1776 },
1777 { /* 440GX Rev. C */
1778 .pvr_mask = 0xf0000fff,
1779 .pvr_value = 0x50000892,
1780 .cpu_name = "440GX Rev. C",
1781 .cpu_features = CPU_FTRS_44X,
1782 .cpu_user_features = COMMON_USER_BOOKE,
1783 .mmu_features = MMU_FTR_TYPE_44x,
1784 .icache_bsize = 32,
1785 .dcache_bsize = 32,
1786 .cpu_setup = __setup_cpu_440gx,
1787 .machine_check = machine_check_440A,
1788 .platform = "ppc440",
1789 },
1790 { /* 440GX Rev. F */
1791 .pvr_mask = 0xf0000fff,
1792 .pvr_value = 0x50000894,
1793 .cpu_name = "440GX Rev. F",
1794 .cpu_features = CPU_FTRS_44X,
1795 .cpu_user_features = COMMON_USER_BOOKE,
1796 .mmu_features = MMU_FTR_TYPE_44x,
1797 .icache_bsize = 32,
1798 .dcache_bsize = 32,
1799 .cpu_setup = __setup_cpu_440gx,
1800 .machine_check = machine_check_440A,
1801 .platform = "ppc440",
1802 },
1803 { /* 440SP Rev. A */
1804 .pvr_mask = 0xfff00fff,
1805 .pvr_value = 0x53200891,
1806 .cpu_name = "440SP Rev. A",
1807 .cpu_features = CPU_FTRS_44X,
1808 .cpu_user_features = COMMON_USER_BOOKE,
1809 .mmu_features = MMU_FTR_TYPE_44x,
1810 .icache_bsize = 32,
1811 .dcache_bsize = 32,
1812 .machine_check = machine_check_4xx,
1813 .platform = "ppc440",
1814 },
1815 { /* 440SPe Rev. A */
1816 .pvr_mask = 0xfff00fff,
1817 .pvr_value = 0x53400890,
1818 .cpu_name = "440SPe Rev. A",
1819 .cpu_features = CPU_FTRS_44X,
1820 .cpu_user_features = COMMON_USER_BOOKE,
1821 .mmu_features = MMU_FTR_TYPE_44x,
1822 .icache_bsize = 32,
1823 .dcache_bsize = 32,
1824 .cpu_setup = __setup_cpu_440spe,
1825 .machine_check = machine_check_440A,
1826 .platform = "ppc440",
1827 },
1828 { /* 440SPe Rev. B */
1829 .pvr_mask = 0xfff00fff,
1830 .pvr_value = 0x53400891,
1831 .cpu_name = "440SPe Rev. B",
1832 .cpu_features = CPU_FTRS_44X,
1833 .cpu_user_features = COMMON_USER_BOOKE,
1834 .mmu_features = MMU_FTR_TYPE_44x,
1835 .icache_bsize = 32,
1836 .dcache_bsize = 32,
1837 .cpu_setup = __setup_cpu_440spe,
1838 .machine_check = machine_check_440A,
1839 .platform = "ppc440",
1840 },
1841 { /* 440 in Xilinx Virtex-5 FXT */
1842 .pvr_mask = 0xfffffff0,
1843 .pvr_value = 0x7ff21910,
1844 .cpu_name = "440 in Virtex-5 FXT",
1845 .cpu_features = CPU_FTRS_44X,
1846 .cpu_user_features = COMMON_USER_BOOKE,
1847 .mmu_features = MMU_FTR_TYPE_44x,
1848 .icache_bsize = 32,
1849 .dcache_bsize = 32,
1850 .cpu_setup = __setup_cpu_440x5,
1851 .machine_check = machine_check_440A,
1852 .platform = "ppc440",
1853 },
1854 { /* 460EX */
1855 .pvr_mask = 0xffff0006,
1856 .pvr_value = 0x13020002,
1857 .cpu_name = "460EX",
1858 .cpu_features = CPU_FTRS_440x6,
1859 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1860 .mmu_features = MMU_FTR_TYPE_44x,
1861 .icache_bsize = 32,
1862 .dcache_bsize = 32,
1863 .cpu_setup = __setup_cpu_460ex,
1864 .machine_check = machine_check_440A,
1865 .platform = "ppc440",
1866 },
1867 { /* 460EX Rev B */
1868 .pvr_mask = 0xffff0007,
1869 .pvr_value = 0x13020004,
1870 .cpu_name = "460EX Rev. B",
1871 .cpu_features = CPU_FTRS_440x6,
1872 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1873 .mmu_features = MMU_FTR_TYPE_44x,
1874 .icache_bsize = 32,
1875 .dcache_bsize = 32,
1876 .cpu_setup = __setup_cpu_460ex,
1877 .machine_check = machine_check_440A,
1878 .platform = "ppc440",
1879 },
1880 { /* 460GT */
1881 .pvr_mask = 0xffff0006,
1882 .pvr_value = 0x13020000,
1883 .cpu_name = "460GT",
1884 .cpu_features = CPU_FTRS_440x6,
1885 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1886 .mmu_features = MMU_FTR_TYPE_44x,
1887 .icache_bsize = 32,
1888 .dcache_bsize = 32,
1889 .cpu_setup = __setup_cpu_460gt,
1890 .machine_check = machine_check_440A,
1891 .platform = "ppc440",
1892 },
1893 { /* 460GT Rev B */
1894 .pvr_mask = 0xffff0007,
1895 .pvr_value = 0x13020005,
1896 .cpu_name = "460GT Rev. B",
1897 .cpu_features = CPU_FTRS_440x6,
1898 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1899 .mmu_features = MMU_FTR_TYPE_44x,
1900 .icache_bsize = 32,
1901 .dcache_bsize = 32,
1902 .cpu_setup = __setup_cpu_460gt,
1903 .machine_check = machine_check_440A,
1904 .platform = "ppc440",
1905 },
1906 { /* 460SX */
1907 .pvr_mask = 0xffffff00,
1908 .pvr_value = 0x13541800,
1909 .cpu_name = "460SX",
1910 .cpu_features = CPU_FTRS_44X,
1911 .cpu_user_features = COMMON_USER_BOOKE,
1912 .mmu_features = MMU_FTR_TYPE_44x,
1913 .icache_bsize = 32,
1914 .dcache_bsize = 32,
1915 .cpu_setup = __setup_cpu_460sx,
1916 .machine_check = machine_check_440A,
1917 .platform = "ppc440",
1918 },
1919 { /* 464 in APM821xx */
1920 .pvr_mask = 0xfffffff0,
1921 .pvr_value = 0x12C41C80,
1922 .cpu_name = "APM821XX",
1923 .cpu_features = CPU_FTRS_44X,
1924 .cpu_user_features = COMMON_USER_BOOKE |
1925 PPC_FEATURE_HAS_FPU,
1926 .mmu_features = MMU_FTR_TYPE_44x,
1927 .icache_bsize = 32,
1928 .dcache_bsize = 32,
1929 .cpu_setup = __setup_cpu_apm821xx,
1930 .machine_check = machine_check_440A,
1931 .platform = "ppc440",
1932 },
1933 { /* 476 DD2 core */
1934 .pvr_mask = 0xffffffff,
1935 .pvr_value = 0x11a52080,
1936 .cpu_name = "476",
1937 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1938 .cpu_user_features = COMMON_USER_BOOKE |
1939 PPC_FEATURE_HAS_FPU,
1940 .mmu_features = MMU_FTR_TYPE_47x |
1941 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1942 .icache_bsize = 32,
1943 .dcache_bsize = 128,
1944 .machine_check = machine_check_47x,
1945 .platform = "ppc470",
1946 },
1947 { /* 476fpe */
1948 .pvr_mask = 0xffff0000,
1949 .pvr_value = 0x7ff50000,
1950 .cpu_name = "476fpe",
1951 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1952 .cpu_user_features = COMMON_USER_BOOKE |
1953 PPC_FEATURE_HAS_FPU,
1954 .mmu_features = MMU_FTR_TYPE_47x |
1955 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1956 .icache_bsize = 32,
1957 .dcache_bsize = 128,
1958 .machine_check = machine_check_47x,
1959 .platform = "ppc470",
1960 },
1961 { /* 476 iss */
1962 .pvr_mask = 0xffff0000,
1963 .pvr_value = 0x00050000,
1964 .cpu_name = "476",
1965 .cpu_features = CPU_FTRS_47X,
1966 .cpu_user_features = COMMON_USER_BOOKE |
1967 PPC_FEATURE_HAS_FPU,
1968 .mmu_features = MMU_FTR_TYPE_47x |
1969 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1970 .icache_bsize = 32,
1971 .dcache_bsize = 128,
1972 .machine_check = machine_check_47x,
1973 .platform = "ppc470",
1974 },
1975 { /* 476 others */
1976 .pvr_mask = 0xffff0000,
1977 .pvr_value = 0x11a50000,
1978 .cpu_name = "476",
1979 .cpu_features = CPU_FTRS_47X,
1980 .cpu_user_features = COMMON_USER_BOOKE |
1981 PPC_FEATURE_HAS_FPU,
1982 .mmu_features = MMU_FTR_TYPE_47x |
1983 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1984 .icache_bsize = 32,
1985 .dcache_bsize = 128,
1986 .machine_check = machine_check_47x,
1987 .platform = "ppc470",
1988 },
1989 { /* default match */
1990 .pvr_mask = 0x00000000,
1991 .pvr_value = 0x00000000,
1992 .cpu_name = "(generic 44x PPC)",
1993 .cpu_features = CPU_FTRS_44X,
1994 .cpu_user_features = COMMON_USER_BOOKE,
1995 .mmu_features = MMU_FTR_TYPE_44x,
1996 .icache_bsize = 32,
1997 .dcache_bsize = 32,
1998 .machine_check = machine_check_4xx,
1999 .platform = "ppc440",
2000 }
2001 #endif /* CONFIG_44x */
2002 #ifdef CONFIG_E200
2003 { /* e200z5 */
2004 .pvr_mask = 0xfff00000,
2005 .pvr_value = 0x81000000,
2006 .cpu_name = "e200z5",
2007 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2008 .cpu_features = CPU_FTRS_E200,
2009 .cpu_user_features = COMMON_USER_BOOKE |
2010 PPC_FEATURE_HAS_EFP_SINGLE |
2011 PPC_FEATURE_UNIFIED_CACHE,
2012 .mmu_features = MMU_FTR_TYPE_FSL_E,
2013 .dcache_bsize = 32,
2014 .machine_check = machine_check_e200,
2015 .platform = "ppc5554",
2016 },
2017 { /* e200z6 */
2018 .pvr_mask = 0xfff00000,
2019 .pvr_value = 0x81100000,
2020 .cpu_name = "e200z6",
2021 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2022 .cpu_features = CPU_FTRS_E200,
2023 .cpu_user_features = COMMON_USER_BOOKE |
2024 PPC_FEATURE_HAS_SPE_COMP |
2025 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2026 PPC_FEATURE_UNIFIED_CACHE,
2027 .mmu_features = MMU_FTR_TYPE_FSL_E,
2028 .dcache_bsize = 32,
2029 .machine_check = machine_check_e200,
2030 .platform = "ppc5554",
2031 },
2032 { /* default match */
2033 .pvr_mask = 0x00000000,
2034 .pvr_value = 0x00000000,
2035 .cpu_name = "(generic E200 PPC)",
2036 .cpu_features = CPU_FTRS_E200,
2037 .cpu_user_features = COMMON_USER_BOOKE |
2038 PPC_FEATURE_HAS_EFP_SINGLE |
2039 PPC_FEATURE_UNIFIED_CACHE,
2040 .mmu_features = MMU_FTR_TYPE_FSL_E,
2041 .dcache_bsize = 32,
2042 .cpu_setup = __setup_cpu_e200,
2043 .machine_check = machine_check_e200,
2044 .platform = "ppc5554",
2045 }
2046 #endif /* CONFIG_E200 */
2047 #endif /* CONFIG_PPC32 */
2048 #ifdef CONFIG_E500
2049 #ifdef CONFIG_PPC32
2050 #ifndef CONFIG_PPC_E500MC
2051 { /* e500 */
2052 .pvr_mask = 0xffff0000,
2053 .pvr_value = 0x80200000,
2054 .cpu_name = "e500",
2055 .cpu_features = CPU_FTRS_E500,
2056 .cpu_user_features = COMMON_USER_BOOKE |
2057 PPC_FEATURE_HAS_SPE_COMP |
2058 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2059 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2060 .mmu_features = MMU_FTR_TYPE_FSL_E,
2061 .icache_bsize = 32,
2062 .dcache_bsize = 32,
2063 .num_pmcs = 4,
2064 .oprofile_cpu_type = "ppc/e500",
2065 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2066 .cpu_setup = __setup_cpu_e500v1,
2067 .machine_check = machine_check_e500,
2068 .platform = "ppc8540",
2069 },
2070 { /* e500v2 */
2071 .pvr_mask = 0xffff0000,
2072 .pvr_value = 0x80210000,
2073 .cpu_name = "e500v2",
2074 .cpu_features = CPU_FTRS_E500_2,
2075 .cpu_user_features = COMMON_USER_BOOKE |
2076 PPC_FEATURE_HAS_SPE_COMP |
2077 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2078 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2079 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2080 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2081 .icache_bsize = 32,
2082 .dcache_bsize = 32,
2083 .num_pmcs = 4,
2084 .oprofile_cpu_type = "ppc/e500",
2085 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2086 .cpu_setup = __setup_cpu_e500v2,
2087 .machine_check = machine_check_e500,
2088 .platform = "ppc8548",
2089 .cpu_down_flush = cpu_down_flush_e500v2,
2090 },
2091 #else
2092 { /* e500mc */
2093 .pvr_mask = 0xffff0000,
2094 .pvr_value = 0x80230000,
2095 .cpu_name = "e500mc",
2096 .cpu_features = CPU_FTRS_E500MC,
2097 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2098 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2099 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2100 MMU_FTR_USE_TLBILX,
2101 .icache_bsize = 64,
2102 .dcache_bsize = 64,
2103 .num_pmcs = 4,
2104 .oprofile_cpu_type = "ppc/e500mc",
2105 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2106 .cpu_setup = __setup_cpu_e500mc,
2107 .machine_check = machine_check_e500mc,
2108 .platform = "ppce500mc",
2109 .cpu_down_flush = cpu_down_flush_e500mc,
2110 },
2111 #endif /* CONFIG_PPC_E500MC */
2112 #endif /* CONFIG_PPC32 */
2113 #ifdef CONFIG_PPC_E500MC
2114 { /* e5500 */
2115 .pvr_mask = 0xffff0000,
2116 .pvr_value = 0x80240000,
2117 .cpu_name = "e5500",
2118 .cpu_features = CPU_FTRS_E5500,
2119 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2120 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2121 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2122 MMU_FTR_USE_TLBILX,
2123 .icache_bsize = 64,
2124 .dcache_bsize = 64,
2125 .num_pmcs = 4,
2126 .oprofile_cpu_type = "ppc/e500mc",
2127 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2128 .cpu_setup = __setup_cpu_e5500,
2129 #ifndef CONFIG_PPC32
2130 .cpu_restore = __restore_cpu_e5500,
2131 #endif
2132 .machine_check = machine_check_e500mc,
2133 .platform = "ppce5500",
2134 .cpu_down_flush = cpu_down_flush_e5500,
2135 },
2136 { /* e6500 */
2137 .pvr_mask = 0xffff0000,
2138 .pvr_value = 0x80400000,
2139 .cpu_name = "e6500",
2140 .cpu_features = CPU_FTRS_E6500,
2141 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2142 PPC_FEATURE_HAS_ALTIVEC_COMP,
2143 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2144 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2145 MMU_FTR_USE_TLBILX,
2146 .icache_bsize = 64,
2147 .dcache_bsize = 64,
2148 .num_pmcs = 6,
2149 .oprofile_cpu_type = "ppc/e6500",
2150 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2151 .cpu_setup = __setup_cpu_e6500,
2152 #ifndef CONFIG_PPC32
2153 .cpu_restore = __restore_cpu_e6500,
2154 #endif
2155 .machine_check = machine_check_e500mc,
2156 .platform = "ppce6500",
2157 .cpu_down_flush = cpu_down_flush_e6500,
2158 },
2159 #endif /* CONFIG_PPC_E500MC */
2160 #ifdef CONFIG_PPC32
2161 { /* default match */
2162 .pvr_mask = 0x00000000,
2163 .pvr_value = 0x00000000,
2164 .cpu_name = "(generic E500 PPC)",
2165 .cpu_features = CPU_FTRS_E500,
2166 .cpu_user_features = COMMON_USER_BOOKE |
2167 PPC_FEATURE_HAS_SPE_COMP |
2168 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2169 .mmu_features = MMU_FTR_TYPE_FSL_E,
2170 .icache_bsize = 32,
2171 .dcache_bsize = 32,
2172 .machine_check = machine_check_e500,
2173 .platform = "powerpc",
2174 }
2175 #endif /* CONFIG_PPC32 */
2176 #endif /* CONFIG_E500 */
2177 };
2178
2179 static struct cpu_spec the_cpu_spec;
2180
2181 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2182 struct cpu_spec *s)
2183 {
2184 struct cpu_spec *t = &the_cpu_spec;
2185 struct cpu_spec old;
2186
2187 t = PTRRELOC(t);
2188 old = *t;
2189
2190 /* Copy everything, then do fixups */
2191 *t = *s;
2192
2193 /*
2194 * If we are overriding a previous value derived from the real
2195 * PVR with a new value obtained using a logical PVR value,
2196 * don't modify the performance monitor fields.
2197 */
2198 if (old.num_pmcs && !s->num_pmcs) {
2199 t->num_pmcs = old.num_pmcs;
2200 t->pmc_type = old.pmc_type;
2201 t->oprofile_type = old.oprofile_type;
2202 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2203 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2204 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2205
2206 /*
2207 * If we have passed through this logic once before and
2208 * have pulled the default case because the real PVR was
2209 * not found inside cpu_specs[], then we are possibly
2210 * running in compatibility mode. In that case, let the
2211 * oprofiler know which set of compatibility counters to
2212 * pull from by making sure the oprofile_cpu_type string
2213 * is set to that of compatibility mode. If the
2214 * oprofile_cpu_type already has a value, then we are
2215 * possibly overriding a real PVR with a logical one,
2216 * and, in that case, keep the current value for
2217 * oprofile_cpu_type.
2218 */
2219 if (old.oprofile_cpu_type != NULL) {
2220 t->oprofile_cpu_type = old.oprofile_cpu_type;
2221 t->oprofile_type = old.oprofile_type;
2222 }
2223 }
2224
2225 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2226
2227 /*
2228 * Set the base platform string once; assumes
2229 * we're called with real pvr first.
2230 */
2231 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2232 *PTRRELOC(&powerpc_base_platform) = t->platform;
2233
2234 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2235 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2236 * that processor. I will consolidate that at a later time, for now,
2237 * just use #ifdef. We also don't need to PTRRELOC the function
2238 * pointer on ppc64 and booke as we are running at 0 in real mode
2239 * on ppc64 and reloc_offset is always 0 on booke.
2240 */
2241 if (t->cpu_setup) {
2242 t->cpu_setup(offset, t);
2243 }
2244 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2245
2246 return t;
2247 }
2248
2249 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2250 {
2251 struct cpu_spec *s = cpu_specs;
2252 int i;
2253
2254 s = PTRRELOC(s);
2255
2256 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2257 if ((pvr & s->pvr_mask) == s->pvr_value)
2258 return setup_cpu_spec(offset, s);
2259 }
2260
2261 BUG();
2262
2263 return NULL;
2264 }
2265
2266 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
2267 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
2268 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2269 };
2270 EXPORT_SYMBOL_GPL(cpu_feature_keys);
2271
2272 void __init cpu_feature_keys_init(void)
2273 {
2274 int i;
2275
2276 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
2277 unsigned long f = 1ul << i;
2278
2279 if (!(cur_cpu_spec->cpu_features & f))
2280 static_branch_disable(&cpu_feature_keys[i]);
2281 }
2282 }
2283
2284 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
2285 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2286 };
2287 EXPORT_SYMBOL_GPL(mmu_feature_keys);
2288
2289 void __init mmu_feature_keys_init(void)
2290 {
2291 int i;
2292
2293 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
2294 unsigned long f = 1ul << i;
2295
2296 if (!(cur_cpu_spec->mmu_features & f))
2297 static_branch_disable(&mmu_feature_keys[i]);
2298 }
2299 }
2300 #endif
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