2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18 #include <linux/jump_label.h>
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
22 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
24 #include <asm/setup.h>
26 struct cpu_spec
* cur_cpu_spec
= NULL
;
27 EXPORT_SYMBOL(cur_cpu_spec
);
29 /* The platform string corresponding to the real PVR */
30 const char *powerpc_base_platform
;
33 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
34 * the responsibility of the appropriate CPU save/restore functions to
35 * eventually copy these settings over. Those save/restore aren't yet
36 * part of the cputable though. That has to be fixed for both ppc32
40 extern void __setup_cpu_e200(unsigned long offset
, struct cpu_spec
* spec
);
41 extern void __setup_cpu_e500v1(unsigned long offset
, struct cpu_spec
* spec
);
42 extern void __setup_cpu_e500v2(unsigned long offset
, struct cpu_spec
* spec
);
43 extern void __setup_cpu_e500mc(unsigned long offset
, struct cpu_spec
* spec
);
44 extern void __setup_cpu_440ep(unsigned long offset
, struct cpu_spec
* spec
);
45 extern void __setup_cpu_440epx(unsigned long offset
, struct cpu_spec
* spec
);
46 extern void __setup_cpu_440gx(unsigned long offset
, struct cpu_spec
* spec
);
47 extern void __setup_cpu_440grx(unsigned long offset
, struct cpu_spec
* spec
);
48 extern void __setup_cpu_440spe(unsigned long offset
, struct cpu_spec
* spec
);
49 extern void __setup_cpu_440x5(unsigned long offset
, struct cpu_spec
* spec
);
50 extern void __setup_cpu_460ex(unsigned long offset
, struct cpu_spec
* spec
);
51 extern void __setup_cpu_460gt(unsigned long offset
, struct cpu_spec
* spec
);
52 extern void __setup_cpu_460sx(unsigned long offset
, struct cpu_spec
*spec
);
53 extern void __setup_cpu_apm821xx(unsigned long offset
, struct cpu_spec
*spec
);
54 extern void __setup_cpu_603(unsigned long offset
, struct cpu_spec
* spec
);
55 extern void __setup_cpu_604(unsigned long offset
, struct cpu_spec
* spec
);
56 extern void __setup_cpu_750(unsigned long offset
, struct cpu_spec
* spec
);
57 extern void __setup_cpu_750cx(unsigned long offset
, struct cpu_spec
* spec
);
58 extern void __setup_cpu_750fx(unsigned long offset
, struct cpu_spec
* spec
);
59 extern void __setup_cpu_7400(unsigned long offset
, struct cpu_spec
* spec
);
60 extern void __setup_cpu_7410(unsigned long offset
, struct cpu_spec
* spec
);
61 extern void __setup_cpu_745x(unsigned long offset
, struct cpu_spec
* spec
);
62 #endif /* CONFIG_PPC32 */
64 extern void __setup_cpu_ppc970(unsigned long offset
, struct cpu_spec
* spec
);
65 extern void __setup_cpu_ppc970MP(unsigned long offset
, struct cpu_spec
* spec
);
66 extern void __setup_cpu_pa6t(unsigned long offset
, struct cpu_spec
* spec
);
67 extern void __restore_cpu_pa6t(void);
68 extern void __restore_cpu_ppc970(void);
69 extern void __setup_cpu_power7(unsigned long offset
, struct cpu_spec
* spec
);
70 extern void __restore_cpu_power7(void);
71 extern void __setup_cpu_power8(unsigned long offset
, struct cpu_spec
* spec
);
72 extern void __restore_cpu_power8(void);
73 extern void __setup_cpu_power9(unsigned long offset
, struct cpu_spec
* spec
);
74 extern void __restore_cpu_power9(void);
75 extern void __flush_tlb_power7(unsigned int action
);
76 extern void __flush_tlb_power8(unsigned int action
);
77 extern void __flush_tlb_power9(unsigned int action
);
78 extern long __machine_check_early_realmode_p7(struct pt_regs
*regs
);
79 extern long __machine_check_early_realmode_p8(struct pt_regs
*regs
);
80 extern long __machine_check_early_realmode_p9(struct pt_regs
*regs
);
81 #endif /* CONFIG_PPC64 */
82 #if defined(CONFIG_E500)
83 extern void __setup_cpu_e5500(unsigned long offset
, struct cpu_spec
* spec
);
84 extern void __setup_cpu_e6500(unsigned long offset
, struct cpu_spec
* spec
);
85 extern void __restore_cpu_e5500(void);
86 extern void __restore_cpu_e6500(void);
87 #endif /* CONFIG_E500 */
89 /* This table only contains "desktop" CPUs, it need to be filled with embedded
92 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
94 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
95 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
96 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
97 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
98 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
99 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
100 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
101 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
102 PPC_FEATURE_TRUE_LE | \
103 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
104 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
105 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
106 PPC_FEATURE_TRUE_LE | \
107 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
108 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
109 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
110 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
111 PPC_FEATURE_TRUE_LE | \
112 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
113 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
114 PPC_FEATURE2_HTM_COMP | \
115 PPC_FEATURE2_HTM_NOSC_COMP | \
116 PPC_FEATURE2_DSCR | \
117 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
118 PPC_FEATURE2_VEC_CRYPTO)
119 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
120 PPC_FEATURE_TRUE_LE | \
121 PPC_FEATURE_HAS_ALTIVEC_COMP)
122 #define COMMON_USER_POWER9 COMMON_USER_POWER8
123 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
124 PPC_FEATURE2_ARCH_3_00 | \
125 PPC_FEATURE2_HAS_IEEE128)
127 #ifdef CONFIG_PPC_BOOK3E_64
128 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
130 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
134 static struct cpu_spec __initdata cpu_specs
[] = {
135 #ifdef CONFIG_PPC_BOOK3S_64
137 .pvr_mask
= 0xffff0000,
138 .pvr_value
= 0x00350000,
139 .cpu_name
= "POWER4 (gp)",
140 .cpu_features
= CPU_FTRS_POWER4
,
141 .cpu_user_features
= COMMON_USER_POWER4
,
142 .mmu_features
= MMU_FTRS_POWER4
| MMU_FTR_TLBIE_CROP_VA
,
146 .pmc_type
= PPC_PMC_IBM
,
147 .oprofile_cpu_type
= "ppc64/power4",
148 .oprofile_type
= PPC_OPROFILE_POWER4
,
149 .platform
= "power4",
152 .pvr_mask
= 0xffff0000,
153 .pvr_value
= 0x00380000,
154 .cpu_name
= "POWER4+ (gq)",
155 .cpu_features
= CPU_FTRS_POWER4
,
156 .cpu_user_features
= COMMON_USER_POWER4
,
157 .mmu_features
= MMU_FTRS_POWER4
| MMU_FTR_TLBIE_CROP_VA
,
161 .pmc_type
= PPC_PMC_IBM
,
162 .oprofile_cpu_type
= "ppc64/power4",
163 .oprofile_type
= PPC_OPROFILE_POWER4
,
164 .platform
= "power4",
167 .pvr_mask
= 0xffff0000,
168 .pvr_value
= 0x00390000,
169 .cpu_name
= "PPC970",
170 .cpu_features
= CPU_FTRS_PPC970
,
171 .cpu_user_features
= COMMON_USER_POWER4
|
172 PPC_FEATURE_HAS_ALTIVEC_COMP
,
173 .mmu_features
= MMU_FTRS_PPC970
,
177 .pmc_type
= PPC_PMC_IBM
,
178 .cpu_setup
= __setup_cpu_ppc970
,
179 .cpu_restore
= __restore_cpu_ppc970
,
180 .oprofile_cpu_type
= "ppc64/970",
181 .oprofile_type
= PPC_OPROFILE_POWER4
,
182 .platform
= "ppc970",
185 .pvr_mask
= 0xffff0000,
186 .pvr_value
= 0x003c0000,
187 .cpu_name
= "PPC970FX",
188 .cpu_features
= CPU_FTRS_PPC970
,
189 .cpu_user_features
= COMMON_USER_POWER4
|
190 PPC_FEATURE_HAS_ALTIVEC_COMP
,
191 .mmu_features
= MMU_FTRS_PPC970
,
195 .pmc_type
= PPC_PMC_IBM
,
196 .cpu_setup
= __setup_cpu_ppc970
,
197 .cpu_restore
= __restore_cpu_ppc970
,
198 .oprofile_cpu_type
= "ppc64/970",
199 .oprofile_type
= PPC_OPROFILE_POWER4
,
200 .platform
= "ppc970",
202 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
203 .pvr_mask
= 0xffffffff,
204 .pvr_value
= 0x00440100,
205 .cpu_name
= "PPC970MP",
206 .cpu_features
= CPU_FTRS_PPC970
,
207 .cpu_user_features
= COMMON_USER_POWER4
|
208 PPC_FEATURE_HAS_ALTIVEC_COMP
,
209 .mmu_features
= MMU_FTRS_PPC970
,
213 .pmc_type
= PPC_PMC_IBM
,
214 .cpu_setup
= __setup_cpu_ppc970
,
215 .cpu_restore
= __restore_cpu_ppc970
,
216 .oprofile_cpu_type
= "ppc64/970MP",
217 .oprofile_type
= PPC_OPROFILE_POWER4
,
218 .platform
= "ppc970",
221 .pvr_mask
= 0xffff0000,
222 .pvr_value
= 0x00440000,
223 .cpu_name
= "PPC970MP",
224 .cpu_features
= CPU_FTRS_PPC970
,
225 .cpu_user_features
= COMMON_USER_POWER4
|
226 PPC_FEATURE_HAS_ALTIVEC_COMP
,
227 .mmu_features
= MMU_FTRS_PPC970
,
231 .pmc_type
= PPC_PMC_IBM
,
232 .cpu_setup
= __setup_cpu_ppc970MP
,
233 .cpu_restore
= __restore_cpu_ppc970
,
234 .oprofile_cpu_type
= "ppc64/970MP",
235 .oprofile_type
= PPC_OPROFILE_POWER4
,
236 .platform
= "ppc970",
239 .pvr_mask
= 0xffff0000,
240 .pvr_value
= 0x00450000,
241 .cpu_name
= "PPC970GX",
242 .cpu_features
= CPU_FTRS_PPC970
,
243 .cpu_user_features
= COMMON_USER_POWER4
|
244 PPC_FEATURE_HAS_ALTIVEC_COMP
,
245 .mmu_features
= MMU_FTRS_PPC970
,
249 .pmc_type
= PPC_PMC_IBM
,
250 .cpu_setup
= __setup_cpu_ppc970
,
251 .oprofile_cpu_type
= "ppc64/970",
252 .oprofile_type
= PPC_OPROFILE_POWER4
,
253 .platform
= "ppc970",
256 .pvr_mask
= 0xffff0000,
257 .pvr_value
= 0x003a0000,
258 .cpu_name
= "POWER5 (gr)",
259 .cpu_features
= CPU_FTRS_POWER5
,
260 .cpu_user_features
= COMMON_USER_POWER5
,
261 .mmu_features
= MMU_FTRS_POWER5
,
265 .pmc_type
= PPC_PMC_IBM
,
266 .oprofile_cpu_type
= "ppc64/power5",
267 .oprofile_type
= PPC_OPROFILE_POWER4
,
268 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
269 * and above but only works on POWER5 and above
271 .oprofile_mmcra_sihv
= MMCRA_SIHV
,
272 .oprofile_mmcra_sipr
= MMCRA_SIPR
,
273 .platform
= "power5",
276 .pvr_mask
= 0xffffff00,
277 .pvr_value
= 0x003b0300,
278 .cpu_name
= "POWER5+ (gs)",
279 .cpu_features
= CPU_FTRS_POWER5
,
280 .cpu_user_features
= COMMON_USER_POWER5_PLUS
,
281 .mmu_features
= MMU_FTRS_POWER5
,
285 .oprofile_cpu_type
= "ppc64/power5++",
286 .oprofile_type
= PPC_OPROFILE_POWER4
,
287 .oprofile_mmcra_sihv
= MMCRA_SIHV
,
288 .oprofile_mmcra_sipr
= MMCRA_SIPR
,
289 .platform
= "power5+",
292 .pvr_mask
= 0xffff0000,
293 .pvr_value
= 0x003b0000,
294 .cpu_name
= "POWER5+ (gs)",
295 .cpu_features
= CPU_FTRS_POWER5
,
296 .cpu_user_features
= COMMON_USER_POWER5_PLUS
,
297 .mmu_features
= MMU_FTRS_POWER5
,
301 .pmc_type
= PPC_PMC_IBM
,
302 .oprofile_cpu_type
= "ppc64/power5+",
303 .oprofile_type
= PPC_OPROFILE_POWER4
,
304 .oprofile_mmcra_sihv
= MMCRA_SIHV
,
305 .oprofile_mmcra_sipr
= MMCRA_SIPR
,
306 .platform
= "power5+",
308 { /* POWER6 in P5+ mode; 2.04-compliant processor */
309 .pvr_mask
= 0xffffffff,
310 .pvr_value
= 0x0f000001,
311 .cpu_name
= "POWER5+",
312 .cpu_features
= CPU_FTRS_POWER5
,
313 .cpu_user_features
= COMMON_USER_POWER5_PLUS
,
314 .mmu_features
= MMU_FTRS_POWER5
,
317 .oprofile_cpu_type
= "ppc64/ibm-compat-v1",
318 .oprofile_type
= PPC_OPROFILE_POWER4
,
319 .platform
= "power5+",
322 .pvr_mask
= 0xffff0000,
323 .pvr_value
= 0x003e0000,
324 .cpu_name
= "POWER6 (raw)",
325 .cpu_features
= CPU_FTRS_POWER6
,
326 .cpu_user_features
= COMMON_USER_POWER6
|
327 PPC_FEATURE_POWER6_EXT
,
328 .mmu_features
= MMU_FTRS_POWER6
,
332 .pmc_type
= PPC_PMC_IBM
,
333 .oprofile_cpu_type
= "ppc64/power6",
334 .oprofile_type
= PPC_OPROFILE_POWER4
,
335 .oprofile_mmcra_sihv
= POWER6_MMCRA_SIHV
,
336 .oprofile_mmcra_sipr
= POWER6_MMCRA_SIPR
,
337 .oprofile_mmcra_clear
= POWER6_MMCRA_THRM
|
339 .platform
= "power6x",
341 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
342 .pvr_mask
= 0xffffffff,
343 .pvr_value
= 0x0f000002,
344 .cpu_name
= "POWER6 (architected)",
345 .cpu_features
= CPU_FTRS_POWER6
,
346 .cpu_user_features
= COMMON_USER_POWER6
,
347 .mmu_features
= MMU_FTRS_POWER6
,
350 .oprofile_cpu_type
= "ppc64/ibm-compat-v1",
351 .oprofile_type
= PPC_OPROFILE_POWER4
,
352 .platform
= "power6",
354 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
355 .pvr_mask
= 0xffffffff,
356 .pvr_value
= 0x0f000003,
357 .cpu_name
= "POWER7 (architected)",
358 .cpu_features
= CPU_FTRS_POWER7
,
359 .cpu_user_features
= COMMON_USER_POWER7
,
360 .cpu_user_features2
= COMMON_USER2_POWER7
,
361 .mmu_features
= MMU_FTRS_POWER7
,
364 .oprofile_type
= PPC_OPROFILE_POWER4
,
365 .oprofile_cpu_type
= "ppc64/ibm-compat-v1",
366 .cpu_setup
= __setup_cpu_power7
,
367 .cpu_restore
= __restore_cpu_power7
,
368 .flush_tlb
= __flush_tlb_power7
,
369 .machine_check_early
= __machine_check_early_realmode_p7
,
370 .platform
= "power7",
372 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
373 .pvr_mask
= 0xffffffff,
374 .pvr_value
= 0x0f000004,
375 .cpu_name
= "POWER8 (architected)",
376 .cpu_features
= CPU_FTRS_POWER8
,
377 .cpu_user_features
= COMMON_USER_POWER8
,
378 .cpu_user_features2
= COMMON_USER2_POWER8
,
379 .mmu_features
= MMU_FTRS_POWER8
,
382 .oprofile_type
= PPC_OPROFILE_INVALID
,
383 .oprofile_cpu_type
= "ppc64/ibm-compat-v1",
384 .cpu_setup
= __setup_cpu_power8
,
385 .cpu_restore
= __restore_cpu_power8
,
386 .flush_tlb
= __flush_tlb_power8
,
387 .machine_check_early
= __machine_check_early_realmode_p8
,
388 .platform
= "power8",
390 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */
391 .pvr_mask
= 0xffffffff,
392 .pvr_value
= 0x0f000005,
393 .cpu_name
= "POWER9 (architected)",
394 .cpu_features
= CPU_FTRS_POWER9
,
395 .cpu_user_features
= COMMON_USER_POWER9
,
396 .cpu_user_features2
= COMMON_USER2_POWER9
,
397 .mmu_features
= MMU_FTRS_POWER9
,
400 .oprofile_type
= PPC_OPROFILE_INVALID
,
401 .oprofile_cpu_type
= "ppc64/ibm-compat-v1",
402 .cpu_setup
= __setup_cpu_power9
,
403 .cpu_restore
= __restore_cpu_power9
,
404 .flush_tlb
= __flush_tlb_power9
,
405 .platform
= "power9",
408 .pvr_mask
= 0xffff0000,
409 .pvr_value
= 0x003f0000,
410 .cpu_name
= "POWER7 (raw)",
411 .cpu_features
= CPU_FTRS_POWER7
,
412 .cpu_user_features
= COMMON_USER_POWER7
,
413 .cpu_user_features2
= COMMON_USER2_POWER7
,
414 .mmu_features
= MMU_FTRS_POWER7
,
418 .pmc_type
= PPC_PMC_IBM
,
419 .oprofile_cpu_type
= "ppc64/power7",
420 .oprofile_type
= PPC_OPROFILE_POWER4
,
421 .cpu_setup
= __setup_cpu_power7
,
422 .cpu_restore
= __restore_cpu_power7
,
423 .flush_tlb
= __flush_tlb_power7
,
424 .machine_check_early
= __machine_check_early_realmode_p7
,
425 .platform
= "power7",
428 .pvr_mask
= 0xffff0000,
429 .pvr_value
= 0x004A0000,
430 .cpu_name
= "POWER7+ (raw)",
431 .cpu_features
= CPU_FTRS_POWER7
,
432 .cpu_user_features
= COMMON_USER_POWER7
,
433 .cpu_user_features2
= COMMON_USER2_POWER7
,
434 .mmu_features
= MMU_FTRS_POWER7
,
438 .pmc_type
= PPC_PMC_IBM
,
439 .oprofile_cpu_type
= "ppc64/power7",
440 .oprofile_type
= PPC_OPROFILE_POWER4
,
441 .cpu_setup
= __setup_cpu_power7
,
442 .cpu_restore
= __restore_cpu_power7
,
443 .flush_tlb
= __flush_tlb_power7
,
444 .machine_check_early
= __machine_check_early_realmode_p7
,
445 .platform
= "power7+",
448 .pvr_mask
= 0xffff0000,
449 .pvr_value
= 0x004b0000,
450 .cpu_name
= "POWER8E (raw)",
451 .cpu_features
= CPU_FTRS_POWER8E
,
452 .cpu_user_features
= COMMON_USER_POWER8
,
453 .cpu_user_features2
= COMMON_USER2_POWER8
,
454 .mmu_features
= MMU_FTRS_POWER8
,
458 .pmc_type
= PPC_PMC_IBM
,
459 .oprofile_cpu_type
= "ppc64/power8",
460 .oprofile_type
= PPC_OPROFILE_INVALID
,
461 .cpu_setup
= __setup_cpu_power8
,
462 .cpu_restore
= __restore_cpu_power8
,
463 .flush_tlb
= __flush_tlb_power8
,
464 .machine_check_early
= __machine_check_early_realmode_p8
,
465 .platform
= "power8",
468 .pvr_mask
= 0xffff0000,
469 .pvr_value
= 0x004c0000,
470 .cpu_name
= "POWER8NVL (raw)",
471 .cpu_features
= CPU_FTRS_POWER8
,
472 .cpu_user_features
= COMMON_USER_POWER8
,
473 .cpu_user_features2
= COMMON_USER2_POWER8
,
474 .mmu_features
= MMU_FTRS_POWER8
,
478 .pmc_type
= PPC_PMC_IBM
,
479 .oprofile_cpu_type
= "ppc64/power8",
480 .oprofile_type
= PPC_OPROFILE_INVALID
,
481 .cpu_setup
= __setup_cpu_power8
,
482 .cpu_restore
= __restore_cpu_power8
,
483 .flush_tlb
= __flush_tlb_power8
,
484 .machine_check_early
= __machine_check_early_realmode_p8
,
485 .platform
= "power8",
487 { /* Power8 DD1: Does not support doorbell IPIs */
488 .pvr_mask
= 0xffffff00,
489 .pvr_value
= 0x004d0100,
490 .cpu_name
= "POWER8 (raw)",
491 .cpu_features
= CPU_FTRS_POWER8_DD1
,
492 .cpu_user_features
= COMMON_USER_POWER8
,
493 .cpu_user_features2
= COMMON_USER2_POWER8
,
494 .mmu_features
= MMU_FTRS_POWER8
,
498 .pmc_type
= PPC_PMC_IBM
,
499 .oprofile_cpu_type
= "ppc64/power8",
500 .oprofile_type
= PPC_OPROFILE_INVALID
,
501 .cpu_setup
= __setup_cpu_power8
,
502 .cpu_restore
= __restore_cpu_power8
,
503 .flush_tlb
= __flush_tlb_power8
,
504 .machine_check_early
= __machine_check_early_realmode_p8
,
505 .platform
= "power8",
508 .pvr_mask
= 0xffff0000,
509 .pvr_value
= 0x004d0000,
510 .cpu_name
= "POWER8 (raw)",
511 .cpu_features
= CPU_FTRS_POWER8
,
512 .cpu_user_features
= COMMON_USER_POWER8
,
513 .cpu_user_features2
= COMMON_USER2_POWER8
,
514 .mmu_features
= MMU_FTRS_POWER8
,
518 .pmc_type
= PPC_PMC_IBM
,
519 .oprofile_cpu_type
= "ppc64/power8",
520 .oprofile_type
= PPC_OPROFILE_INVALID
,
521 .cpu_setup
= __setup_cpu_power8
,
522 .cpu_restore
= __restore_cpu_power8
,
523 .flush_tlb
= __flush_tlb_power8
,
524 .machine_check_early
= __machine_check_early_realmode_p8
,
525 .platform
= "power8",
528 .pvr_mask
= 0xffffff00,
529 .pvr_value
= 0x004e0100,
530 .cpu_name
= "POWER9 (raw)",
531 .cpu_features
= CPU_FTRS_POWER9_DD1
,
532 .cpu_user_features
= COMMON_USER_POWER9
,
533 .cpu_user_features2
= COMMON_USER2_POWER9
,
534 .mmu_features
= MMU_FTRS_POWER9
,
538 .pmc_type
= PPC_PMC_IBM
,
539 .oprofile_cpu_type
= "ppc64/power9",
540 .oprofile_type
= PPC_OPROFILE_INVALID
,
541 .cpu_setup
= __setup_cpu_power9
,
542 .cpu_restore
= __restore_cpu_power9
,
543 .flush_tlb
= __flush_tlb_power9
,
544 .machine_check_early
= __machine_check_early_realmode_p9
,
545 .platform
= "power9",
548 .pvr_mask
= 0xffff0000,
549 .pvr_value
= 0x004e0000,
550 .cpu_name
= "POWER9 (raw)",
551 .cpu_features
= CPU_FTRS_POWER9
,
552 .cpu_user_features
= COMMON_USER_POWER9
,
553 .cpu_user_features2
= COMMON_USER2_POWER9
,
554 .mmu_features
= MMU_FTRS_POWER9
,
558 .pmc_type
= PPC_PMC_IBM
,
559 .oprofile_cpu_type
= "ppc64/power9",
560 .oprofile_type
= PPC_OPROFILE_INVALID
,
561 .cpu_setup
= __setup_cpu_power9
,
562 .cpu_restore
= __restore_cpu_power9
,
563 .flush_tlb
= __flush_tlb_power9
,
564 .machine_check_early
= __machine_check_early_realmode_p9
,
565 .platform
= "power9",
567 { /* Cell Broadband Engine */
568 .pvr_mask
= 0xffff0000,
569 .pvr_value
= 0x00700000,
570 .cpu_name
= "Cell Broadband Engine",
571 .cpu_features
= CPU_FTRS_CELL
,
572 .cpu_user_features
= COMMON_USER_PPC64
|
573 PPC_FEATURE_CELL
| PPC_FEATURE_HAS_ALTIVEC_COMP
|
575 .mmu_features
= MMU_FTRS_CELL
,
579 .pmc_type
= PPC_PMC_IBM
,
580 .oprofile_cpu_type
= "ppc64/cell-be",
581 .oprofile_type
= PPC_OPROFILE_CELL
,
582 .platform
= "ppc-cell-be",
585 .pvr_mask
= 0x7fff0000,
586 .pvr_value
= 0x00900000,
588 .cpu_features
= CPU_FTRS_PA6T
,
589 .cpu_user_features
= COMMON_USER_PA6T
,
590 .mmu_features
= MMU_FTRS_PA6T
,
594 .pmc_type
= PPC_PMC_PA6T
,
595 .cpu_setup
= __setup_cpu_pa6t
,
596 .cpu_restore
= __restore_cpu_pa6t
,
597 .oprofile_cpu_type
= "ppc64/pa6t",
598 .oprofile_type
= PPC_OPROFILE_PA6T
,
601 { /* default match */
602 .pvr_mask
= 0x00000000,
603 .pvr_value
= 0x00000000,
604 .cpu_name
= "POWER4 (compatible)",
605 .cpu_features
= CPU_FTRS_COMPATIBLE
,
606 .cpu_user_features
= COMMON_USER_PPC64
,
607 .mmu_features
= MMU_FTRS_DEFAULT_HPTE_ARCH_V2
,
611 .pmc_type
= PPC_PMC_IBM
,
612 .platform
= "power4",
614 #endif /* CONFIG_PPC_BOOK3S_64 */
617 #ifdef CONFIG_PPC_BOOK3S_32
619 .pvr_mask
= 0xffff0000,
620 .pvr_value
= 0x00010000,
622 .cpu_features
= CPU_FTRS_PPC601
,
623 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_601_INSTR
|
624 PPC_FEATURE_UNIFIED_CACHE
| PPC_FEATURE_NO_TB
,
625 .mmu_features
= MMU_FTR_HPTE_TABLE
,
628 .machine_check
= machine_check_generic
,
629 .platform
= "ppc601",
632 .pvr_mask
= 0xffff0000,
633 .pvr_value
= 0x00030000,
635 .cpu_features
= CPU_FTRS_603
,
636 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
640 .cpu_setup
= __setup_cpu_603
,
641 .machine_check
= machine_check_generic
,
642 .platform
= "ppc603",
645 .pvr_mask
= 0xffff0000,
646 .pvr_value
= 0x00060000,
648 .cpu_features
= CPU_FTRS_603
,
649 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
653 .cpu_setup
= __setup_cpu_603
,
654 .machine_check
= machine_check_generic
,
655 .platform
= "ppc603",
658 .pvr_mask
= 0xffff0000,
659 .pvr_value
= 0x00070000,
661 .cpu_features
= CPU_FTRS_603
,
662 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
666 .cpu_setup
= __setup_cpu_603
,
667 .machine_check
= machine_check_generic
,
668 .platform
= "ppc603",
671 .pvr_mask
= 0xffff0000,
672 .pvr_value
= 0x00040000,
674 .cpu_features
= CPU_FTRS_604
,
675 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
676 .mmu_features
= MMU_FTR_HPTE_TABLE
,
680 .cpu_setup
= __setup_cpu_604
,
681 .machine_check
= machine_check_generic
,
682 .platform
= "ppc604",
685 .pvr_mask
= 0xfffff000,
686 .pvr_value
= 0x00090000,
688 .cpu_features
= CPU_FTRS_604
,
689 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
690 .mmu_features
= MMU_FTR_HPTE_TABLE
,
694 .cpu_setup
= __setup_cpu_604
,
695 .machine_check
= machine_check_generic
,
696 .platform
= "ppc604",
699 .pvr_mask
= 0xffff0000,
700 .pvr_value
= 0x00090000,
702 .cpu_features
= CPU_FTRS_604
,
703 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
704 .mmu_features
= MMU_FTR_HPTE_TABLE
,
708 .cpu_setup
= __setup_cpu_604
,
709 .machine_check
= machine_check_generic
,
710 .platform
= "ppc604",
713 .pvr_mask
= 0xffff0000,
714 .pvr_value
= 0x000a0000,
716 .cpu_features
= CPU_FTRS_604
,
717 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
718 .mmu_features
= MMU_FTR_HPTE_TABLE
,
722 .cpu_setup
= __setup_cpu_604
,
723 .machine_check
= machine_check_generic
,
724 .platform
= "ppc604",
726 { /* 740/750 (0x4202, don't support TAU ?) */
727 .pvr_mask
= 0xffffffff,
728 .pvr_value
= 0x00084202,
729 .cpu_name
= "740/750",
730 .cpu_features
= CPU_FTRS_740_NOTAU
,
731 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
732 .mmu_features
= MMU_FTR_HPTE_TABLE
,
736 .cpu_setup
= __setup_cpu_750
,
737 .machine_check
= machine_check_generic
,
738 .platform
= "ppc750",
740 { /* 750CX (80100 and 8010x?) */
741 .pvr_mask
= 0xfffffff0,
742 .pvr_value
= 0x00080100,
744 .cpu_features
= CPU_FTRS_750
,
745 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
746 .mmu_features
= MMU_FTR_HPTE_TABLE
,
750 .cpu_setup
= __setup_cpu_750cx
,
751 .machine_check
= machine_check_generic
,
752 .platform
= "ppc750",
754 { /* 750CX (82201 and 82202) */
755 .pvr_mask
= 0xfffffff0,
756 .pvr_value
= 0x00082200,
758 .cpu_features
= CPU_FTRS_750
,
759 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
760 .mmu_features
= MMU_FTR_HPTE_TABLE
,
764 .pmc_type
= PPC_PMC_IBM
,
765 .cpu_setup
= __setup_cpu_750cx
,
766 .machine_check
= machine_check_generic
,
767 .platform
= "ppc750",
769 { /* 750CXe (82214) */
770 .pvr_mask
= 0xfffffff0,
771 .pvr_value
= 0x00082210,
772 .cpu_name
= "750CXe",
773 .cpu_features
= CPU_FTRS_750
,
774 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
775 .mmu_features
= MMU_FTR_HPTE_TABLE
,
779 .pmc_type
= PPC_PMC_IBM
,
780 .cpu_setup
= __setup_cpu_750cx
,
781 .machine_check
= machine_check_generic
,
782 .platform
= "ppc750",
784 { /* 750CXe "Gekko" (83214) */
785 .pvr_mask
= 0xffffffff,
786 .pvr_value
= 0x00083214,
787 .cpu_name
= "750CXe",
788 .cpu_features
= CPU_FTRS_750
,
789 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
790 .mmu_features
= MMU_FTR_HPTE_TABLE
,
794 .pmc_type
= PPC_PMC_IBM
,
795 .cpu_setup
= __setup_cpu_750cx
,
796 .machine_check
= machine_check_generic
,
797 .platform
= "ppc750",
799 { /* 750CL (and "Broadway") */
800 .pvr_mask
= 0xfffff0e0,
801 .pvr_value
= 0x00087000,
803 .cpu_features
= CPU_FTRS_750CL
,
804 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
805 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
809 .pmc_type
= PPC_PMC_IBM
,
810 .cpu_setup
= __setup_cpu_750
,
811 .machine_check
= machine_check_generic
,
812 .platform
= "ppc750",
813 .oprofile_cpu_type
= "ppc/750",
814 .oprofile_type
= PPC_OPROFILE_G4
,
817 .pvr_mask
= 0xfffff000,
818 .pvr_value
= 0x00083000,
819 .cpu_name
= "745/755",
820 .cpu_features
= CPU_FTRS_750
,
821 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
822 .mmu_features
= MMU_FTR_HPTE_TABLE
,
826 .pmc_type
= PPC_PMC_IBM
,
827 .cpu_setup
= __setup_cpu_750
,
828 .machine_check
= machine_check_generic
,
829 .platform
= "ppc750",
831 { /* 750FX rev 1.x */
832 .pvr_mask
= 0xffffff00,
833 .pvr_value
= 0x70000100,
835 .cpu_features
= CPU_FTRS_750FX1
,
836 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
837 .mmu_features
= MMU_FTR_HPTE_TABLE
,
841 .pmc_type
= PPC_PMC_IBM
,
842 .cpu_setup
= __setup_cpu_750
,
843 .machine_check
= machine_check_generic
,
844 .platform
= "ppc750",
845 .oprofile_cpu_type
= "ppc/750",
846 .oprofile_type
= PPC_OPROFILE_G4
,
848 { /* 750FX rev 2.0 must disable HID0[DPM] */
849 .pvr_mask
= 0xffffffff,
850 .pvr_value
= 0x70000200,
852 .cpu_features
= CPU_FTRS_750FX2
,
853 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
854 .mmu_features
= MMU_FTR_HPTE_TABLE
,
858 .pmc_type
= PPC_PMC_IBM
,
859 .cpu_setup
= __setup_cpu_750
,
860 .machine_check
= machine_check_generic
,
861 .platform
= "ppc750",
862 .oprofile_cpu_type
= "ppc/750",
863 .oprofile_type
= PPC_OPROFILE_G4
,
865 { /* 750FX (All revs except 2.0) */
866 .pvr_mask
= 0xffff0000,
867 .pvr_value
= 0x70000000,
869 .cpu_features
= CPU_FTRS_750FX
,
870 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
871 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
875 .pmc_type
= PPC_PMC_IBM
,
876 .cpu_setup
= __setup_cpu_750fx
,
877 .machine_check
= machine_check_generic
,
878 .platform
= "ppc750",
879 .oprofile_cpu_type
= "ppc/750",
880 .oprofile_type
= PPC_OPROFILE_G4
,
883 .pvr_mask
= 0xffff0000,
884 .pvr_value
= 0x70020000,
886 .cpu_features
= CPU_FTRS_750GX
,
887 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
888 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
892 .pmc_type
= PPC_PMC_IBM
,
893 .cpu_setup
= __setup_cpu_750fx
,
894 .machine_check
= machine_check_generic
,
895 .platform
= "ppc750",
896 .oprofile_cpu_type
= "ppc/750",
897 .oprofile_type
= PPC_OPROFILE_G4
,
899 { /* 740/750 (L2CR bit need fixup for 740) */
900 .pvr_mask
= 0xffff0000,
901 .pvr_value
= 0x00080000,
902 .cpu_name
= "740/750",
903 .cpu_features
= CPU_FTRS_740
,
904 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_PPC_LE
,
905 .mmu_features
= MMU_FTR_HPTE_TABLE
,
909 .pmc_type
= PPC_PMC_IBM
,
910 .cpu_setup
= __setup_cpu_750
,
911 .machine_check
= machine_check_generic
,
912 .platform
= "ppc750",
914 { /* 7400 rev 1.1 ? (no TAU) */
915 .pvr_mask
= 0xffffffff,
916 .pvr_value
= 0x000c1101,
917 .cpu_name
= "7400 (1.1)",
918 .cpu_features
= CPU_FTRS_7400_NOTAU
,
919 .cpu_user_features
= COMMON_USER
|
920 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
921 .mmu_features
= MMU_FTR_HPTE_TABLE
,
925 .pmc_type
= PPC_PMC_G4
,
926 .cpu_setup
= __setup_cpu_7400
,
927 .machine_check
= machine_check_generic
,
928 .platform
= "ppc7400",
931 .pvr_mask
= 0xffff0000,
932 .pvr_value
= 0x000c0000,
934 .cpu_features
= CPU_FTRS_7400
,
935 .cpu_user_features
= COMMON_USER
|
936 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
937 .mmu_features
= MMU_FTR_HPTE_TABLE
,
941 .pmc_type
= PPC_PMC_G4
,
942 .cpu_setup
= __setup_cpu_7400
,
943 .machine_check
= machine_check_generic
,
944 .platform
= "ppc7400",
947 .pvr_mask
= 0xffff0000,
948 .pvr_value
= 0x800c0000,
950 .cpu_features
= CPU_FTRS_7400
,
951 .cpu_user_features
= COMMON_USER
|
952 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
953 .mmu_features
= MMU_FTR_HPTE_TABLE
,
957 .pmc_type
= PPC_PMC_G4
,
958 .cpu_setup
= __setup_cpu_7410
,
959 .machine_check
= machine_check_generic
,
960 .platform
= "ppc7400",
962 { /* 7450 2.0 - no doze/nap */
963 .pvr_mask
= 0xffffffff,
964 .pvr_value
= 0x80000200,
966 .cpu_features
= CPU_FTRS_7450_20
,
967 .cpu_user_features
= COMMON_USER
|
968 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
969 .mmu_features
= MMU_FTR_HPTE_TABLE
,
973 .pmc_type
= PPC_PMC_G4
,
974 .cpu_setup
= __setup_cpu_745x
,
975 .oprofile_cpu_type
= "ppc/7450",
976 .oprofile_type
= PPC_OPROFILE_G4
,
977 .machine_check
= machine_check_generic
,
978 .platform
= "ppc7450",
981 .pvr_mask
= 0xffffffff,
982 .pvr_value
= 0x80000201,
984 .cpu_features
= CPU_FTRS_7450_21
,
985 .cpu_user_features
= COMMON_USER
|
986 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
987 .mmu_features
= MMU_FTR_HPTE_TABLE
,
991 .pmc_type
= PPC_PMC_G4
,
992 .cpu_setup
= __setup_cpu_745x
,
993 .oprofile_cpu_type
= "ppc/7450",
994 .oprofile_type
= PPC_OPROFILE_G4
,
995 .machine_check
= machine_check_generic
,
996 .platform
= "ppc7450",
998 { /* 7450 2.3 and newer */
999 .pvr_mask
= 0xffff0000,
1000 .pvr_value
= 0x80000000,
1002 .cpu_features
= CPU_FTRS_7450_23
,
1003 .cpu_user_features
= COMMON_USER
|
1004 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
1005 .mmu_features
= MMU_FTR_HPTE_TABLE
,
1009 .pmc_type
= PPC_PMC_G4
,
1010 .cpu_setup
= __setup_cpu_745x
,
1011 .oprofile_cpu_type
= "ppc/7450",
1012 .oprofile_type
= PPC_OPROFILE_G4
,
1013 .machine_check
= machine_check_generic
,
1014 .platform
= "ppc7450",
1016 { /* 7455 rev 1.x */
1017 .pvr_mask
= 0xffffff00,
1018 .pvr_value
= 0x80010100,
1020 .cpu_features
= CPU_FTRS_7455_1
,
1021 .cpu_user_features
= COMMON_USER
|
1022 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
1023 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
1027 .pmc_type
= PPC_PMC_G4
,
1028 .cpu_setup
= __setup_cpu_745x
,
1029 .oprofile_cpu_type
= "ppc/7450",
1030 .oprofile_type
= PPC_OPROFILE_G4
,
1031 .machine_check
= machine_check_generic
,
1032 .platform
= "ppc7450",
1034 { /* 7455 rev 2.0 */
1035 .pvr_mask
= 0xffffffff,
1036 .pvr_value
= 0x80010200,
1038 .cpu_features
= CPU_FTRS_7455_20
,
1039 .cpu_user_features
= COMMON_USER
|
1040 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
1041 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
1045 .pmc_type
= PPC_PMC_G4
,
1046 .cpu_setup
= __setup_cpu_745x
,
1047 .oprofile_cpu_type
= "ppc/7450",
1048 .oprofile_type
= PPC_OPROFILE_G4
,
1049 .machine_check
= machine_check_generic
,
1050 .platform
= "ppc7450",
1053 .pvr_mask
= 0xffff0000,
1054 .pvr_value
= 0x80010000,
1056 .cpu_features
= CPU_FTRS_7455
,
1057 .cpu_user_features
= COMMON_USER
|
1058 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
1059 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
1063 .pmc_type
= PPC_PMC_G4
,
1064 .cpu_setup
= __setup_cpu_745x
,
1065 .oprofile_cpu_type
= "ppc/7450",
1066 .oprofile_type
= PPC_OPROFILE_G4
,
1067 .machine_check
= machine_check_generic
,
1068 .platform
= "ppc7450",
1070 { /* 7447/7457 Rev 1.0 */
1071 .pvr_mask
= 0xffffffff,
1072 .pvr_value
= 0x80020100,
1073 .cpu_name
= "7447/7457",
1074 .cpu_features
= CPU_FTRS_7447_10
,
1075 .cpu_user_features
= COMMON_USER
|
1076 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
1077 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
1081 .pmc_type
= PPC_PMC_G4
,
1082 .cpu_setup
= __setup_cpu_745x
,
1083 .oprofile_cpu_type
= "ppc/7450",
1084 .oprofile_type
= PPC_OPROFILE_G4
,
1085 .machine_check
= machine_check_generic
,
1086 .platform
= "ppc7450",
1088 { /* 7447/7457 Rev 1.1 */
1089 .pvr_mask
= 0xffffffff,
1090 .pvr_value
= 0x80020101,
1091 .cpu_name
= "7447/7457",
1092 .cpu_features
= CPU_FTRS_7447_10
,
1093 .cpu_user_features
= COMMON_USER
|
1094 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
1095 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
1099 .pmc_type
= PPC_PMC_G4
,
1100 .cpu_setup
= __setup_cpu_745x
,
1101 .oprofile_cpu_type
= "ppc/7450",
1102 .oprofile_type
= PPC_OPROFILE_G4
,
1103 .machine_check
= machine_check_generic
,
1104 .platform
= "ppc7450",
1106 { /* 7447/7457 Rev 1.2 and later */
1107 .pvr_mask
= 0xffff0000,
1108 .pvr_value
= 0x80020000,
1109 .cpu_name
= "7447/7457",
1110 .cpu_features
= CPU_FTRS_7447
,
1111 .cpu_user_features
= COMMON_USER
| PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
1112 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
1116 .pmc_type
= PPC_PMC_G4
,
1117 .cpu_setup
= __setup_cpu_745x
,
1118 .oprofile_cpu_type
= "ppc/7450",
1119 .oprofile_type
= PPC_OPROFILE_G4
,
1120 .machine_check
= machine_check_generic
,
1121 .platform
= "ppc7450",
1124 .pvr_mask
= 0xffff0000,
1125 .pvr_value
= 0x80030000,
1126 .cpu_name
= "7447A",
1127 .cpu_features
= CPU_FTRS_7447A
,
1128 .cpu_user_features
= COMMON_USER
|
1129 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
1130 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
1134 .pmc_type
= PPC_PMC_G4
,
1135 .cpu_setup
= __setup_cpu_745x
,
1136 .oprofile_cpu_type
= "ppc/7450",
1137 .oprofile_type
= PPC_OPROFILE_G4
,
1138 .machine_check
= machine_check_generic
,
1139 .platform
= "ppc7450",
1142 .pvr_mask
= 0xffff0000,
1143 .pvr_value
= 0x80040000,
1145 .cpu_features
= CPU_FTRS_7448
,
1146 .cpu_user_features
= COMMON_USER
|
1147 PPC_FEATURE_HAS_ALTIVEC_COMP
| PPC_FEATURE_PPC_LE
,
1148 .mmu_features
= MMU_FTR_HPTE_TABLE
| MMU_FTR_USE_HIGH_BATS
,
1152 .pmc_type
= PPC_PMC_G4
,
1153 .cpu_setup
= __setup_cpu_745x
,
1154 .oprofile_cpu_type
= "ppc/7450",
1155 .oprofile_type
= PPC_OPROFILE_G4
,
1156 .machine_check
= machine_check_generic
,
1157 .platform
= "ppc7450",
1159 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1160 .pvr_mask
= 0x7fff0000,
1161 .pvr_value
= 0x00810000,
1163 .cpu_features
= CPU_FTRS_82XX
,
1164 .cpu_user_features
= COMMON_USER
,
1168 .cpu_setup
= __setup_cpu_603
,
1169 .machine_check
= machine_check_generic
,
1170 .platform
= "ppc603",
1172 { /* All G2_LE (603e core, plus some) have the same pvr */
1173 .pvr_mask
= 0x7fff0000,
1174 .pvr_value
= 0x00820000,
1175 .cpu_name
= "G2_LE",
1176 .cpu_features
= CPU_FTRS_G2_LE
,
1177 .cpu_user_features
= COMMON_USER
,
1178 .mmu_features
= MMU_FTR_USE_HIGH_BATS
,
1181 .cpu_setup
= __setup_cpu_603
,
1182 .machine_check
= machine_check_generic
,
1183 .platform
= "ppc603",
1185 { /* e300c1 (a 603e core, plus some) on 83xx */
1186 .pvr_mask
= 0x7fff0000,
1187 .pvr_value
= 0x00830000,
1188 .cpu_name
= "e300c1",
1189 .cpu_features
= CPU_FTRS_E300
,
1190 .cpu_user_features
= COMMON_USER
,
1191 .mmu_features
= MMU_FTR_USE_HIGH_BATS
,
1194 .cpu_setup
= __setup_cpu_603
,
1195 .machine_check
= machine_check_generic
,
1196 .platform
= "ppc603",
1198 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1199 .pvr_mask
= 0x7fff0000,
1200 .pvr_value
= 0x00840000,
1201 .cpu_name
= "e300c2",
1202 .cpu_features
= CPU_FTRS_E300C2
,
1203 .cpu_user_features
= PPC_FEATURE_32
| PPC_FEATURE_HAS_MMU
,
1204 .mmu_features
= MMU_FTR_USE_HIGH_BATS
|
1205 MMU_FTR_NEED_DTLB_SW_LRU
,
1208 .cpu_setup
= __setup_cpu_603
,
1209 .machine_check
= machine_check_generic
,
1210 .platform
= "ppc603",
1212 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1213 .pvr_mask
= 0x7fff0000,
1214 .pvr_value
= 0x00850000,
1215 .cpu_name
= "e300c3",
1216 .cpu_features
= CPU_FTRS_E300
,
1217 .cpu_user_features
= COMMON_USER
,
1218 .mmu_features
= MMU_FTR_USE_HIGH_BATS
|
1219 MMU_FTR_NEED_DTLB_SW_LRU
,
1222 .cpu_setup
= __setup_cpu_603
,
1223 .machine_check
= machine_check_generic
,
1225 .oprofile_cpu_type
= "ppc/e300",
1226 .oprofile_type
= PPC_OPROFILE_FSL_EMB
,
1227 .platform
= "ppc603",
1229 { /* e300c4 (e300c1, plus one IU) */
1230 .pvr_mask
= 0x7fff0000,
1231 .pvr_value
= 0x00860000,
1232 .cpu_name
= "e300c4",
1233 .cpu_features
= CPU_FTRS_E300
,
1234 .cpu_user_features
= COMMON_USER
,
1235 .mmu_features
= MMU_FTR_USE_HIGH_BATS
|
1236 MMU_FTR_NEED_DTLB_SW_LRU
,
1239 .cpu_setup
= __setup_cpu_603
,
1240 .machine_check
= machine_check_generic
,
1242 .oprofile_cpu_type
= "ppc/e300",
1243 .oprofile_type
= PPC_OPROFILE_FSL_EMB
,
1244 .platform
= "ppc603",
1246 { /* default match, we assume split I/D cache & TB (non-601)... */
1247 .pvr_mask
= 0x00000000,
1248 .pvr_value
= 0x00000000,
1249 .cpu_name
= "(generic PPC)",
1250 .cpu_features
= CPU_FTRS_CLASSIC32
,
1251 .cpu_user_features
= COMMON_USER
,
1252 .mmu_features
= MMU_FTR_HPTE_TABLE
,
1255 .machine_check
= machine_check_generic
,
1256 .platform
= "ppc603",
1258 #endif /* CONFIG_PPC_BOOK3S_32 */
1261 .pvr_mask
= 0xffff0000,
1262 .pvr_value
= 0x00500000,
1264 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1265 * if the 8xx code is there.... */
1266 .cpu_features
= CPU_FTRS_8XX
,
1267 .cpu_user_features
= PPC_FEATURE_32
| PPC_FEATURE_HAS_MMU
,
1268 .mmu_features
= MMU_FTR_TYPE_8xx
,
1271 .machine_check
= machine_check_8xx
,
1272 .platform
= "ppc823",
1274 #endif /* CONFIG_8xx */
1277 .pvr_mask
= 0xffffff00,
1278 .pvr_value
= 0x00200200,
1279 .cpu_name
= "403GC",
1280 .cpu_features
= CPU_FTRS_40X
,
1281 .cpu_user_features
= PPC_FEATURE_32
| PPC_FEATURE_HAS_MMU
,
1282 .mmu_features
= MMU_FTR_TYPE_40x
,
1285 .machine_check
= machine_check_4xx
,
1286 .platform
= "ppc403",
1289 .pvr_mask
= 0xffffff00,
1290 .pvr_value
= 0x00201400,
1291 .cpu_name
= "403GCX",
1292 .cpu_features
= CPU_FTRS_40X
,
1293 .cpu_user_features
= PPC_FEATURE_32
|
1294 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_NO_TB
,
1295 .mmu_features
= MMU_FTR_TYPE_40x
,
1298 .machine_check
= machine_check_4xx
,
1299 .platform
= "ppc403",
1302 .pvr_mask
= 0xffff0000,
1303 .pvr_value
= 0x00200000,
1304 .cpu_name
= "403G ??",
1305 .cpu_features
= CPU_FTRS_40X
,
1306 .cpu_user_features
= PPC_FEATURE_32
| PPC_FEATURE_HAS_MMU
,
1307 .mmu_features
= MMU_FTR_TYPE_40x
,
1310 .machine_check
= machine_check_4xx
,
1311 .platform
= "ppc403",
1314 .pvr_mask
= 0xffff0000,
1315 .pvr_value
= 0x40110000,
1316 .cpu_name
= "405GP",
1317 .cpu_features
= CPU_FTRS_40X
,
1318 .cpu_user_features
= PPC_FEATURE_32
|
1319 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1320 .mmu_features
= MMU_FTR_TYPE_40x
,
1323 .machine_check
= machine_check_4xx
,
1324 .platform
= "ppc405",
1327 .pvr_mask
= 0xffff0000,
1328 .pvr_value
= 0x40130000,
1329 .cpu_name
= "STB03xxx",
1330 .cpu_features
= CPU_FTRS_40X
,
1331 .cpu_user_features
= PPC_FEATURE_32
|
1332 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1333 .mmu_features
= MMU_FTR_TYPE_40x
,
1336 .machine_check
= machine_check_4xx
,
1337 .platform
= "ppc405",
1340 .pvr_mask
= 0xffff0000,
1341 .pvr_value
= 0x41810000,
1342 .cpu_name
= "STB04xxx",
1343 .cpu_features
= CPU_FTRS_40X
,
1344 .cpu_user_features
= PPC_FEATURE_32
|
1345 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1346 .mmu_features
= MMU_FTR_TYPE_40x
,
1349 .machine_check
= machine_check_4xx
,
1350 .platform
= "ppc405",
1353 .pvr_mask
= 0xffff0000,
1354 .pvr_value
= 0x41610000,
1355 .cpu_name
= "NP405L",
1356 .cpu_features
= CPU_FTRS_40X
,
1357 .cpu_user_features
= PPC_FEATURE_32
|
1358 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1359 .mmu_features
= MMU_FTR_TYPE_40x
,
1362 .machine_check
= machine_check_4xx
,
1363 .platform
= "ppc405",
1366 .pvr_mask
= 0xffff0000,
1367 .pvr_value
= 0x40B10000,
1368 .cpu_name
= "NP4GS3",
1369 .cpu_features
= CPU_FTRS_40X
,
1370 .cpu_user_features
= PPC_FEATURE_32
|
1371 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1372 .mmu_features
= MMU_FTR_TYPE_40x
,
1375 .machine_check
= machine_check_4xx
,
1376 .platform
= "ppc405",
1379 .pvr_mask
= 0xffff0000,
1380 .pvr_value
= 0x41410000,
1381 .cpu_name
= "NP405H",
1382 .cpu_features
= CPU_FTRS_40X
,
1383 .cpu_user_features
= PPC_FEATURE_32
|
1384 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1385 .mmu_features
= MMU_FTR_TYPE_40x
,
1388 .machine_check
= machine_check_4xx
,
1389 .platform
= "ppc405",
1392 .pvr_mask
= 0xffff0000,
1393 .pvr_value
= 0x50910000,
1394 .cpu_name
= "405GPr",
1395 .cpu_features
= CPU_FTRS_40X
,
1396 .cpu_user_features
= PPC_FEATURE_32
|
1397 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1398 .mmu_features
= MMU_FTR_TYPE_40x
,
1401 .machine_check
= machine_check_4xx
,
1402 .platform
= "ppc405",
1405 .pvr_mask
= 0xffff0000,
1406 .pvr_value
= 0x51510000,
1407 .cpu_name
= "STBx25xx",
1408 .cpu_features
= CPU_FTRS_40X
,
1409 .cpu_user_features
= PPC_FEATURE_32
|
1410 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1411 .mmu_features
= MMU_FTR_TYPE_40x
,
1414 .machine_check
= machine_check_4xx
,
1415 .platform
= "ppc405",
1418 .pvr_mask
= 0xffff0000,
1419 .pvr_value
= 0x41F10000,
1420 .cpu_name
= "405LP",
1421 .cpu_features
= CPU_FTRS_40X
,
1422 .cpu_user_features
= PPC_FEATURE_32
| PPC_FEATURE_HAS_MMU
,
1423 .mmu_features
= MMU_FTR_TYPE_40x
,
1426 .machine_check
= machine_check_4xx
,
1427 .platform
= "ppc405",
1429 { /* Xilinx Virtex-II Pro */
1430 .pvr_mask
= 0xfffff000,
1431 .pvr_value
= 0x20010000,
1432 .cpu_name
= "Virtex-II Pro",
1433 .cpu_features
= CPU_FTRS_40X
,
1434 .cpu_user_features
= PPC_FEATURE_32
|
1435 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1436 .mmu_features
= MMU_FTR_TYPE_40x
,
1439 .machine_check
= machine_check_4xx
,
1440 .platform
= "ppc405",
1442 { /* Xilinx Virtex-4 FX */
1443 .pvr_mask
= 0xfffff000,
1444 .pvr_value
= 0x20011000,
1445 .cpu_name
= "Virtex-4 FX",
1446 .cpu_features
= CPU_FTRS_40X
,
1447 .cpu_user_features
= PPC_FEATURE_32
|
1448 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1449 .mmu_features
= MMU_FTR_TYPE_40x
,
1452 .machine_check
= machine_check_4xx
,
1453 .platform
= "ppc405",
1456 .pvr_mask
= 0xffff0000,
1457 .pvr_value
= 0x51210000,
1458 .cpu_name
= "405EP",
1459 .cpu_features
= CPU_FTRS_40X
,
1460 .cpu_user_features
= PPC_FEATURE_32
|
1461 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1462 .mmu_features
= MMU_FTR_TYPE_40x
,
1465 .machine_check
= machine_check_4xx
,
1466 .platform
= "ppc405",
1468 { /* 405EX Rev. A/B with Security */
1469 .pvr_mask
= 0xffff000f,
1470 .pvr_value
= 0x12910007,
1471 .cpu_name
= "405EX Rev. A/B",
1472 .cpu_features
= CPU_FTRS_40X
,
1473 .cpu_user_features
= PPC_FEATURE_32
|
1474 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1475 .mmu_features
= MMU_FTR_TYPE_40x
,
1478 .machine_check
= machine_check_4xx
,
1479 .platform
= "ppc405",
1481 { /* 405EX Rev. C without Security */
1482 .pvr_mask
= 0xffff000f,
1483 .pvr_value
= 0x1291000d,
1484 .cpu_name
= "405EX Rev. C",
1485 .cpu_features
= CPU_FTRS_40X
,
1486 .cpu_user_features
= PPC_FEATURE_32
|
1487 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1488 .mmu_features
= MMU_FTR_TYPE_40x
,
1491 .machine_check
= machine_check_4xx
,
1492 .platform
= "ppc405",
1494 { /* 405EX Rev. C with Security */
1495 .pvr_mask
= 0xffff000f,
1496 .pvr_value
= 0x1291000f,
1497 .cpu_name
= "405EX Rev. C",
1498 .cpu_features
= CPU_FTRS_40X
,
1499 .cpu_user_features
= PPC_FEATURE_32
|
1500 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1501 .mmu_features
= MMU_FTR_TYPE_40x
,
1504 .machine_check
= machine_check_4xx
,
1505 .platform
= "ppc405",
1507 { /* 405EX Rev. D without Security */
1508 .pvr_mask
= 0xffff000f,
1509 .pvr_value
= 0x12910003,
1510 .cpu_name
= "405EX Rev. D",
1511 .cpu_features
= CPU_FTRS_40X
,
1512 .cpu_user_features
= PPC_FEATURE_32
|
1513 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1514 .mmu_features
= MMU_FTR_TYPE_40x
,
1517 .machine_check
= machine_check_4xx
,
1518 .platform
= "ppc405",
1520 { /* 405EX Rev. D with Security */
1521 .pvr_mask
= 0xffff000f,
1522 .pvr_value
= 0x12910005,
1523 .cpu_name
= "405EX Rev. D",
1524 .cpu_features
= CPU_FTRS_40X
,
1525 .cpu_user_features
= PPC_FEATURE_32
|
1526 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1527 .mmu_features
= MMU_FTR_TYPE_40x
,
1530 .machine_check
= machine_check_4xx
,
1531 .platform
= "ppc405",
1533 { /* 405EXr Rev. A/B without Security */
1534 .pvr_mask
= 0xffff000f,
1535 .pvr_value
= 0x12910001,
1536 .cpu_name
= "405EXr Rev. A/B",
1537 .cpu_features
= CPU_FTRS_40X
,
1538 .cpu_user_features
= PPC_FEATURE_32
|
1539 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1540 .mmu_features
= MMU_FTR_TYPE_40x
,
1543 .machine_check
= machine_check_4xx
,
1544 .platform
= "ppc405",
1546 { /* 405EXr Rev. C without Security */
1547 .pvr_mask
= 0xffff000f,
1548 .pvr_value
= 0x12910009,
1549 .cpu_name
= "405EXr Rev. C",
1550 .cpu_features
= CPU_FTRS_40X
,
1551 .cpu_user_features
= PPC_FEATURE_32
|
1552 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1553 .mmu_features
= MMU_FTR_TYPE_40x
,
1556 .machine_check
= machine_check_4xx
,
1557 .platform
= "ppc405",
1559 { /* 405EXr Rev. C with Security */
1560 .pvr_mask
= 0xffff000f,
1561 .pvr_value
= 0x1291000b,
1562 .cpu_name
= "405EXr Rev. C",
1563 .cpu_features
= CPU_FTRS_40X
,
1564 .cpu_user_features
= PPC_FEATURE_32
|
1565 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1566 .mmu_features
= MMU_FTR_TYPE_40x
,
1569 .machine_check
= machine_check_4xx
,
1570 .platform
= "ppc405",
1572 { /* 405EXr Rev. D without Security */
1573 .pvr_mask
= 0xffff000f,
1574 .pvr_value
= 0x12910000,
1575 .cpu_name
= "405EXr Rev. D",
1576 .cpu_features
= CPU_FTRS_40X
,
1577 .cpu_user_features
= PPC_FEATURE_32
|
1578 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1579 .mmu_features
= MMU_FTR_TYPE_40x
,
1582 .machine_check
= machine_check_4xx
,
1583 .platform
= "ppc405",
1585 { /* 405EXr Rev. D with Security */
1586 .pvr_mask
= 0xffff000f,
1587 .pvr_value
= 0x12910002,
1588 .cpu_name
= "405EXr Rev. D",
1589 .cpu_features
= CPU_FTRS_40X
,
1590 .cpu_user_features
= PPC_FEATURE_32
|
1591 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1592 .mmu_features
= MMU_FTR_TYPE_40x
,
1595 .machine_check
= machine_check_4xx
,
1596 .platform
= "ppc405",
1600 .pvr_mask
= 0xffff0000,
1601 .pvr_value
= 0x41510000,
1602 .cpu_name
= "405EZ",
1603 .cpu_features
= CPU_FTRS_40X
,
1604 .cpu_user_features
= PPC_FEATURE_32
|
1605 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1606 .mmu_features
= MMU_FTR_TYPE_40x
,
1609 .machine_check
= machine_check_4xx
,
1610 .platform
= "ppc405",
1613 .pvr_mask
= 0xffff0000,
1614 .pvr_value
= 0x7ff11432,
1615 .cpu_name
= "APM8018X",
1616 .cpu_features
= CPU_FTRS_40X
,
1617 .cpu_user_features
= PPC_FEATURE_32
|
1618 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1619 .mmu_features
= MMU_FTR_TYPE_40x
,
1622 .machine_check
= machine_check_4xx
,
1623 .platform
= "ppc405",
1625 { /* default match */
1626 .pvr_mask
= 0x00000000,
1627 .pvr_value
= 0x00000000,
1628 .cpu_name
= "(generic 40x PPC)",
1629 .cpu_features
= CPU_FTRS_40X
,
1630 .cpu_user_features
= PPC_FEATURE_32
|
1631 PPC_FEATURE_HAS_MMU
| PPC_FEATURE_HAS_4xxMAC
,
1632 .mmu_features
= MMU_FTR_TYPE_40x
,
1635 .machine_check
= machine_check_4xx
,
1636 .platform
= "ppc405",
1639 #endif /* CONFIG_40x */
1642 .pvr_mask
= 0xf0000fff,
1643 .pvr_value
= 0x40000850,
1644 .cpu_name
= "440GR Rev. A",
1645 .cpu_features
= CPU_FTRS_44X
,
1646 .cpu_user_features
= COMMON_USER_BOOKE
,
1647 .mmu_features
= MMU_FTR_TYPE_44x
,
1650 .machine_check
= machine_check_4xx
,
1651 .platform
= "ppc440",
1653 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1654 .pvr_mask
= 0xf0000fff,
1655 .pvr_value
= 0x40000858,
1656 .cpu_name
= "440EP Rev. A",
1657 .cpu_features
= CPU_FTRS_44X
,
1658 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
1659 .mmu_features
= MMU_FTR_TYPE_44x
,
1662 .cpu_setup
= __setup_cpu_440ep
,
1663 .machine_check
= machine_check_4xx
,
1664 .platform
= "ppc440",
1667 .pvr_mask
= 0xf0000fff,
1668 .pvr_value
= 0x400008d3,
1669 .cpu_name
= "440GR Rev. B",
1670 .cpu_features
= CPU_FTRS_44X
,
1671 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
1672 .mmu_features
= MMU_FTR_TYPE_44x
,
1675 .machine_check
= machine_check_4xx
,
1676 .platform
= "ppc440",
1678 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1679 .pvr_mask
= 0xf0000ff7,
1680 .pvr_value
= 0x400008d4,
1681 .cpu_name
= "440EP Rev. C",
1682 .cpu_features
= CPU_FTRS_44X
,
1683 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
1684 .mmu_features
= MMU_FTR_TYPE_44x
,
1687 .cpu_setup
= __setup_cpu_440ep
,
1688 .machine_check
= machine_check_4xx
,
1689 .platform
= "ppc440",
1691 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1692 .pvr_mask
= 0xf0000fff,
1693 .pvr_value
= 0x400008db,
1694 .cpu_name
= "440EP Rev. B",
1695 .cpu_features
= CPU_FTRS_44X
,
1696 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
1697 .mmu_features
= MMU_FTR_TYPE_44x
,
1700 .cpu_setup
= __setup_cpu_440ep
,
1701 .machine_check
= machine_check_4xx
,
1702 .platform
= "ppc440",
1705 .pvr_mask
= 0xf0000ffb,
1706 .pvr_value
= 0x200008D0,
1707 .cpu_name
= "440GRX",
1708 .cpu_features
= CPU_FTRS_44X
,
1709 .cpu_user_features
= COMMON_USER_BOOKE
,
1710 .mmu_features
= MMU_FTR_TYPE_44x
,
1713 .cpu_setup
= __setup_cpu_440grx
,
1714 .machine_check
= machine_check_440A
,
1715 .platform
= "ppc440",
1717 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1718 .pvr_mask
= 0xf0000ffb,
1719 .pvr_value
= 0x200008D8,
1720 .cpu_name
= "440EPX",
1721 .cpu_features
= CPU_FTRS_44X
,
1722 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
1723 .mmu_features
= MMU_FTR_TYPE_44x
,
1726 .cpu_setup
= __setup_cpu_440epx
,
1727 .machine_check
= machine_check_440A
,
1728 .platform
= "ppc440",
1730 { /* 440GP Rev. B */
1731 .pvr_mask
= 0xf0000fff,
1732 .pvr_value
= 0x40000440,
1733 .cpu_name
= "440GP Rev. B",
1734 .cpu_features
= CPU_FTRS_44X
,
1735 .cpu_user_features
= COMMON_USER_BOOKE
,
1736 .mmu_features
= MMU_FTR_TYPE_44x
,
1739 .machine_check
= machine_check_4xx
,
1740 .platform
= "ppc440gp",
1742 { /* 440GP Rev. C */
1743 .pvr_mask
= 0xf0000fff,
1744 .pvr_value
= 0x40000481,
1745 .cpu_name
= "440GP Rev. C",
1746 .cpu_features
= CPU_FTRS_44X
,
1747 .cpu_user_features
= COMMON_USER_BOOKE
,
1748 .mmu_features
= MMU_FTR_TYPE_44x
,
1751 .machine_check
= machine_check_4xx
,
1752 .platform
= "ppc440gp",
1754 { /* 440GX Rev. A */
1755 .pvr_mask
= 0xf0000fff,
1756 .pvr_value
= 0x50000850,
1757 .cpu_name
= "440GX Rev. A",
1758 .cpu_features
= CPU_FTRS_44X
,
1759 .cpu_user_features
= COMMON_USER_BOOKE
,
1760 .mmu_features
= MMU_FTR_TYPE_44x
,
1763 .cpu_setup
= __setup_cpu_440gx
,
1764 .machine_check
= machine_check_440A
,
1765 .platform
= "ppc440",
1767 { /* 440GX Rev. B */
1768 .pvr_mask
= 0xf0000fff,
1769 .pvr_value
= 0x50000851,
1770 .cpu_name
= "440GX Rev. B",
1771 .cpu_features
= CPU_FTRS_44X
,
1772 .cpu_user_features
= COMMON_USER_BOOKE
,
1773 .mmu_features
= MMU_FTR_TYPE_44x
,
1776 .cpu_setup
= __setup_cpu_440gx
,
1777 .machine_check
= machine_check_440A
,
1778 .platform
= "ppc440",
1780 { /* 440GX Rev. C */
1781 .pvr_mask
= 0xf0000fff,
1782 .pvr_value
= 0x50000892,
1783 .cpu_name
= "440GX Rev. C",
1784 .cpu_features
= CPU_FTRS_44X
,
1785 .cpu_user_features
= COMMON_USER_BOOKE
,
1786 .mmu_features
= MMU_FTR_TYPE_44x
,
1789 .cpu_setup
= __setup_cpu_440gx
,
1790 .machine_check
= machine_check_440A
,
1791 .platform
= "ppc440",
1793 { /* 440GX Rev. F */
1794 .pvr_mask
= 0xf0000fff,
1795 .pvr_value
= 0x50000894,
1796 .cpu_name
= "440GX Rev. F",
1797 .cpu_features
= CPU_FTRS_44X
,
1798 .cpu_user_features
= COMMON_USER_BOOKE
,
1799 .mmu_features
= MMU_FTR_TYPE_44x
,
1802 .cpu_setup
= __setup_cpu_440gx
,
1803 .machine_check
= machine_check_440A
,
1804 .platform
= "ppc440",
1806 { /* 440SP Rev. A */
1807 .pvr_mask
= 0xfff00fff,
1808 .pvr_value
= 0x53200891,
1809 .cpu_name
= "440SP Rev. A",
1810 .cpu_features
= CPU_FTRS_44X
,
1811 .cpu_user_features
= COMMON_USER_BOOKE
,
1812 .mmu_features
= MMU_FTR_TYPE_44x
,
1815 .machine_check
= machine_check_4xx
,
1816 .platform
= "ppc440",
1818 { /* 440SPe Rev. A */
1819 .pvr_mask
= 0xfff00fff,
1820 .pvr_value
= 0x53400890,
1821 .cpu_name
= "440SPe Rev. A",
1822 .cpu_features
= CPU_FTRS_44X
,
1823 .cpu_user_features
= COMMON_USER_BOOKE
,
1824 .mmu_features
= MMU_FTR_TYPE_44x
,
1827 .cpu_setup
= __setup_cpu_440spe
,
1828 .machine_check
= machine_check_440A
,
1829 .platform
= "ppc440",
1831 { /* 440SPe Rev. B */
1832 .pvr_mask
= 0xfff00fff,
1833 .pvr_value
= 0x53400891,
1834 .cpu_name
= "440SPe Rev. B",
1835 .cpu_features
= CPU_FTRS_44X
,
1836 .cpu_user_features
= COMMON_USER_BOOKE
,
1837 .mmu_features
= MMU_FTR_TYPE_44x
,
1840 .cpu_setup
= __setup_cpu_440spe
,
1841 .machine_check
= machine_check_440A
,
1842 .platform
= "ppc440",
1844 { /* 440 in Xilinx Virtex-5 FXT */
1845 .pvr_mask
= 0xfffffff0,
1846 .pvr_value
= 0x7ff21910,
1847 .cpu_name
= "440 in Virtex-5 FXT",
1848 .cpu_features
= CPU_FTRS_44X
,
1849 .cpu_user_features
= COMMON_USER_BOOKE
,
1850 .mmu_features
= MMU_FTR_TYPE_44x
,
1853 .cpu_setup
= __setup_cpu_440x5
,
1854 .machine_check
= machine_check_440A
,
1855 .platform
= "ppc440",
1858 .pvr_mask
= 0xffff0006,
1859 .pvr_value
= 0x13020002,
1860 .cpu_name
= "460EX",
1861 .cpu_features
= CPU_FTRS_440x6
,
1862 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
1863 .mmu_features
= MMU_FTR_TYPE_44x
,
1866 .cpu_setup
= __setup_cpu_460ex
,
1867 .machine_check
= machine_check_440A
,
1868 .platform
= "ppc440",
1871 .pvr_mask
= 0xffff0007,
1872 .pvr_value
= 0x13020004,
1873 .cpu_name
= "460EX Rev. B",
1874 .cpu_features
= CPU_FTRS_440x6
,
1875 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
1876 .mmu_features
= MMU_FTR_TYPE_44x
,
1879 .cpu_setup
= __setup_cpu_460ex
,
1880 .machine_check
= machine_check_440A
,
1881 .platform
= "ppc440",
1884 .pvr_mask
= 0xffff0006,
1885 .pvr_value
= 0x13020000,
1886 .cpu_name
= "460GT",
1887 .cpu_features
= CPU_FTRS_440x6
,
1888 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
1889 .mmu_features
= MMU_FTR_TYPE_44x
,
1892 .cpu_setup
= __setup_cpu_460gt
,
1893 .machine_check
= machine_check_440A
,
1894 .platform
= "ppc440",
1897 .pvr_mask
= 0xffff0007,
1898 .pvr_value
= 0x13020005,
1899 .cpu_name
= "460GT Rev. B",
1900 .cpu_features
= CPU_FTRS_440x6
,
1901 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
1902 .mmu_features
= MMU_FTR_TYPE_44x
,
1905 .cpu_setup
= __setup_cpu_460gt
,
1906 .machine_check
= machine_check_440A
,
1907 .platform
= "ppc440",
1910 .pvr_mask
= 0xffffff00,
1911 .pvr_value
= 0x13541800,
1912 .cpu_name
= "460SX",
1913 .cpu_features
= CPU_FTRS_44X
,
1914 .cpu_user_features
= COMMON_USER_BOOKE
,
1915 .mmu_features
= MMU_FTR_TYPE_44x
,
1918 .cpu_setup
= __setup_cpu_460sx
,
1919 .machine_check
= machine_check_440A
,
1920 .platform
= "ppc440",
1922 { /* 464 in APM821xx */
1923 .pvr_mask
= 0xfffffff0,
1924 .pvr_value
= 0x12C41C80,
1925 .cpu_name
= "APM821XX",
1926 .cpu_features
= CPU_FTRS_44X
,
1927 .cpu_user_features
= COMMON_USER_BOOKE
|
1928 PPC_FEATURE_HAS_FPU
,
1929 .mmu_features
= MMU_FTR_TYPE_44x
,
1932 .cpu_setup
= __setup_cpu_apm821xx
,
1933 .machine_check
= machine_check_440A
,
1934 .platform
= "ppc440",
1936 { /* 476 DD2 core */
1937 .pvr_mask
= 0xffffffff,
1938 .pvr_value
= 0x11a52080,
1940 .cpu_features
= CPU_FTRS_47X
| CPU_FTR_476_DD2
,
1941 .cpu_user_features
= COMMON_USER_BOOKE
|
1942 PPC_FEATURE_HAS_FPU
,
1943 .mmu_features
= MMU_FTR_TYPE_47x
|
1944 MMU_FTR_USE_TLBIVAX_BCAST
| MMU_FTR_LOCK_BCAST_INVAL
,
1946 .dcache_bsize
= 128,
1947 .machine_check
= machine_check_47x
,
1948 .platform
= "ppc470",
1951 .pvr_mask
= 0xffff0000,
1952 .pvr_value
= 0x7ff50000,
1953 .cpu_name
= "476fpe",
1954 .cpu_features
= CPU_FTRS_47X
| CPU_FTR_476_DD2
,
1955 .cpu_user_features
= COMMON_USER_BOOKE
|
1956 PPC_FEATURE_HAS_FPU
,
1957 .mmu_features
= MMU_FTR_TYPE_47x
|
1958 MMU_FTR_USE_TLBIVAX_BCAST
| MMU_FTR_LOCK_BCAST_INVAL
,
1960 .dcache_bsize
= 128,
1961 .machine_check
= machine_check_47x
,
1962 .platform
= "ppc470",
1965 .pvr_mask
= 0xffff0000,
1966 .pvr_value
= 0x00050000,
1968 .cpu_features
= CPU_FTRS_47X
,
1969 .cpu_user_features
= COMMON_USER_BOOKE
|
1970 PPC_FEATURE_HAS_FPU
,
1971 .mmu_features
= MMU_FTR_TYPE_47x
|
1972 MMU_FTR_USE_TLBIVAX_BCAST
| MMU_FTR_LOCK_BCAST_INVAL
,
1974 .dcache_bsize
= 128,
1975 .machine_check
= machine_check_47x
,
1976 .platform
= "ppc470",
1979 .pvr_mask
= 0xffff0000,
1980 .pvr_value
= 0x11a50000,
1982 .cpu_features
= CPU_FTRS_47X
,
1983 .cpu_user_features
= COMMON_USER_BOOKE
|
1984 PPC_FEATURE_HAS_FPU
,
1985 .mmu_features
= MMU_FTR_TYPE_47x
|
1986 MMU_FTR_USE_TLBIVAX_BCAST
| MMU_FTR_LOCK_BCAST_INVAL
,
1988 .dcache_bsize
= 128,
1989 .machine_check
= machine_check_47x
,
1990 .platform
= "ppc470",
1992 { /* default match */
1993 .pvr_mask
= 0x00000000,
1994 .pvr_value
= 0x00000000,
1995 .cpu_name
= "(generic 44x PPC)",
1996 .cpu_features
= CPU_FTRS_44X
,
1997 .cpu_user_features
= COMMON_USER_BOOKE
,
1998 .mmu_features
= MMU_FTR_TYPE_44x
,
2001 .machine_check
= machine_check_4xx
,
2002 .platform
= "ppc440",
2004 #endif /* CONFIG_44x */
2007 .pvr_mask
= 0xfff00000,
2008 .pvr_value
= 0x81000000,
2009 .cpu_name
= "e200z5",
2010 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2011 .cpu_features
= CPU_FTRS_E200
,
2012 .cpu_user_features
= COMMON_USER_BOOKE
|
2013 PPC_FEATURE_HAS_EFP_SINGLE
|
2014 PPC_FEATURE_UNIFIED_CACHE
,
2015 .mmu_features
= MMU_FTR_TYPE_FSL_E
,
2017 .machine_check
= machine_check_e200
,
2018 .platform
= "ppc5554",
2021 .pvr_mask
= 0xfff00000,
2022 .pvr_value
= 0x81100000,
2023 .cpu_name
= "e200z6",
2024 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2025 .cpu_features
= CPU_FTRS_E200
,
2026 .cpu_user_features
= COMMON_USER_BOOKE
|
2027 PPC_FEATURE_HAS_SPE_COMP
|
2028 PPC_FEATURE_HAS_EFP_SINGLE_COMP
|
2029 PPC_FEATURE_UNIFIED_CACHE
,
2030 .mmu_features
= MMU_FTR_TYPE_FSL_E
,
2032 .machine_check
= machine_check_e200
,
2033 .platform
= "ppc5554",
2035 { /* default match */
2036 .pvr_mask
= 0x00000000,
2037 .pvr_value
= 0x00000000,
2038 .cpu_name
= "(generic E200 PPC)",
2039 .cpu_features
= CPU_FTRS_E200
,
2040 .cpu_user_features
= COMMON_USER_BOOKE
|
2041 PPC_FEATURE_HAS_EFP_SINGLE
|
2042 PPC_FEATURE_UNIFIED_CACHE
,
2043 .mmu_features
= MMU_FTR_TYPE_FSL_E
,
2045 .cpu_setup
= __setup_cpu_e200
,
2046 .machine_check
= machine_check_e200
,
2047 .platform
= "ppc5554",
2049 #endif /* CONFIG_E200 */
2050 #endif /* CONFIG_PPC32 */
2053 #ifndef CONFIG_PPC_E500MC
2055 .pvr_mask
= 0xffff0000,
2056 .pvr_value
= 0x80200000,
2058 .cpu_features
= CPU_FTRS_E500
,
2059 .cpu_user_features
= COMMON_USER_BOOKE
|
2060 PPC_FEATURE_HAS_SPE_COMP
|
2061 PPC_FEATURE_HAS_EFP_SINGLE_COMP
,
2062 .cpu_user_features2
= PPC_FEATURE2_ISEL
,
2063 .mmu_features
= MMU_FTR_TYPE_FSL_E
,
2067 .oprofile_cpu_type
= "ppc/e500",
2068 .oprofile_type
= PPC_OPROFILE_FSL_EMB
,
2069 .cpu_setup
= __setup_cpu_e500v1
,
2070 .machine_check
= machine_check_e500
,
2071 .platform
= "ppc8540",
2074 .pvr_mask
= 0xffff0000,
2075 .pvr_value
= 0x80210000,
2076 .cpu_name
= "e500v2",
2077 .cpu_features
= CPU_FTRS_E500_2
,
2078 .cpu_user_features
= COMMON_USER_BOOKE
|
2079 PPC_FEATURE_HAS_SPE_COMP
|
2080 PPC_FEATURE_HAS_EFP_SINGLE_COMP
|
2081 PPC_FEATURE_HAS_EFP_DOUBLE_COMP
,
2082 .cpu_user_features2
= PPC_FEATURE2_ISEL
,
2083 .mmu_features
= MMU_FTR_TYPE_FSL_E
| MMU_FTR_BIG_PHYS
,
2087 .oprofile_cpu_type
= "ppc/e500",
2088 .oprofile_type
= PPC_OPROFILE_FSL_EMB
,
2089 .cpu_setup
= __setup_cpu_e500v2
,
2090 .machine_check
= machine_check_e500
,
2091 .platform
= "ppc8548",
2092 .cpu_down_flush
= cpu_down_flush_e500v2
,
2096 .pvr_mask
= 0xffff0000,
2097 .pvr_value
= 0x80230000,
2098 .cpu_name
= "e500mc",
2099 .cpu_features
= CPU_FTRS_E500MC
,
2100 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
2101 .cpu_user_features2
= PPC_FEATURE2_ISEL
,
2102 .mmu_features
= MMU_FTR_TYPE_FSL_E
| MMU_FTR_BIG_PHYS
|
2107 .oprofile_cpu_type
= "ppc/e500mc",
2108 .oprofile_type
= PPC_OPROFILE_FSL_EMB
,
2109 .cpu_setup
= __setup_cpu_e500mc
,
2110 .machine_check
= machine_check_e500mc
,
2111 .platform
= "ppce500mc",
2112 .cpu_down_flush
= cpu_down_flush_e500mc
,
2114 #endif /* CONFIG_PPC_E500MC */
2115 #endif /* CONFIG_PPC32 */
2116 #ifdef CONFIG_PPC_E500MC
2118 .pvr_mask
= 0xffff0000,
2119 .pvr_value
= 0x80240000,
2120 .cpu_name
= "e5500",
2121 .cpu_features
= CPU_FTRS_E5500
,
2122 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
,
2123 .cpu_user_features2
= PPC_FEATURE2_ISEL
,
2124 .mmu_features
= MMU_FTR_TYPE_FSL_E
| MMU_FTR_BIG_PHYS
|
2129 .oprofile_cpu_type
= "ppc/e500mc",
2130 .oprofile_type
= PPC_OPROFILE_FSL_EMB
,
2131 .cpu_setup
= __setup_cpu_e5500
,
2132 #ifndef CONFIG_PPC32
2133 .cpu_restore
= __restore_cpu_e5500
,
2135 .machine_check
= machine_check_e500mc
,
2136 .platform
= "ppce5500",
2137 .cpu_down_flush
= cpu_down_flush_e5500
,
2140 .pvr_mask
= 0xffff0000,
2141 .pvr_value
= 0x80400000,
2142 .cpu_name
= "e6500",
2143 .cpu_features
= CPU_FTRS_E6500
,
2144 .cpu_user_features
= COMMON_USER_BOOKE
| PPC_FEATURE_HAS_FPU
|
2145 PPC_FEATURE_HAS_ALTIVEC_COMP
,
2146 .cpu_user_features2
= PPC_FEATURE2_ISEL
,
2147 .mmu_features
= MMU_FTR_TYPE_FSL_E
| MMU_FTR_BIG_PHYS
|
2152 .oprofile_cpu_type
= "ppc/e6500",
2153 .oprofile_type
= PPC_OPROFILE_FSL_EMB
,
2154 .cpu_setup
= __setup_cpu_e6500
,
2155 #ifndef CONFIG_PPC32
2156 .cpu_restore
= __restore_cpu_e6500
,
2158 .machine_check
= machine_check_e500mc
,
2159 .platform
= "ppce6500",
2160 .cpu_down_flush
= cpu_down_flush_e6500
,
2162 #endif /* CONFIG_PPC_E500MC */
2164 { /* default match */
2165 .pvr_mask
= 0x00000000,
2166 .pvr_value
= 0x00000000,
2167 .cpu_name
= "(generic E500 PPC)",
2168 .cpu_features
= CPU_FTRS_E500
,
2169 .cpu_user_features
= COMMON_USER_BOOKE
|
2170 PPC_FEATURE_HAS_SPE_COMP
|
2171 PPC_FEATURE_HAS_EFP_SINGLE_COMP
,
2172 .mmu_features
= MMU_FTR_TYPE_FSL_E
,
2175 .machine_check
= machine_check_e500
,
2176 .platform
= "powerpc",
2178 #endif /* CONFIG_PPC32 */
2179 #endif /* CONFIG_E500 */
2182 static struct cpu_spec the_cpu_spec
;
2184 static struct cpu_spec
* __init
setup_cpu_spec(unsigned long offset
,
2187 struct cpu_spec
*t
= &the_cpu_spec
;
2188 struct cpu_spec old
;
2193 /* Copy everything, then do fixups */
2197 * If we are overriding a previous value derived from the real
2198 * PVR with a new value obtained using a logical PVR value,
2199 * don't modify the performance monitor fields.
2201 if (old
.num_pmcs
&& !s
->num_pmcs
) {
2202 t
->num_pmcs
= old
.num_pmcs
;
2203 t
->pmc_type
= old
.pmc_type
;
2204 t
->oprofile_type
= old
.oprofile_type
;
2205 t
->oprofile_mmcra_sihv
= old
.oprofile_mmcra_sihv
;
2206 t
->oprofile_mmcra_sipr
= old
.oprofile_mmcra_sipr
;
2207 t
->oprofile_mmcra_clear
= old
.oprofile_mmcra_clear
;
2210 * If we have passed through this logic once before and
2211 * have pulled the default case because the real PVR was
2212 * not found inside cpu_specs[], then we are possibly
2213 * running in compatibility mode. In that case, let the
2214 * oprofiler know which set of compatibility counters to
2215 * pull from by making sure the oprofile_cpu_type string
2216 * is set to that of compatibility mode. If the
2217 * oprofile_cpu_type already has a value, then we are
2218 * possibly overriding a real PVR with a logical one,
2219 * and, in that case, keep the current value for
2220 * oprofile_cpu_type.
2222 if (old
.oprofile_cpu_type
!= NULL
) {
2223 t
->oprofile_cpu_type
= old
.oprofile_cpu_type
;
2224 t
->oprofile_type
= old
.oprofile_type
;
2228 *PTRRELOC(&cur_cpu_spec
) = &the_cpu_spec
;
2231 * Set the base platform string once; assumes
2232 * we're called with real pvr first.
2234 if (*PTRRELOC(&powerpc_base_platform
) == NULL
)
2235 *PTRRELOC(&powerpc_base_platform
) = t
->platform
;
2237 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2238 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2239 * that processor. I will consolidate that at a later time, for now,
2240 * just use #ifdef. We also don't need to PTRRELOC the function
2241 * pointer on ppc64 and booke as we are running at 0 in real mode
2242 * on ppc64 and reloc_offset is always 0 on booke.
2245 t
->cpu_setup(offset
, t
);
2247 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2252 struct cpu_spec
* __init
identify_cpu(unsigned long offset
, unsigned int pvr
)
2254 struct cpu_spec
*s
= cpu_specs
;
2259 for (i
= 0; i
< ARRAY_SIZE(cpu_specs
); i
++,s
++) {
2260 if ((pvr
& s
->pvr_mask
) == s
->pvr_value
)
2261 return setup_cpu_spec(offset
, s
);
2269 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
2270 struct static_key_true cpu_feature_keys
[NUM_CPU_FTR_KEYS
] = {
2271 [0 ... NUM_CPU_FTR_KEYS
- 1] = STATIC_KEY_TRUE_INIT
2273 EXPORT_SYMBOL_GPL(cpu_feature_keys
);
2275 void __init
cpu_feature_keys_init(void)
2279 for (i
= 0; i
< NUM_CPU_FTR_KEYS
; i
++) {
2280 unsigned long f
= 1ul << i
;
2282 if (!(cur_cpu_spec
->cpu_features
& f
))
2283 static_branch_disable(&cpu_feature_keys
[i
]);
2287 struct static_key_true mmu_feature_keys
[NUM_MMU_FTR_KEYS
] = {
2288 [0 ... NUM_MMU_FTR_KEYS
- 1] = STATIC_KEY_TRUE_INIT
2290 EXPORT_SYMBOL_GPL(mmu_feature_keys
);
2292 void __init
mmu_feature_keys_init(void)
2296 for (i
= 0; i
< NUM_MMU_FTR_KEYS
; i
++) {
2297 unsigned long f
= 1ul << i
;
2299 if (!(cur_cpu_spec
->mmu_features
& f
))
2300 static_branch_disable(&mmu_feature_keys
[i
]);