2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/debugfs.h>
26 #include <linux/sched.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/pci.h>
30 #include <linux/iommu.h>
31 #include <linux/proc_fs.h>
32 #include <linux/rbtree.h>
33 #include <linux/reboot.h>
34 #include <linux/seq_file.h>
35 #include <linux/spinlock.h>
36 #include <linux/export.h>
39 #include <linux/atomic.h>
40 #include <asm/debug.h>
42 #include <asm/eeh_event.h>
44 #include <asm/iommu.h>
45 #include <asm/machdep.h>
46 #include <asm/ppc-pci.h>
51 * EEH, or "Enhanced Error Handling" is a PCI bridge technology for
52 * dealing with PCI bus errors that can't be dealt with within the
53 * usual PCI framework, except by check-stopping the CPU. Systems
54 * that are designed for high-availability/reliability cannot afford
55 * to crash due to a "mere" PCI error, thus the need for EEH.
56 * An EEH-capable bridge operates by converting a detected error
57 * into a "slot freeze", taking the PCI adapter off-line, making
58 * the slot behave, from the OS'es point of view, as if the slot
59 * were "empty": all reads return 0xff's and all writes are silently
60 * ignored. EEH slot isolation events can be triggered by parity
61 * errors on the address or data busses (e.g. during posted writes),
62 * which in turn might be caused by low voltage on the bus, dust,
63 * vibration, humidity, radioactivity or plain-old failed hardware.
65 * Note, however, that one of the leading causes of EEH slot
66 * freeze events are buggy device drivers, buggy device microcode,
67 * or buggy device hardware. This is because any attempt by the
68 * device to bus-master data to a memory address that is not
69 * assigned to the device will trigger a slot freeze. (The idea
70 * is to prevent devices-gone-wild from corrupting system memory).
71 * Buggy hardware/drivers will have a miserable time co-existing
74 * Ideally, a PCI device driver, when suspecting that an isolation
75 * event has occurred (e.g. by reading 0xff's), will then ask EEH
76 * whether this is the case, and then take appropriate steps to
77 * reset the PCI slot, the PCI device, and then resume operations.
78 * However, until that day, the checking is done here, with the
79 * eeh_check_failure() routine embedded in the MMIO macros. If
80 * the slot is found to be isolated, an "EEH Event" is synthesized
81 * and sent out for processing.
84 /* If a device driver keeps reading an MMIO register in an interrupt
85 * handler after a slot isolation event, it might be broken.
86 * This sets the threshold for how many read attempts we allow
87 * before printing an error message.
89 #define EEH_MAX_FAILS 2100000
91 /* Time to wait for a PCI slot to report status, in milliseconds */
92 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
95 * EEH probe mode support, which is part of the flags,
96 * is to support multiple platforms for EEH. Some platforms
97 * like pSeries do PCI emunation based on device tree.
98 * However, other platforms like powernv probe PCI devices
99 * from hardware. The flag is used to distinguish that.
100 * In addition, struct eeh_ops::probe would be invoked for
101 * particular OF node or PCI device so that the corresponding
102 * PE would be created there.
104 int eeh_subsystem_flags
;
105 EXPORT_SYMBOL(eeh_subsystem_flags
);
108 * EEH allowed maximal frozen times. If one particular PE's
109 * frozen count in last hour exceeds this limit, the PE will
110 * be forced to be offline permanently.
112 int eeh_max_freezes
= 5;
114 /* Platform dependent EEH operations */
115 struct eeh_ops
*eeh_ops
= NULL
;
117 /* Lock to avoid races due to multiple reports of an error */
118 DEFINE_RAW_SPINLOCK(confirm_error_lock
);
119 EXPORT_SYMBOL_GPL(confirm_error_lock
);
121 /* Lock to protect passed flags */
122 static DEFINE_MUTEX(eeh_dev_mutex
);
124 /* Buffer for reporting pci register dumps. Its here in BSS, and
125 * not dynamically alloced, so that it ends up in RMO where RTAS
128 #define EEH_PCI_REGS_LOG_LEN 8192
129 static unsigned char pci_regs_buf
[EEH_PCI_REGS_LOG_LEN
];
132 * The struct is used to maintain the EEH global statistic
133 * information. Besides, the EEH global statistics will be
134 * exported to user space through procfs
137 u64 no_device
; /* PCI device not found */
138 u64 no_dn
; /* OF node not found */
139 u64 no_cfg_addr
; /* Config address not found */
140 u64 ignored_check
; /* EEH check skipped */
141 u64 total_mmio_ffs
; /* Total EEH checks */
142 u64 false_positives
; /* Unnecessary EEH checks */
143 u64 slot_resets
; /* PE reset */
146 static struct eeh_stats eeh_stats
;
148 static int __init
eeh_setup(char *str
)
150 if (!strcmp(str
, "off"))
151 eeh_add_flag(EEH_FORCE_DISABLED
);
152 else if (!strcmp(str
, "early_log"))
153 eeh_add_flag(EEH_EARLY_DUMP_LOG
);
157 __setup("eeh=", eeh_setup
);
160 * This routine captures assorted PCI configuration space data
161 * for the indicated PCI device, and puts them into a buffer
162 * for RTAS error logging.
164 static size_t eeh_dump_dev_log(struct eeh_dev
*edev
, char *buf
, size_t len
)
166 struct pci_dn
*pdn
= eeh_dev_to_pdn(edev
);
172 n
+= scnprintf(buf
+n
, len
-n
, "%04x:%02x:%02x.%01x\n",
173 edev
->phb
->global_number
, pdn
->busno
,
174 PCI_SLOT(pdn
->devfn
), PCI_FUNC(pdn
->devfn
));
175 pr_warn("EEH: of node=%04x:%02x:%02x.%01x\n",
176 edev
->phb
->global_number
, pdn
->busno
,
177 PCI_SLOT(pdn
->devfn
), PCI_FUNC(pdn
->devfn
));
179 eeh_ops
->read_config(pdn
, PCI_VENDOR_ID
, 4, &cfg
);
180 n
+= scnprintf(buf
+n
, len
-n
, "dev/vend:%08x\n", cfg
);
181 pr_warn("EEH: PCI device/vendor: %08x\n", cfg
);
183 eeh_ops
->read_config(pdn
, PCI_COMMAND
, 4, &cfg
);
184 n
+= scnprintf(buf
+n
, len
-n
, "cmd/stat:%x\n", cfg
);
185 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg
);
187 /* Gather bridge-specific registers */
188 if (edev
->mode
& EEH_DEV_BRIDGE
) {
189 eeh_ops
->read_config(pdn
, PCI_SEC_STATUS
, 2, &cfg
);
190 n
+= scnprintf(buf
+n
, len
-n
, "sec stat:%x\n", cfg
);
191 pr_warn("EEH: Bridge secondary status: %04x\n", cfg
);
193 eeh_ops
->read_config(pdn
, PCI_BRIDGE_CONTROL
, 2, &cfg
);
194 n
+= scnprintf(buf
+n
, len
-n
, "brdg ctl:%x\n", cfg
);
195 pr_warn("EEH: Bridge control: %04x\n", cfg
);
198 /* Dump out the PCI-X command and status regs */
199 cap
= edev
->pcix_cap
;
201 eeh_ops
->read_config(pdn
, cap
, 4, &cfg
);
202 n
+= scnprintf(buf
+n
, len
-n
, "pcix-cmd:%x\n", cfg
);
203 pr_warn("EEH: PCI-X cmd: %08x\n", cfg
);
205 eeh_ops
->read_config(pdn
, cap
+4, 4, &cfg
);
206 n
+= scnprintf(buf
+n
, len
-n
, "pcix-stat:%x\n", cfg
);
207 pr_warn("EEH: PCI-X status: %08x\n", cfg
);
210 /* If PCI-E capable, dump PCI-E cap 10 */
211 cap
= edev
->pcie_cap
;
213 n
+= scnprintf(buf
+n
, len
-n
, "pci-e cap10:\n");
214 pr_warn("EEH: PCI-E capabilities and status follow:\n");
216 for (i
=0; i
<=8; i
++) {
217 eeh_ops
->read_config(pdn
, cap
+4*i
, 4, &cfg
);
218 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
222 pr_warn("%s\n", buffer
);
224 l
= scnprintf(buffer
, sizeof(buffer
),
225 "EEH: PCI-E %02x: %08x ",
228 l
+= scnprintf(buffer
+l
, sizeof(buffer
)-l
,
234 pr_warn("%s\n", buffer
);
237 /* If AER capable, dump it */
240 n
+= scnprintf(buf
+n
, len
-n
, "pci-e AER:\n");
241 pr_warn("EEH: PCI-E AER capability register set follows:\n");
243 for (i
=0; i
<=13; i
++) {
244 eeh_ops
->read_config(pdn
, cap
+4*i
, 4, &cfg
);
245 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
249 pr_warn("%s\n", buffer
);
251 l
= scnprintf(buffer
, sizeof(buffer
),
252 "EEH: PCI-E AER %02x: %08x ",
255 l
+= scnprintf(buffer
+l
, sizeof(buffer
)-l
,
260 pr_warn("%s\n", buffer
);
266 static void *eeh_dump_pe_log(void *data
, void *flag
)
268 struct eeh_pe
*pe
= data
;
269 struct eeh_dev
*edev
, *tmp
;
272 eeh_pe_for_each_dev(pe
, edev
, tmp
)
273 *plen
+= eeh_dump_dev_log(edev
, pci_regs_buf
+ *plen
,
274 EEH_PCI_REGS_LOG_LEN
- *plen
);
280 * eeh_slot_error_detail - Generate combined log including driver log and error log
282 * @severity: temporary or permanent error log
284 * This routine should be called to generate the combined log, which
285 * is comprised of driver log and error log. The driver log is figured
286 * out from the config space of the corresponding PCI device, while
287 * the error log is fetched through platform dependent function call.
289 void eeh_slot_error_detail(struct eeh_pe
*pe
, int severity
)
294 * When the PHB is fenced or dead, it's pointless to collect
295 * the data from PCI config space because it should return
296 * 0xFF's. For ER, we still retrieve the data from the PCI
299 * For pHyp, we have to enable IO for log retrieval. Otherwise,
300 * 0xFF's is always returned from PCI config space.
302 if (!(pe
->type
& EEH_PE_PHB
)) {
303 if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG
))
304 eeh_pci_enable(pe
, EEH_OPT_THAW_MMIO
);
307 * The config space of some PCI devices can't be accessed
308 * when their PEs are in frozen state. Otherwise, fenced
309 * PHB might be seen. Those PEs are identified with flag
310 * EEH_PE_CFG_RESTRICTED, indicating EEH_PE_CFG_BLOCKED
311 * is set automatically when the PE is put to EEH_PE_ISOLATED.
313 * Restoring BARs possibly triggers PCI config access in
314 * (OPAL) firmware and then causes fenced PHB. If the
315 * PCI config is blocked with flag EEH_PE_CFG_BLOCKED, it's
316 * pointless to restore BARs and dump config space.
318 eeh_ops
->configure_bridge(pe
);
319 if (!(pe
->state
& EEH_PE_CFG_BLOCKED
)) {
320 eeh_pe_restore_bars(pe
);
323 eeh_pe_traverse(pe
, eeh_dump_pe_log
, &loglen
);
327 eeh_ops
->get_log(pe
, severity
, pci_regs_buf
, loglen
);
331 * eeh_token_to_phys - Convert EEH address token to phys address
332 * @token: I/O token, should be address in the form 0xA....
334 * This routine should be called to convert virtual I/O address
337 static inline unsigned long eeh_token_to_phys(unsigned long token
)
344 * We won't find hugepages here(this is iomem). Hence we are not
345 * worried about _PAGE_SPLITTING/collapse. Also we will not hit
346 * page table free, because of init_mm.
348 ptep
= __find_linux_pte_or_hugepte(init_mm
.pgd
, token
,
349 NULL
, &hugepage_shift
);
352 WARN_ON(hugepage_shift
);
353 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
355 return pa
| (token
& (PAGE_SIZE
-1));
359 * On PowerNV platform, we might already have fenced PHB there.
360 * For that case, it's meaningless to recover frozen PE. Intead,
361 * We have to handle fenced PHB firstly.
363 static int eeh_phb_check_failure(struct eeh_pe
*pe
)
365 struct eeh_pe
*phb_pe
;
369 if (!eeh_has_flag(EEH_PROBE_MODE_DEV
))
372 /* Find the PHB PE */
373 phb_pe
= eeh_phb_pe_get(pe
->phb
);
375 pr_warn("%s Can't find PE for PHB#%x\n",
376 __func__
, pe
->phb
->global_number
);
380 /* If the PHB has been in problematic state */
381 eeh_serialize_lock(&flags
);
382 if (phb_pe
->state
& EEH_PE_ISOLATED
) {
387 /* Check PHB state */
388 ret
= eeh_ops
->get_state(phb_pe
, NULL
);
390 (ret
== EEH_STATE_NOT_SUPPORT
) ||
391 (ret
& (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
)) ==
392 (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
)) {
397 /* Isolate the PHB and send event */
398 eeh_pe_state_mark(phb_pe
, EEH_PE_ISOLATED
);
399 eeh_serialize_unlock(flags
);
401 pr_err("EEH: PHB#%x failure detected, location: %s\n",
402 phb_pe
->phb
->global_number
, eeh_pe_loc_get(phb_pe
));
404 eeh_send_failure_event(phb_pe
);
408 eeh_serialize_unlock(flags
);
413 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
416 * Check for an EEH failure for the given device node. Call this
417 * routine if the result of a read was all 0xff's and you want to
418 * find out if this is due to an EEH slot freeze. This routine
419 * will query firmware for the EEH status.
421 * Returns 0 if there has not been an EEH error; otherwise returns
422 * a non-zero value and queues up a slot isolation event notification.
424 * It is safe to call this routine in an interrupt context.
426 int eeh_dev_check_failure(struct eeh_dev
*edev
)
429 int active_flags
= (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
);
433 struct eeh_pe
*pe
, *parent_pe
, *phb_pe
;
435 const char *location
= NULL
;
437 eeh_stats
.total_mmio_ffs
++;
446 dev
= eeh_dev_to_pci_dev(edev
);
447 pe
= eeh_dev_to_pe(edev
);
449 /* Access to IO BARs might get this far and still not want checking. */
451 eeh_stats
.ignored_check
++;
452 pr_debug("EEH: Ignored check for %s\n",
457 if (!pe
->addr
&& !pe
->config_addr
) {
458 eeh_stats
.no_cfg_addr
++;
463 * On PowerNV platform, we might already have fenced PHB
464 * there and we need take care of that firstly.
466 ret
= eeh_phb_check_failure(pe
);
471 * If the PE isn't owned by us, we shouldn't check the
472 * state. Instead, let the owner handle it if the PE has
475 if (eeh_pe_passed(pe
))
478 /* If we already have a pending isolation event for this
479 * slot, we know it's bad already, we don't need to check.
480 * Do this checking under a lock; as multiple PCI devices
481 * in one slot might report errors simultaneously, and we
482 * only want one error recovery routine running.
484 eeh_serialize_lock(&flags
);
486 if (pe
->state
& EEH_PE_ISOLATED
) {
488 if (pe
->check_count
% EEH_MAX_FAILS
== 0) {
489 pdn
= eeh_dev_to_pdn(edev
);
491 location
= of_get_property(pdn
->node
, "ibm,loc-code", NULL
);
492 printk(KERN_ERR
"EEH: %d reads ignored for recovering device at "
493 "location=%s driver=%s pci addr=%s\n",
495 location
? location
: "unknown",
496 eeh_driver_name(dev
), eeh_pci_name(dev
));
497 printk(KERN_ERR
"EEH: Might be infinite loop in %s driver\n",
498 eeh_driver_name(dev
));
505 * Now test for an EEH failure. This is VERY expensive.
506 * Note that the eeh_config_addr may be a parent device
507 * in the case of a device behind a bridge, or it may be
508 * function zero of a multi-function device.
509 * In any case they must share a common PHB.
511 ret
= eeh_ops
->get_state(pe
, NULL
);
513 /* Note that config-io to empty slots may fail;
514 * they are empty when they don't have children.
515 * We will punt with the following conditions: Failure to get
516 * PE's state, EEH not support and Permanently unavailable
517 * state, PE is in good state.
520 (ret
== EEH_STATE_NOT_SUPPORT
) ||
521 ((ret
& active_flags
) == active_flags
)) {
522 eeh_stats
.false_positives
++;
523 pe
->false_positives
++;
529 * It should be corner case that the parent PE has been
530 * put into frozen state as well. We should take care
533 parent_pe
= pe
->parent
;
535 /* Hit the ceiling ? */
536 if (parent_pe
->type
& EEH_PE_PHB
)
539 /* Frozen parent PE ? */
540 ret
= eeh_ops
->get_state(parent_pe
, NULL
);
542 (ret
& active_flags
) != active_flags
)
545 /* Next parent level */
546 parent_pe
= parent_pe
->parent
;
549 eeh_stats
.slot_resets
++;
551 /* Avoid repeated reports of this failure, including problems
552 * with other functions on this device, and functions under
555 eeh_pe_state_mark(pe
, EEH_PE_ISOLATED
);
556 eeh_serialize_unlock(flags
);
558 /* Most EEH events are due to device driver bugs. Having
559 * a stack trace will help the device-driver authors figure
560 * out what happened. So print that out.
562 phb_pe
= eeh_phb_pe_get(pe
->phb
);
563 pr_err("EEH: Frozen PHB#%x-PE#%x detected\n",
564 pe
->phb
->global_number
, pe
->addr
);
565 pr_err("EEH: PE location: %s, PHB location: %s\n",
566 eeh_pe_loc_get(pe
), eeh_pe_loc_get(phb_pe
));
569 eeh_send_failure_event(pe
);
574 eeh_serialize_unlock(flags
);
578 EXPORT_SYMBOL_GPL(eeh_dev_check_failure
);
581 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
582 * @token: I/O address
584 * Check for an EEH failure at the given I/O address. Call this
585 * routine if the result of a read was all 0xff's and you want to
586 * find out if this is due to an EEH slot freeze event. This routine
587 * will query firmware for the EEH status.
589 * Note this routine is safe to call in an interrupt context.
591 int eeh_check_failure(const volatile void __iomem
*token
)
594 struct eeh_dev
*edev
;
596 /* Finding the phys addr + pci device; this is pretty quick. */
597 addr
= eeh_token_to_phys((unsigned long __force
) token
);
598 edev
= eeh_addr_cache_get_dev(addr
);
600 eeh_stats
.no_device
++;
604 return eeh_dev_check_failure(edev
);
606 EXPORT_SYMBOL(eeh_check_failure
);
610 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
613 * This routine should be called to reenable frozen MMIO or DMA
614 * so that it would work correctly again. It's useful while doing
615 * recovery or log collection on the indicated device.
617 int eeh_pci_enable(struct eeh_pe
*pe
, int function
)
622 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
623 * Also, it's pointless to enable them on unfrozen PE. So
624 * we have to check before enabling IO or DMA.
627 case EEH_OPT_THAW_MMIO
:
628 active_flag
= EEH_STATE_MMIO_ACTIVE
| EEH_STATE_MMIO_ENABLED
;
630 case EEH_OPT_THAW_DMA
:
631 active_flag
= EEH_STATE_DMA_ACTIVE
;
633 case EEH_OPT_DISABLE
:
635 case EEH_OPT_FREEZE_PE
:
639 pr_warn("%s: Invalid function %d\n",
645 * Check if IO or DMA has been enabled before
649 rc
= eeh_ops
->get_state(pe
, NULL
);
653 /* Needn't enable it at all */
654 if (rc
== EEH_STATE_NOT_SUPPORT
)
657 /* It's already enabled */
658 if (rc
& active_flag
)
663 /* Issue the request */
664 rc
= eeh_ops
->set_option(pe
, function
);
666 pr_warn("%s: Unexpected state change %d on "
667 "PHB#%x-PE#%x, err=%d\n",
668 __func__
, function
, pe
->phb
->global_number
,
671 /* Check if the request is finished successfully */
673 rc
= eeh_ops
->wait_state(pe
, PCI_BUS_RESET_WAIT_MSEC
);
677 if (rc
& active_flag
)
686 static void *eeh_disable_and_save_dev_state(void *data
, void *userdata
)
688 struct eeh_dev
*edev
= data
;
689 struct pci_dev
*pdev
= eeh_dev_to_pci_dev(edev
);
690 struct pci_dev
*dev
= userdata
;
693 * The caller should have disabled and saved the
694 * state for the specified device
696 if (!pdev
|| pdev
== dev
)
699 /* Ensure we have D0 power state */
700 pci_set_power_state(pdev
, PCI_D0
);
702 /* Save device state */
703 pci_save_state(pdev
);
706 * Disable device to avoid any DMA traffic and
707 * interrupt from the device
709 pci_write_config_word(pdev
, PCI_COMMAND
, PCI_COMMAND_INTX_DISABLE
);
714 static void *eeh_restore_dev_state(void *data
, void *userdata
)
716 struct eeh_dev
*edev
= data
;
717 struct pci_dn
*pdn
= eeh_dev_to_pdn(edev
);
718 struct pci_dev
*pdev
= eeh_dev_to_pci_dev(edev
);
719 struct pci_dev
*dev
= userdata
;
724 /* Apply customization from firmware */
725 if (pdn
&& eeh_ops
->restore_config
)
726 eeh_ops
->restore_config(pdn
);
728 /* The caller should restore state for the specified device */
730 pci_restore_state(pdev
);
736 * pcibios_set_pcie_reset_state - Set PCI-E reset state
737 * @dev: pci device struct
738 * @state: reset state to enter
743 int pcibios_set_pcie_reset_state(struct pci_dev
*dev
, enum pcie_reset_state state
)
745 struct eeh_dev
*edev
= pci_dev_to_eeh_dev(dev
);
746 struct eeh_pe
*pe
= eeh_dev_to_pe(edev
);
749 pr_err("%s: No PE found on PCI device %s\n",
750 __func__
, pci_name(dev
));
755 case pcie_deassert_reset
:
756 eeh_ops
->reset(pe
, EEH_RESET_DEACTIVATE
);
757 eeh_unfreeze_pe(pe
, false);
758 if (!(pe
->type
& EEH_PE_VF
))
759 eeh_pe_state_clear(pe
, EEH_PE_CFG_BLOCKED
);
760 eeh_pe_dev_traverse(pe
, eeh_restore_dev_state
, dev
);
761 eeh_pe_state_clear(pe
, EEH_PE_ISOLATED
);
764 eeh_pe_state_mark_with_cfg(pe
, EEH_PE_ISOLATED
);
765 eeh_ops
->set_option(pe
, EEH_OPT_FREEZE_PE
);
766 eeh_pe_dev_traverse(pe
, eeh_disable_and_save_dev_state
, dev
);
767 if (!(pe
->type
& EEH_PE_VF
))
768 eeh_pe_state_mark(pe
, EEH_PE_CFG_BLOCKED
);
769 eeh_ops
->reset(pe
, EEH_RESET_HOT
);
771 case pcie_warm_reset
:
772 eeh_pe_state_mark_with_cfg(pe
, EEH_PE_ISOLATED
);
773 eeh_ops
->set_option(pe
, EEH_OPT_FREEZE_PE
);
774 eeh_pe_dev_traverse(pe
, eeh_disable_and_save_dev_state
, dev
);
775 if (!(pe
->type
& EEH_PE_VF
))
776 eeh_pe_state_mark(pe
, EEH_PE_CFG_BLOCKED
);
777 eeh_ops
->reset(pe
, EEH_RESET_FUNDAMENTAL
);
780 eeh_pe_state_clear(pe
, EEH_PE_ISOLATED
| EEH_PE_CFG_BLOCKED
);
788 * eeh_set_pe_freset - Check the required reset for the indicated device
790 * @flag: return value
792 * Each device might have its preferred reset type: fundamental or
793 * hot reset. The routine is used to collected the information for
794 * the indicated device and its children so that the bunch of the
795 * devices could be reset properly.
797 static void *eeh_set_dev_freset(void *data
, void *flag
)
800 unsigned int *freset
= (unsigned int *)flag
;
801 struct eeh_dev
*edev
= (struct eeh_dev
*)data
;
803 dev
= eeh_dev_to_pci_dev(edev
);
805 *freset
|= dev
->needs_freset
;
811 * eeh_pe_reset_full - Complete a full reset process on the indicated PE
814 * This function executes a full reset procedure on a PE, including setting
815 * the appropriate flags, performing a fundamental or hot reset, and then
816 * deactivating the reset status. It is designed to be used within the EEH
817 * subsystem, as opposed to eeh_pe_reset which is exported to drivers and
818 * only performs a single operation at a time.
820 * This function will attempt to reset a PE three times before failing.
822 int eeh_pe_reset_full(struct eeh_pe
*pe
)
824 int active_flags
= (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
);
825 int reset_state
= (EEH_PE_RESET
| EEH_PE_CFG_BLOCKED
);
826 int type
= EEH_RESET_HOT
;
827 unsigned int freset
= 0;
831 * Determine the type of reset to perform - hot or fundamental.
832 * Hot reset is the default operation, unless any device under the
833 * PE requires a fundamental reset.
835 eeh_pe_dev_traverse(pe
, eeh_set_dev_freset
, &freset
);
838 type
= EEH_RESET_FUNDAMENTAL
;
840 /* Mark the PE as in reset state and block config space accesses */
841 eeh_pe_state_mark(pe
, reset_state
);
843 /* Make three attempts at resetting the bus */
844 for (i
= 0; i
< 3; i
++) {
845 ret
= eeh_pe_reset(pe
, type
);
849 ret
= eeh_pe_reset(pe
, EEH_RESET_DEACTIVATE
);
853 /* Wait until the PE is in a functioning state */
854 state
= eeh_ops
->wait_state(pe
, PCI_BUS_RESET_WAIT_MSEC
);
855 if ((state
& active_flags
) == active_flags
)
859 pr_warn("%s: Unrecoverable slot failure on PHB#%x-PE#%x",
860 __func__
, pe
->phb
->global_number
, pe
->addr
);
861 ret
= -ENOTRECOVERABLE
;
865 /* Set error in case this is our last attempt */
867 pr_warn("%s: Failure %d resetting PHB#%x-PE#%x\n (%d)\n",
868 __func__
, state
, pe
->phb
->global_number
, pe
->addr
, (i
+ 1));
871 eeh_pe_state_clear(pe
, reset_state
);
876 * eeh_save_bars - Save device bars
877 * @edev: PCI device associated EEH device
879 * Save the values of the device bars. Unlike the restore
880 * routine, this routine is *not* recursive. This is because
881 * PCI devices are added individually; but, for the restore,
882 * an entire slot is reset at a time.
884 void eeh_save_bars(struct eeh_dev
*edev
)
889 pdn
= eeh_dev_to_pdn(edev
);
893 for (i
= 0; i
< 16; i
++)
894 eeh_ops
->read_config(pdn
, i
* 4, 4, &edev
->config_space
[i
]);
897 * For PCI bridges including root port, we need enable bus
898 * master explicitly. Otherwise, it can't fetch IODA table
899 * entries correctly. So we cache the bit in advance so that
900 * we can restore it after reset, either PHB range or PE range.
902 if (edev
->mode
& EEH_DEV_BRIDGE
)
903 edev
->config_space
[1] |= PCI_COMMAND_MASTER
;
907 * eeh_ops_register - Register platform dependent EEH operations
908 * @ops: platform dependent EEH operations
910 * Register the platform dependent EEH operation callback
911 * functions. The platform should call this function before
912 * any other EEH operations.
914 int __init
eeh_ops_register(struct eeh_ops
*ops
)
917 pr_warn("%s: Invalid EEH ops name for %p\n",
922 if (eeh_ops
&& eeh_ops
!= ops
) {
923 pr_warn("%s: EEH ops of platform %s already existing (%s)\n",
924 __func__
, eeh_ops
->name
, ops
->name
);
934 * eeh_ops_unregister - Unreigster platform dependent EEH operations
935 * @name: name of EEH platform operations
937 * Unregister the platform dependent EEH operation callback
940 int __exit
eeh_ops_unregister(const char *name
)
942 if (!name
|| !strlen(name
)) {
943 pr_warn("%s: Invalid EEH ops name\n",
948 if (eeh_ops
&& !strcmp(eeh_ops
->name
, name
)) {
956 static int eeh_reboot_notifier(struct notifier_block
*nb
,
957 unsigned long action
, void *unused
)
959 eeh_clear_flag(EEH_ENABLED
);
963 static struct notifier_block eeh_reboot_nb
= {
964 .notifier_call
= eeh_reboot_notifier
,
968 * eeh_init - EEH initialization
970 * Initialize EEH by trying to enable it for all of the adapters in the system.
971 * As a side effect we can determine here if eeh is supported at all.
972 * Note that we leave EEH on so failed config cycles won't cause a machine
973 * check. If a user turns off EEH for a particular adapter they are really
974 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
975 * grant access to a slot if EEH isn't enabled, and so we always enable
976 * EEH for all slots/all devices.
978 * The eeh-force-off option disables EEH checking globally, for all slots.
979 * Even if force-off is set, the EEH hardware is still enabled, so that
980 * newer systems can boot.
984 struct pci_controller
*hose
, *tmp
;
990 * We have to delay the initialization on PowerNV after
991 * the PCI hierarchy tree has been built because the PEs
992 * are figured out based on PCI devices instead of device
995 if (machine_is(powernv
) && cnt
++ <= 0)
998 /* Register reboot notifier */
999 ret
= register_reboot_notifier(&eeh_reboot_nb
);
1001 pr_warn("%s: Failed to register notifier (%d)\n",
1006 /* call platform initialization function */
1008 pr_warn("%s: Platform EEH operation not found\n",
1011 } else if ((ret
= eeh_ops
->init()))
1014 /* Initialize EEH event */
1015 ret
= eeh_event_init();
1019 /* Enable EEH for all adapters */
1020 list_for_each_entry_safe(hose
, tmp
, &hose_list
, list_node
) {
1021 pdn
= hose
->pci_data
;
1022 traverse_pci_dn(pdn
, eeh_ops
->probe
, NULL
);
1026 * Call platform post-initialization. Actually, It's good chance
1027 * to inform platform that EEH is ready to supply service if the
1028 * I/O cache stuff has been built up.
1030 if (eeh_ops
->post_init
) {
1031 ret
= eeh_ops
->post_init();
1037 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
1039 pr_info("EEH: No capable adapters found\n");
1044 core_initcall_sync(eeh_init
);
1047 * eeh_add_device_early - Enable EEH for the indicated device node
1048 * @pdn: PCI device node for which to set up EEH
1050 * This routine must be used to perform EEH initialization for PCI
1051 * devices that were added after system boot (e.g. hotplug, dlpar).
1052 * This routine must be called before any i/o is performed to the
1053 * adapter (inluding any config-space i/o).
1054 * Whether this actually enables EEH or not for this device depends
1055 * on the CEC architecture, type of the device, on earlier boot
1056 * command-line arguments & etc.
1058 void eeh_add_device_early(struct pci_dn
*pdn
)
1060 struct pci_controller
*phb
;
1061 struct eeh_dev
*edev
= pdn_to_eeh_dev(pdn
);
1066 if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE
))
1069 /* USB Bus children of PCI devices will not have BUID's */
1072 (eeh_has_flag(EEH_PROBE_MODE_DEVTREE
) && 0 == phb
->buid
))
1075 eeh_ops
->probe(pdn
, NULL
);
1079 * eeh_add_device_tree_early - Enable EEH for the indicated device
1080 * @pdn: PCI device node
1082 * This routine must be used to perform EEH initialization for the
1083 * indicated PCI device that was added after system boot (e.g.
1086 void eeh_add_device_tree_early(struct pci_dn
*pdn
)
1093 list_for_each_entry(n
, &pdn
->child_list
, list
)
1094 eeh_add_device_tree_early(n
);
1095 eeh_add_device_early(pdn
);
1097 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
1100 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
1101 * @dev: pci device for which to set up EEH
1103 * This routine must be used to complete EEH initialization for PCI
1104 * devices that were added after system boot (e.g. hotplug, dlpar).
1106 void eeh_add_device_late(struct pci_dev
*dev
)
1109 struct eeh_dev
*edev
;
1111 if (!dev
|| !eeh_enabled())
1114 pr_debug("EEH: Adding device %s\n", pci_name(dev
));
1116 pdn
= pci_get_pdn_by_devfn(dev
->bus
, dev
->devfn
);
1117 edev
= pdn_to_eeh_dev(pdn
);
1118 if (edev
->pdev
== dev
) {
1119 pr_debug("EEH: Already referenced !\n");
1124 * The EEH cache might not be removed correctly because of
1125 * unbalanced kref to the device during unplug time, which
1126 * relies on pcibios_release_device(). So we have to remove
1127 * that here explicitly.
1130 eeh_rmv_from_parent_pe(edev
);
1131 eeh_addr_cache_rmv_dev(edev
->pdev
);
1132 eeh_sysfs_remove_device(edev
->pdev
);
1133 edev
->mode
&= ~EEH_DEV_SYSFS
;
1136 * We definitely should have the PCI device removed
1137 * though it wasn't correctly. So we needn't call
1138 * into error handler afterwards.
1140 edev
->mode
|= EEH_DEV_NO_HANDLER
;
1143 dev
->dev
.archdata
.edev
= NULL
;
1146 if (eeh_has_flag(EEH_PROBE_MODE_DEV
))
1147 eeh_ops
->probe(pdn
, NULL
);
1150 dev
->dev
.archdata
.edev
= edev
;
1152 eeh_addr_cache_insert_dev(dev
);
1156 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
1159 * This routine must be used to perform EEH initialization for PCI
1160 * devices which are attached to the indicated PCI bus. The PCI bus
1161 * is added after system boot through hotplug or dlpar.
1163 void eeh_add_device_tree_late(struct pci_bus
*bus
)
1165 struct pci_dev
*dev
;
1167 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1168 eeh_add_device_late(dev
);
1169 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1170 struct pci_bus
*subbus
= dev
->subordinate
;
1172 eeh_add_device_tree_late(subbus
);
1176 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late
);
1179 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1182 * This routine must be used to add EEH sysfs files for PCI
1183 * devices which are attached to the indicated PCI bus. The PCI bus
1184 * is added after system boot through hotplug or dlpar.
1186 void eeh_add_sysfs_files(struct pci_bus
*bus
)
1188 struct pci_dev
*dev
;
1190 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1191 eeh_sysfs_add_device(dev
);
1192 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1193 struct pci_bus
*subbus
= dev
->subordinate
;
1195 eeh_add_sysfs_files(subbus
);
1199 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files
);
1202 * eeh_remove_device - Undo EEH setup for the indicated pci device
1203 * @dev: pci device to be removed
1205 * This routine should be called when a device is removed from
1206 * a running system (e.g. by hotplug or dlpar). It unregisters
1207 * the PCI device from the EEH subsystem. I/O errors affecting
1208 * this device will no longer be detected after this call; thus,
1209 * i/o errors affecting this slot may leave this device unusable.
1211 void eeh_remove_device(struct pci_dev
*dev
)
1213 struct eeh_dev
*edev
;
1215 if (!dev
|| !eeh_enabled())
1217 edev
= pci_dev_to_eeh_dev(dev
);
1219 /* Unregister the device with the EEH/PCI address search system */
1220 pr_debug("EEH: Removing device %s\n", pci_name(dev
));
1222 if (!edev
|| !edev
->pdev
|| !edev
->pe
) {
1223 pr_debug("EEH: Not referenced !\n");
1228 * During the hotplug for EEH error recovery, we need the EEH
1229 * device attached to the parent PE in order for BAR restore
1230 * a bit later. So we keep it for BAR restore and remove it
1231 * from the parent PE during the BAR resotre.
1236 * The flag "in_error" is used to trace EEH devices for VFs
1237 * in error state or not. It's set in eeh_report_error(). If
1238 * it's not set, eeh_report_{reset,resume}() won't be called
1239 * for the VF EEH device.
1241 edev
->in_error
= false;
1242 dev
->dev
.archdata
.edev
= NULL
;
1243 if (!(edev
->pe
->state
& EEH_PE_KEEP
))
1244 eeh_rmv_from_parent_pe(edev
);
1246 edev
->mode
|= EEH_DEV_DISCONNECTED
;
1249 * We're removing from the PCI subsystem, that means
1250 * the PCI device driver can't support EEH or not
1251 * well. So we rely on hotplug completely to do recovery
1252 * for the specific PCI device.
1254 edev
->mode
|= EEH_DEV_NO_HANDLER
;
1256 eeh_addr_cache_rmv_dev(dev
);
1257 eeh_sysfs_remove_device(dev
);
1258 edev
->mode
&= ~EEH_DEV_SYSFS
;
1261 int eeh_unfreeze_pe(struct eeh_pe
*pe
, bool sw_state
)
1265 ret
= eeh_pci_enable(pe
, EEH_OPT_THAW_MMIO
);
1267 pr_warn("%s: Failure %d enabling IO on PHB#%x-PE#%x\n",
1268 __func__
, ret
, pe
->phb
->global_number
, pe
->addr
);
1272 ret
= eeh_pci_enable(pe
, EEH_OPT_THAW_DMA
);
1274 pr_warn("%s: Failure %d enabling DMA on PHB#%x-PE#%x\n",
1275 __func__
, ret
, pe
->phb
->global_number
, pe
->addr
);
1279 /* Clear software isolated state */
1280 if (sw_state
&& (pe
->state
& EEH_PE_ISOLATED
))
1281 eeh_pe_state_clear(pe
, EEH_PE_ISOLATED
);
1287 static struct pci_device_id eeh_reset_ids
[] = {
1288 { PCI_DEVICE(0x19a2, 0x0710) }, /* Emulex, BE */
1289 { PCI_DEVICE(0x10df, 0xe220) }, /* Emulex, Lancer */
1290 { PCI_DEVICE(0x14e4, 0x1657) }, /* Broadcom BCM5719 */
1294 static int eeh_pe_change_owner(struct eeh_pe
*pe
)
1296 struct eeh_dev
*edev
, *tmp
;
1297 struct pci_dev
*pdev
;
1298 struct pci_device_id
*id
;
1301 /* Check PE state */
1302 flags
= (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
);
1303 ret
= eeh_ops
->get_state(pe
, NULL
);
1304 if (ret
< 0 || ret
== EEH_STATE_NOT_SUPPORT
)
1307 /* Unfrozen PE, nothing to do */
1308 if ((ret
& flags
) == flags
)
1311 /* Frozen PE, check if it needs PE level reset */
1312 eeh_pe_for_each_dev(pe
, edev
, tmp
) {
1313 pdev
= eeh_dev_to_pci_dev(edev
);
1317 for (id
= &eeh_reset_ids
[0]; id
->vendor
!= 0; id
++) {
1318 if (id
->vendor
!= PCI_ANY_ID
&&
1319 id
->vendor
!= pdev
->vendor
)
1321 if (id
->device
!= PCI_ANY_ID
&&
1322 id
->device
!= pdev
->device
)
1324 if (id
->subvendor
!= PCI_ANY_ID
&&
1325 id
->subvendor
!= pdev
->subsystem_vendor
)
1327 if (id
->subdevice
!= PCI_ANY_ID
&&
1328 id
->subdevice
!= pdev
->subsystem_device
)
1331 return eeh_pe_reset_and_recover(pe
);
1335 return eeh_unfreeze_pe(pe
, true);
1339 * eeh_dev_open - Increase count of pass through devices for PE
1342 * Increase count of passed through devices for the indicated
1343 * PE. In the result, the EEH errors detected on the PE won't be
1344 * reported. The PE owner will be responsible for detection
1347 int eeh_dev_open(struct pci_dev
*pdev
)
1349 struct eeh_dev
*edev
;
1352 mutex_lock(&eeh_dev_mutex
);
1354 /* No PCI device ? */
1358 /* No EEH device or PE ? */
1359 edev
= pci_dev_to_eeh_dev(pdev
);
1360 if (!edev
|| !edev
->pe
)
1364 * The PE might have been put into frozen state, but we
1365 * didn't detect that yet. The passed through PCI devices
1366 * in frozen PE won't work properly. Clear the frozen state
1369 ret
= eeh_pe_change_owner(edev
->pe
);
1373 /* Increase PE's pass through count */
1374 atomic_inc(&edev
->pe
->pass_dev_cnt
);
1375 mutex_unlock(&eeh_dev_mutex
);
1379 mutex_unlock(&eeh_dev_mutex
);
1382 EXPORT_SYMBOL_GPL(eeh_dev_open
);
1385 * eeh_dev_release - Decrease count of pass through devices for PE
1388 * Decrease count of pass through devices for the indicated PE. If
1389 * there is no passed through device in PE, the EEH errors detected
1390 * on the PE will be reported and handled as usual.
1392 void eeh_dev_release(struct pci_dev
*pdev
)
1394 struct eeh_dev
*edev
;
1396 mutex_lock(&eeh_dev_mutex
);
1398 /* No PCI device ? */
1402 /* No EEH device ? */
1403 edev
= pci_dev_to_eeh_dev(pdev
);
1404 if (!edev
|| !edev
->pe
|| !eeh_pe_passed(edev
->pe
))
1407 /* Decrease PE's pass through count */
1408 WARN_ON(atomic_dec_if_positive(&edev
->pe
->pass_dev_cnt
) < 0);
1409 eeh_pe_change_owner(edev
->pe
);
1411 mutex_unlock(&eeh_dev_mutex
);
1413 EXPORT_SYMBOL(eeh_dev_release
);
1415 #ifdef CONFIG_IOMMU_API
1417 static int dev_has_iommu_table(struct device
*dev
, void *data
)
1419 struct pci_dev
*pdev
= to_pci_dev(dev
);
1420 struct pci_dev
**ppdev
= data
;
1425 if (dev
->iommu_group
) {
1434 * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE
1435 * @group: IOMMU group
1437 * The routine is called to convert IOMMU group to EEH PE.
1439 struct eeh_pe
*eeh_iommu_group_to_pe(struct iommu_group
*group
)
1441 struct pci_dev
*pdev
= NULL
;
1442 struct eeh_dev
*edev
;
1445 /* No IOMMU group ? */
1449 ret
= iommu_group_for_each_dev(group
, &pdev
, dev_has_iommu_table
);
1453 /* No EEH device or PE ? */
1454 edev
= pci_dev_to_eeh_dev(pdev
);
1455 if (!edev
|| !edev
->pe
)
1460 EXPORT_SYMBOL_GPL(eeh_iommu_group_to_pe
);
1462 #endif /* CONFIG_IOMMU_API */
1465 * eeh_pe_set_option - Set options for the indicated PE
1467 * @option: requested option
1469 * The routine is called to enable or disable EEH functionality
1470 * on the indicated PE, to enable IO or DMA for the frozen PE.
1472 int eeh_pe_set_option(struct eeh_pe
*pe
, int option
)
1481 * EEH functionality could possibly be disabled, just
1482 * return error for the case. And the EEH functinality
1483 * isn't expected to be disabled on one specific PE.
1486 case EEH_OPT_ENABLE
:
1487 if (eeh_enabled()) {
1488 ret
= eeh_pe_change_owner(pe
);
1493 case EEH_OPT_DISABLE
:
1495 case EEH_OPT_THAW_MMIO
:
1496 case EEH_OPT_THAW_DMA
:
1497 case EEH_OPT_FREEZE_PE
:
1498 if (!eeh_ops
|| !eeh_ops
->set_option
) {
1503 ret
= eeh_pci_enable(pe
, option
);
1506 pr_debug("%s: Option %d out of range (%d, %d)\n",
1507 __func__
, option
, EEH_OPT_DISABLE
, EEH_OPT_THAW_DMA
);
1513 EXPORT_SYMBOL_GPL(eeh_pe_set_option
);
1516 * eeh_pe_get_state - Retrieve PE's state
1519 * Retrieve the PE's state, which includes 3 aspects: enabled
1520 * DMA, enabled IO and asserted reset.
1522 int eeh_pe_get_state(struct eeh_pe
*pe
)
1524 int result
, ret
= 0;
1525 bool rst_active
, dma_en
, mmio_en
;
1531 if (!eeh_ops
|| !eeh_ops
->get_state
)
1535 * If the parent PE is owned by the host kernel and is undergoing
1536 * error recovery, we should return the PE state as temporarily
1537 * unavailable so that the error recovery on the guest is suspended
1538 * until the recovery completes on the host.
1541 !(pe
->state
& EEH_PE_REMOVED
) &&
1542 (pe
->parent
->state
& (EEH_PE_ISOLATED
| EEH_PE_RECOVERING
)))
1543 return EEH_PE_STATE_UNAVAIL
;
1545 result
= eeh_ops
->get_state(pe
, NULL
);
1546 rst_active
= !!(result
& EEH_STATE_RESET_ACTIVE
);
1547 dma_en
= !!(result
& EEH_STATE_DMA_ENABLED
);
1548 mmio_en
= !!(result
& EEH_STATE_MMIO_ENABLED
);
1551 ret
= EEH_PE_STATE_RESET
;
1552 else if (dma_en
&& mmio_en
)
1553 ret
= EEH_PE_STATE_NORMAL
;
1554 else if (!dma_en
&& !mmio_en
)
1555 ret
= EEH_PE_STATE_STOPPED_IO_DMA
;
1556 else if (!dma_en
&& mmio_en
)
1557 ret
= EEH_PE_STATE_STOPPED_DMA
;
1559 ret
= EEH_PE_STATE_UNAVAIL
;
1563 EXPORT_SYMBOL_GPL(eeh_pe_get_state
);
1565 static int eeh_pe_reenable_devices(struct eeh_pe
*pe
)
1567 struct eeh_dev
*edev
, *tmp
;
1568 struct pci_dev
*pdev
;
1571 /* Restore config space */
1572 eeh_pe_restore_bars(pe
);
1575 * Reenable PCI devices as the devices passed
1576 * through are always enabled before the reset.
1578 eeh_pe_for_each_dev(pe
, edev
, tmp
) {
1579 pdev
= eeh_dev_to_pci_dev(edev
);
1583 ret
= pci_reenable_device(pdev
);
1585 pr_warn("%s: Failure %d reenabling %s\n",
1586 __func__
, ret
, pci_name(pdev
));
1591 /* The PE is still in frozen state */
1592 return eeh_unfreeze_pe(pe
, true);
1597 * eeh_pe_reset - Issue PE reset according to specified type
1599 * @option: reset type
1601 * The routine is called to reset the specified PE with the
1602 * indicated type, either fundamental reset or hot reset.
1603 * PE reset is the most important part for error recovery.
1605 int eeh_pe_reset(struct eeh_pe
*pe
, int option
)
1613 if (!eeh_ops
|| !eeh_ops
->set_option
|| !eeh_ops
->reset
)
1617 case EEH_RESET_DEACTIVATE
:
1618 ret
= eeh_ops
->reset(pe
, option
);
1619 eeh_pe_state_clear(pe
, EEH_PE_CFG_BLOCKED
);
1623 ret
= eeh_pe_reenable_devices(pe
);
1626 case EEH_RESET_FUNDAMENTAL
:
1628 * Proactively freeze the PE to drop all MMIO access
1629 * during reset, which should be banned as it's always
1630 * cause recursive EEH error.
1632 eeh_ops
->set_option(pe
, EEH_OPT_FREEZE_PE
);
1634 eeh_pe_state_mark(pe
, EEH_PE_CFG_BLOCKED
);
1635 ret
= eeh_ops
->reset(pe
, option
);
1638 pr_debug("%s: Unsupported option %d\n",
1645 EXPORT_SYMBOL_GPL(eeh_pe_reset
);
1648 * eeh_pe_configure - Configure PCI bridges after PE reset
1651 * The routine is called to restore the PCI config space for
1652 * those PCI devices, especially PCI bridges affected by PE
1653 * reset issued previously.
1655 int eeh_pe_configure(struct eeh_pe
*pe
)
1665 EXPORT_SYMBOL_GPL(eeh_pe_configure
);
1668 * eeh_pe_inject_err - Injecting the specified PCI error to the indicated PE
1669 * @pe: the indicated PE
1671 * @function: error function
1673 * @mask: address mask
1675 * The routine is called to inject the specified PCI error, which
1676 * is determined by @type and @function, to the indicated PE for
1679 int eeh_pe_inject_err(struct eeh_pe
*pe
, int type
, int func
,
1680 unsigned long addr
, unsigned long mask
)
1686 /* Unsupported operation ? */
1687 if (!eeh_ops
|| !eeh_ops
->err_inject
)
1690 /* Check on PCI error type */
1691 if (type
!= EEH_ERR_TYPE_32
&& type
!= EEH_ERR_TYPE_64
)
1694 /* Check on PCI error function */
1695 if (func
< EEH_ERR_FUNC_MIN
|| func
> EEH_ERR_FUNC_MAX
)
1698 return eeh_ops
->err_inject(pe
, type
, func
, addr
, mask
);
1700 EXPORT_SYMBOL_GPL(eeh_pe_inject_err
);
1702 static int proc_eeh_show(struct seq_file
*m
, void *v
)
1704 if (!eeh_enabled()) {
1705 seq_printf(m
, "EEH Subsystem is globally disabled\n");
1706 seq_printf(m
, "eeh_total_mmio_ffs=%llu\n", eeh_stats
.total_mmio_ffs
);
1708 seq_printf(m
, "EEH Subsystem is enabled\n");
1711 "no device node=%llu\n"
1712 "no config address=%llu\n"
1713 "check not wanted=%llu\n"
1714 "eeh_total_mmio_ffs=%llu\n"
1715 "eeh_false_positives=%llu\n"
1716 "eeh_slot_resets=%llu\n",
1717 eeh_stats
.no_device
,
1719 eeh_stats
.no_cfg_addr
,
1720 eeh_stats
.ignored_check
,
1721 eeh_stats
.total_mmio_ffs
,
1722 eeh_stats
.false_positives
,
1723 eeh_stats
.slot_resets
);
1729 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
1731 return single_open(file
, proc_eeh_show
, NULL
);
1734 static const struct file_operations proc_eeh_operations
= {
1735 .open
= proc_eeh_open
,
1737 .llseek
= seq_lseek
,
1738 .release
= single_release
,
1741 #ifdef CONFIG_DEBUG_FS
1742 static int eeh_enable_dbgfs_set(void *data
, u64 val
)
1745 eeh_clear_flag(EEH_FORCE_DISABLED
);
1747 eeh_add_flag(EEH_FORCE_DISABLED
);
1749 /* Notify the backend */
1750 if (eeh_ops
->post_init
)
1751 eeh_ops
->post_init();
1756 static int eeh_enable_dbgfs_get(void *data
, u64
*val
)
1765 static int eeh_freeze_dbgfs_set(void *data
, u64 val
)
1767 eeh_max_freezes
= val
;
1771 static int eeh_freeze_dbgfs_get(void *data
, u64
*val
)
1773 *val
= eeh_max_freezes
;
1777 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops
, eeh_enable_dbgfs_get
,
1778 eeh_enable_dbgfs_set
, "0x%llx\n");
1779 DEFINE_SIMPLE_ATTRIBUTE(eeh_freeze_dbgfs_ops
, eeh_freeze_dbgfs_get
,
1780 eeh_freeze_dbgfs_set
, "0x%llx\n");
1783 static int __init
eeh_init_proc(void)
1785 if (machine_is(pseries
) || machine_is(powernv
)) {
1786 proc_create("powerpc/eeh", 0, NULL
, &proc_eeh_operations
);
1787 #ifdef CONFIG_DEBUG_FS
1788 debugfs_create_file("eeh_enable", 0600,
1789 powerpc_debugfs_root
, NULL
,
1790 &eeh_enable_dbgfs_ops
);
1791 debugfs_create_file("eeh_max_freezes", 0600,
1792 powerpc_debugfs_root
, NULL
,
1793 &eeh_freeze_dbgfs_ops
);
1799 __initcall(eeh_init_proc
);