2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/list.h>
28 #include <linux/pci.h>
29 #include <linux/iommu.h>
30 #include <linux/proc_fs.h>
31 #include <linux/rbtree.h>
32 #include <linux/reboot.h>
33 #include <linux/seq_file.h>
34 #include <linux/spinlock.h>
35 #include <linux/export.h>
38 #include <linux/atomic.h>
39 #include <asm/debugfs.h>
41 #include <asm/eeh_event.h>
43 #include <asm/iommu.h>
44 #include <asm/machdep.h>
45 #include <asm/ppc-pci.h>
47 #include <asm/pte-walk.h>
51 * EEH, or "Enhanced Error Handling" is a PCI bridge technology for
52 * dealing with PCI bus errors that can't be dealt with within the
53 * usual PCI framework, except by check-stopping the CPU. Systems
54 * that are designed for high-availability/reliability cannot afford
55 * to crash due to a "mere" PCI error, thus the need for EEH.
56 * An EEH-capable bridge operates by converting a detected error
57 * into a "slot freeze", taking the PCI adapter off-line, making
58 * the slot behave, from the OS'es point of view, as if the slot
59 * were "empty": all reads return 0xff's and all writes are silently
60 * ignored. EEH slot isolation events can be triggered by parity
61 * errors on the address or data busses (e.g. during posted writes),
62 * which in turn might be caused by low voltage on the bus, dust,
63 * vibration, humidity, radioactivity or plain-old failed hardware.
65 * Note, however, that one of the leading causes of EEH slot
66 * freeze events are buggy device drivers, buggy device microcode,
67 * or buggy device hardware. This is because any attempt by the
68 * device to bus-master data to a memory address that is not
69 * assigned to the device will trigger a slot freeze. (The idea
70 * is to prevent devices-gone-wild from corrupting system memory).
71 * Buggy hardware/drivers will have a miserable time co-existing
74 * Ideally, a PCI device driver, when suspecting that an isolation
75 * event has occurred (e.g. by reading 0xff's), will then ask EEH
76 * whether this is the case, and then take appropriate steps to
77 * reset the PCI slot, the PCI device, and then resume operations.
78 * However, until that day, the checking is done here, with the
79 * eeh_check_failure() routine embedded in the MMIO macros. If
80 * the slot is found to be isolated, an "EEH Event" is synthesized
81 * and sent out for processing.
84 /* If a device driver keeps reading an MMIO register in an interrupt
85 * handler after a slot isolation event, it might be broken.
86 * This sets the threshold for how many read attempts we allow
87 * before printing an error message.
89 #define EEH_MAX_FAILS 2100000
91 /* Time to wait for a PCI slot to report status, in milliseconds */
92 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
95 * EEH probe mode support, which is part of the flags,
96 * is to support multiple platforms for EEH. Some platforms
97 * like pSeries do PCI emunation based on device tree.
98 * However, other platforms like powernv probe PCI devices
99 * from hardware. The flag is used to distinguish that.
100 * In addition, struct eeh_ops::probe would be invoked for
101 * particular OF node or PCI device so that the corresponding
102 * PE would be created there.
104 int eeh_subsystem_flags
;
105 EXPORT_SYMBOL(eeh_subsystem_flags
);
108 * EEH allowed maximal frozen times. If one particular PE's
109 * frozen count in last hour exceeds this limit, the PE will
110 * be forced to be offline permanently.
112 int eeh_max_freezes
= 5;
114 /* Platform dependent EEH operations */
115 struct eeh_ops
*eeh_ops
= NULL
;
117 /* Lock to avoid races due to multiple reports of an error */
118 DEFINE_RAW_SPINLOCK(confirm_error_lock
);
119 EXPORT_SYMBOL_GPL(confirm_error_lock
);
121 /* Lock to protect passed flags */
122 static DEFINE_MUTEX(eeh_dev_mutex
);
124 /* Buffer for reporting pci register dumps. Its here in BSS, and
125 * not dynamically alloced, so that it ends up in RMO where RTAS
128 #define EEH_PCI_REGS_LOG_LEN 8192
129 static unsigned char pci_regs_buf
[EEH_PCI_REGS_LOG_LEN
];
132 * The struct is used to maintain the EEH global statistic
133 * information. Besides, the EEH global statistics will be
134 * exported to user space through procfs
137 u64 no_device
; /* PCI device not found */
138 u64 no_dn
; /* OF node not found */
139 u64 no_cfg_addr
; /* Config address not found */
140 u64 ignored_check
; /* EEH check skipped */
141 u64 total_mmio_ffs
; /* Total EEH checks */
142 u64 false_positives
; /* Unnecessary EEH checks */
143 u64 slot_resets
; /* PE reset */
146 static struct eeh_stats eeh_stats
;
148 static int __init
eeh_setup(char *str
)
150 if (!strcmp(str
, "off"))
151 eeh_add_flag(EEH_FORCE_DISABLED
);
152 else if (!strcmp(str
, "early_log"))
153 eeh_add_flag(EEH_EARLY_DUMP_LOG
);
157 __setup("eeh=", eeh_setup
);
160 * This routine captures assorted PCI configuration space data
161 * for the indicated PCI device, and puts them into a buffer
162 * for RTAS error logging.
164 static size_t eeh_dump_dev_log(struct eeh_dev
*edev
, char *buf
, size_t len
)
166 struct pci_dn
*pdn
= eeh_dev_to_pdn(edev
);
172 n
+= scnprintf(buf
+n
, len
-n
, "%04x:%02x:%02x.%01x\n",
173 pdn
->phb
->global_number
, pdn
->busno
,
174 PCI_SLOT(pdn
->devfn
), PCI_FUNC(pdn
->devfn
));
175 pr_warn("EEH: of node=%04x:%02x:%02x.%01x\n",
176 pdn
->phb
->global_number
, pdn
->busno
,
177 PCI_SLOT(pdn
->devfn
), PCI_FUNC(pdn
->devfn
));
179 eeh_ops
->read_config(pdn
, PCI_VENDOR_ID
, 4, &cfg
);
180 n
+= scnprintf(buf
+n
, len
-n
, "dev/vend:%08x\n", cfg
);
181 pr_warn("EEH: PCI device/vendor: %08x\n", cfg
);
183 eeh_ops
->read_config(pdn
, PCI_COMMAND
, 4, &cfg
);
184 n
+= scnprintf(buf
+n
, len
-n
, "cmd/stat:%x\n", cfg
);
185 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg
);
187 /* Gather bridge-specific registers */
188 if (edev
->mode
& EEH_DEV_BRIDGE
) {
189 eeh_ops
->read_config(pdn
, PCI_SEC_STATUS
, 2, &cfg
);
190 n
+= scnprintf(buf
+n
, len
-n
, "sec stat:%x\n", cfg
);
191 pr_warn("EEH: Bridge secondary status: %04x\n", cfg
);
193 eeh_ops
->read_config(pdn
, PCI_BRIDGE_CONTROL
, 2, &cfg
);
194 n
+= scnprintf(buf
+n
, len
-n
, "brdg ctl:%x\n", cfg
);
195 pr_warn("EEH: Bridge control: %04x\n", cfg
);
198 /* Dump out the PCI-X command and status regs */
199 cap
= edev
->pcix_cap
;
201 eeh_ops
->read_config(pdn
, cap
, 4, &cfg
);
202 n
+= scnprintf(buf
+n
, len
-n
, "pcix-cmd:%x\n", cfg
);
203 pr_warn("EEH: PCI-X cmd: %08x\n", cfg
);
205 eeh_ops
->read_config(pdn
, cap
+4, 4, &cfg
);
206 n
+= scnprintf(buf
+n
, len
-n
, "pcix-stat:%x\n", cfg
);
207 pr_warn("EEH: PCI-X status: %08x\n", cfg
);
210 /* If PCI-E capable, dump PCI-E cap 10 */
211 cap
= edev
->pcie_cap
;
213 n
+= scnprintf(buf
+n
, len
-n
, "pci-e cap10:\n");
214 pr_warn("EEH: PCI-E capabilities and status follow:\n");
216 for (i
=0; i
<=8; i
++) {
217 eeh_ops
->read_config(pdn
, cap
+4*i
, 4, &cfg
);
218 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
222 pr_warn("%s\n", buffer
);
224 l
= scnprintf(buffer
, sizeof(buffer
),
225 "EEH: PCI-E %02x: %08x ",
228 l
+= scnprintf(buffer
+l
, sizeof(buffer
)-l
,
234 pr_warn("%s\n", buffer
);
237 /* If AER capable, dump it */
240 n
+= scnprintf(buf
+n
, len
-n
, "pci-e AER:\n");
241 pr_warn("EEH: PCI-E AER capability register set follows:\n");
243 for (i
=0; i
<=13; i
++) {
244 eeh_ops
->read_config(pdn
, cap
+4*i
, 4, &cfg
);
245 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
249 pr_warn("%s\n", buffer
);
251 l
= scnprintf(buffer
, sizeof(buffer
),
252 "EEH: PCI-E AER %02x: %08x ",
255 l
+= scnprintf(buffer
+l
, sizeof(buffer
)-l
,
260 pr_warn("%s\n", buffer
);
266 static void *eeh_dump_pe_log(void *data
, void *flag
)
268 struct eeh_pe
*pe
= data
;
269 struct eeh_dev
*edev
, *tmp
;
272 eeh_pe_for_each_dev(pe
, edev
, tmp
)
273 *plen
+= eeh_dump_dev_log(edev
, pci_regs_buf
+ *plen
,
274 EEH_PCI_REGS_LOG_LEN
- *plen
);
280 * eeh_slot_error_detail - Generate combined log including driver log and error log
282 * @severity: temporary or permanent error log
284 * This routine should be called to generate the combined log, which
285 * is comprised of driver log and error log. The driver log is figured
286 * out from the config space of the corresponding PCI device, while
287 * the error log is fetched through platform dependent function call.
289 void eeh_slot_error_detail(struct eeh_pe
*pe
, int severity
)
294 * When the PHB is fenced or dead, it's pointless to collect
295 * the data from PCI config space because it should return
296 * 0xFF's. For ER, we still retrieve the data from the PCI
299 * For pHyp, we have to enable IO for log retrieval. Otherwise,
300 * 0xFF's is always returned from PCI config space.
302 * When the @severity is EEH_LOG_PERM, the PE is going to be
303 * removed. Prior to that, the drivers for devices included in
304 * the PE will be closed. The drivers rely on working IO path
305 * to bring the devices to quiet state. Otherwise, PCI traffic
306 * from those devices after they are removed is like to cause
307 * another unexpected EEH error.
309 if (!(pe
->type
& EEH_PE_PHB
)) {
310 if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG
) ||
311 severity
== EEH_LOG_PERM
)
312 eeh_pci_enable(pe
, EEH_OPT_THAW_MMIO
);
315 * The config space of some PCI devices can't be accessed
316 * when their PEs are in frozen state. Otherwise, fenced
317 * PHB might be seen. Those PEs are identified with flag
318 * EEH_PE_CFG_RESTRICTED, indicating EEH_PE_CFG_BLOCKED
319 * is set automatically when the PE is put to EEH_PE_ISOLATED.
321 * Restoring BARs possibly triggers PCI config access in
322 * (OPAL) firmware and then causes fenced PHB. If the
323 * PCI config is blocked with flag EEH_PE_CFG_BLOCKED, it's
324 * pointless to restore BARs and dump config space.
326 eeh_ops
->configure_bridge(pe
);
327 if (!(pe
->state
& EEH_PE_CFG_BLOCKED
)) {
328 eeh_pe_restore_bars(pe
);
331 eeh_pe_traverse(pe
, eeh_dump_pe_log
, &loglen
);
335 eeh_ops
->get_log(pe
, severity
, pci_regs_buf
, loglen
);
339 * eeh_token_to_phys - Convert EEH address token to phys address
340 * @token: I/O token, should be address in the form 0xA....
342 * This routine should be called to convert virtual I/O address
345 static inline unsigned long eeh_token_to_phys(unsigned long token
)
352 * We won't find hugepages here(this is iomem). Hence we are not
353 * worried about _PAGE_SPLITTING/collapse. Also we will not hit
354 * page table free, because of init_mm.
356 ptep
= find_init_mm_pte(token
, &hugepage_shift
);
359 WARN_ON(hugepage_shift
);
360 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
362 return pa
| (token
& (PAGE_SIZE
-1));
366 * On PowerNV platform, we might already have fenced PHB there.
367 * For that case, it's meaningless to recover frozen PE. Intead,
368 * We have to handle fenced PHB firstly.
370 static int eeh_phb_check_failure(struct eeh_pe
*pe
)
372 struct eeh_pe
*phb_pe
;
376 if (!eeh_has_flag(EEH_PROBE_MODE_DEV
))
379 /* Find the PHB PE */
380 phb_pe
= eeh_phb_pe_get(pe
->phb
);
382 pr_warn("%s Can't find PE for PHB#%x\n",
383 __func__
, pe
->phb
->global_number
);
387 /* If the PHB has been in problematic state */
388 eeh_serialize_lock(&flags
);
389 if (phb_pe
->state
& EEH_PE_ISOLATED
) {
394 /* Check PHB state */
395 ret
= eeh_ops
->get_state(phb_pe
, NULL
);
397 (ret
== EEH_STATE_NOT_SUPPORT
) ||
398 (ret
& (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
)) ==
399 (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
)) {
404 /* Isolate the PHB and send event */
405 eeh_pe_state_mark(phb_pe
, EEH_PE_ISOLATED
);
406 eeh_serialize_unlock(flags
);
408 pr_err("EEH: PHB#%x failure detected, location: %s\n",
409 phb_pe
->phb
->global_number
, eeh_pe_loc_get(phb_pe
));
411 eeh_send_failure_event(phb_pe
);
415 eeh_serialize_unlock(flags
);
420 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
423 * Check for an EEH failure for the given device node. Call this
424 * routine if the result of a read was all 0xff's and you want to
425 * find out if this is due to an EEH slot freeze. This routine
426 * will query firmware for the EEH status.
428 * Returns 0 if there has not been an EEH error; otherwise returns
429 * a non-zero value and queues up a slot isolation event notification.
431 * It is safe to call this routine in an interrupt context.
433 int eeh_dev_check_failure(struct eeh_dev
*edev
)
436 int active_flags
= (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
);
438 struct device_node
*dn
;
440 struct eeh_pe
*pe
, *parent_pe
, *phb_pe
;
442 const char *location
= NULL
;
444 eeh_stats
.total_mmio_ffs
++;
453 dev
= eeh_dev_to_pci_dev(edev
);
454 pe
= eeh_dev_to_pe(edev
);
456 /* Access to IO BARs might get this far and still not want checking. */
458 eeh_stats
.ignored_check
++;
459 pr_debug("EEH: Ignored check for %s\n",
464 if (!pe
->addr
&& !pe
->config_addr
) {
465 eeh_stats
.no_cfg_addr
++;
470 * On PowerNV platform, we might already have fenced PHB
471 * there and we need take care of that firstly.
473 ret
= eeh_phb_check_failure(pe
);
478 * If the PE isn't owned by us, we shouldn't check the
479 * state. Instead, let the owner handle it if the PE has
482 if (eeh_pe_passed(pe
))
485 /* If we already have a pending isolation event for this
486 * slot, we know it's bad already, we don't need to check.
487 * Do this checking under a lock; as multiple PCI devices
488 * in one slot might report errors simultaneously, and we
489 * only want one error recovery routine running.
491 eeh_serialize_lock(&flags
);
493 if (pe
->state
& EEH_PE_ISOLATED
) {
495 if (pe
->check_count
% EEH_MAX_FAILS
== 0) {
496 dn
= pci_device_to_OF_node(dev
);
498 location
= of_get_property(dn
, "ibm,loc-code",
500 printk(KERN_ERR
"EEH: %d reads ignored for recovering device at "
501 "location=%s driver=%s pci addr=%s\n",
503 location
? location
: "unknown",
504 eeh_driver_name(dev
), eeh_pci_name(dev
));
505 printk(KERN_ERR
"EEH: Might be infinite loop in %s driver\n",
506 eeh_driver_name(dev
));
513 * Now test for an EEH failure. This is VERY expensive.
514 * Note that the eeh_config_addr may be a parent device
515 * in the case of a device behind a bridge, or it may be
516 * function zero of a multi-function device.
517 * In any case they must share a common PHB.
519 ret
= eeh_ops
->get_state(pe
, NULL
);
521 /* Note that config-io to empty slots may fail;
522 * they are empty when they don't have children.
523 * We will punt with the following conditions: Failure to get
524 * PE's state, EEH not support and Permanently unavailable
525 * state, PE is in good state.
528 (ret
== EEH_STATE_NOT_SUPPORT
) ||
529 ((ret
& active_flags
) == active_flags
)) {
530 eeh_stats
.false_positives
++;
531 pe
->false_positives
++;
537 * It should be corner case that the parent PE has been
538 * put into frozen state as well. We should take care
541 parent_pe
= pe
->parent
;
543 /* Hit the ceiling ? */
544 if (parent_pe
->type
& EEH_PE_PHB
)
547 /* Frozen parent PE ? */
548 ret
= eeh_ops
->get_state(parent_pe
, NULL
);
550 (ret
& active_flags
) != active_flags
)
553 /* Next parent level */
554 parent_pe
= parent_pe
->parent
;
557 eeh_stats
.slot_resets
++;
559 /* Avoid repeated reports of this failure, including problems
560 * with other functions on this device, and functions under
563 eeh_pe_state_mark(pe
, EEH_PE_ISOLATED
);
564 eeh_serialize_unlock(flags
);
566 /* Most EEH events are due to device driver bugs. Having
567 * a stack trace will help the device-driver authors figure
568 * out what happened. So print that out.
570 phb_pe
= eeh_phb_pe_get(pe
->phb
);
571 pr_err("EEH: Frozen PHB#%x-PE#%x detected\n",
572 pe
->phb
->global_number
, pe
->addr
);
573 pr_err("EEH: PE location: %s, PHB location: %s\n",
574 eeh_pe_loc_get(pe
), eeh_pe_loc_get(phb_pe
));
577 eeh_send_failure_event(pe
);
582 eeh_serialize_unlock(flags
);
586 EXPORT_SYMBOL_GPL(eeh_dev_check_failure
);
589 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
590 * @token: I/O address
592 * Check for an EEH failure at the given I/O address. Call this
593 * routine if the result of a read was all 0xff's and you want to
594 * find out if this is due to an EEH slot freeze event. This routine
595 * will query firmware for the EEH status.
597 * Note this routine is safe to call in an interrupt context.
599 int eeh_check_failure(const volatile void __iomem
*token
)
602 struct eeh_dev
*edev
;
604 /* Finding the phys addr + pci device; this is pretty quick. */
605 addr
= eeh_token_to_phys((unsigned long __force
) token
);
606 edev
= eeh_addr_cache_get_dev(addr
);
608 eeh_stats
.no_device
++;
612 return eeh_dev_check_failure(edev
);
614 EXPORT_SYMBOL(eeh_check_failure
);
618 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
621 * This routine should be called to reenable frozen MMIO or DMA
622 * so that it would work correctly again. It's useful while doing
623 * recovery or log collection on the indicated device.
625 int eeh_pci_enable(struct eeh_pe
*pe
, int function
)
630 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
631 * Also, it's pointless to enable them on unfrozen PE. So
632 * we have to check before enabling IO or DMA.
635 case EEH_OPT_THAW_MMIO
:
636 active_flag
= EEH_STATE_MMIO_ACTIVE
| EEH_STATE_MMIO_ENABLED
;
638 case EEH_OPT_THAW_DMA
:
639 active_flag
= EEH_STATE_DMA_ACTIVE
;
641 case EEH_OPT_DISABLE
:
643 case EEH_OPT_FREEZE_PE
:
647 pr_warn("%s: Invalid function %d\n",
653 * Check if IO or DMA has been enabled before
657 rc
= eeh_ops
->get_state(pe
, NULL
);
661 /* Needn't enable it at all */
662 if (rc
== EEH_STATE_NOT_SUPPORT
)
665 /* It's already enabled */
666 if (rc
& active_flag
)
671 /* Issue the request */
672 rc
= eeh_ops
->set_option(pe
, function
);
674 pr_warn("%s: Unexpected state change %d on "
675 "PHB#%x-PE#%x, err=%d\n",
676 __func__
, function
, pe
->phb
->global_number
,
679 /* Check if the request is finished successfully */
681 rc
= eeh_ops
->wait_state(pe
, PCI_BUS_RESET_WAIT_MSEC
);
685 if (rc
& active_flag
)
694 static void *eeh_disable_and_save_dev_state(void *data
, void *userdata
)
696 struct eeh_dev
*edev
= data
;
697 struct pci_dev
*pdev
= eeh_dev_to_pci_dev(edev
);
698 struct pci_dev
*dev
= userdata
;
701 * The caller should have disabled and saved the
702 * state for the specified device
704 if (!pdev
|| pdev
== dev
)
707 /* Ensure we have D0 power state */
708 pci_set_power_state(pdev
, PCI_D0
);
710 /* Save device state */
711 pci_save_state(pdev
);
714 * Disable device to avoid any DMA traffic and
715 * interrupt from the device
717 pci_write_config_word(pdev
, PCI_COMMAND
, PCI_COMMAND_INTX_DISABLE
);
722 static void *eeh_restore_dev_state(void *data
, void *userdata
)
724 struct eeh_dev
*edev
= data
;
725 struct pci_dn
*pdn
= eeh_dev_to_pdn(edev
);
726 struct pci_dev
*pdev
= eeh_dev_to_pci_dev(edev
);
727 struct pci_dev
*dev
= userdata
;
732 /* Apply customization from firmware */
733 if (pdn
&& eeh_ops
->restore_config
)
734 eeh_ops
->restore_config(pdn
);
736 /* The caller should restore state for the specified device */
738 pci_restore_state(pdev
);
744 * pcibios_set_pcie_reset_state - Set PCI-E reset state
745 * @dev: pci device struct
746 * @state: reset state to enter
751 int pcibios_set_pcie_reset_state(struct pci_dev
*dev
, enum pcie_reset_state state
)
753 struct eeh_dev
*edev
= pci_dev_to_eeh_dev(dev
);
754 struct eeh_pe
*pe
= eeh_dev_to_pe(edev
);
757 pr_err("%s: No PE found on PCI device %s\n",
758 __func__
, pci_name(dev
));
763 case pcie_deassert_reset
:
764 eeh_ops
->reset(pe
, EEH_RESET_DEACTIVATE
);
765 eeh_unfreeze_pe(pe
, false);
766 if (!(pe
->type
& EEH_PE_VF
))
767 eeh_pe_state_clear(pe
, EEH_PE_CFG_BLOCKED
);
768 eeh_pe_dev_traverse(pe
, eeh_restore_dev_state
, dev
);
769 eeh_pe_state_clear(pe
, EEH_PE_ISOLATED
);
772 eeh_pe_state_mark_with_cfg(pe
, EEH_PE_ISOLATED
);
773 eeh_ops
->set_option(pe
, EEH_OPT_FREEZE_PE
);
774 eeh_pe_dev_traverse(pe
, eeh_disable_and_save_dev_state
, dev
);
775 if (!(pe
->type
& EEH_PE_VF
))
776 eeh_pe_state_mark(pe
, EEH_PE_CFG_BLOCKED
);
777 eeh_ops
->reset(pe
, EEH_RESET_HOT
);
779 case pcie_warm_reset
:
780 eeh_pe_state_mark_with_cfg(pe
, EEH_PE_ISOLATED
);
781 eeh_ops
->set_option(pe
, EEH_OPT_FREEZE_PE
);
782 eeh_pe_dev_traverse(pe
, eeh_disable_and_save_dev_state
, dev
);
783 if (!(pe
->type
& EEH_PE_VF
))
784 eeh_pe_state_mark(pe
, EEH_PE_CFG_BLOCKED
);
785 eeh_ops
->reset(pe
, EEH_RESET_FUNDAMENTAL
);
788 eeh_pe_state_clear(pe
, EEH_PE_ISOLATED
| EEH_PE_CFG_BLOCKED
);
796 * eeh_set_pe_freset - Check the required reset for the indicated device
798 * @flag: return value
800 * Each device might have its preferred reset type: fundamental or
801 * hot reset. The routine is used to collected the information for
802 * the indicated device and its children so that the bunch of the
803 * devices could be reset properly.
805 static void *eeh_set_dev_freset(void *data
, void *flag
)
808 unsigned int *freset
= (unsigned int *)flag
;
809 struct eeh_dev
*edev
= (struct eeh_dev
*)data
;
811 dev
= eeh_dev_to_pci_dev(edev
);
813 *freset
|= dev
->needs_freset
;
819 * eeh_pe_reset_full - Complete a full reset process on the indicated PE
822 * This function executes a full reset procedure on a PE, including setting
823 * the appropriate flags, performing a fundamental or hot reset, and then
824 * deactivating the reset status. It is designed to be used within the EEH
825 * subsystem, as opposed to eeh_pe_reset which is exported to drivers and
826 * only performs a single operation at a time.
828 * This function will attempt to reset a PE three times before failing.
830 int eeh_pe_reset_full(struct eeh_pe
*pe
)
832 int active_flags
= (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
);
833 int reset_state
= (EEH_PE_RESET
| EEH_PE_CFG_BLOCKED
);
834 int type
= EEH_RESET_HOT
;
835 unsigned int freset
= 0;
839 * Determine the type of reset to perform - hot or fundamental.
840 * Hot reset is the default operation, unless any device under the
841 * PE requires a fundamental reset.
843 eeh_pe_dev_traverse(pe
, eeh_set_dev_freset
, &freset
);
846 type
= EEH_RESET_FUNDAMENTAL
;
848 /* Mark the PE as in reset state and block config space accesses */
849 eeh_pe_state_mark(pe
, reset_state
);
851 /* Make three attempts at resetting the bus */
852 for (i
= 0; i
< 3; i
++) {
853 ret
= eeh_pe_reset(pe
, type
);
857 ret
= eeh_pe_reset(pe
, EEH_RESET_DEACTIVATE
);
861 /* Wait until the PE is in a functioning state */
862 state
= eeh_ops
->wait_state(pe
, PCI_BUS_RESET_WAIT_MSEC
);
863 if ((state
& active_flags
) == active_flags
)
867 pr_warn("%s: Unrecoverable slot failure on PHB#%x-PE#%x",
868 __func__
, pe
->phb
->global_number
, pe
->addr
);
869 ret
= -ENOTRECOVERABLE
;
873 /* Set error in case this is our last attempt */
875 pr_warn("%s: Failure %d resetting PHB#%x-PE#%x\n (%d)\n",
876 __func__
, state
, pe
->phb
->global_number
, pe
->addr
, (i
+ 1));
879 eeh_pe_state_clear(pe
, reset_state
);
884 * eeh_save_bars - Save device bars
885 * @edev: PCI device associated EEH device
887 * Save the values of the device bars. Unlike the restore
888 * routine, this routine is *not* recursive. This is because
889 * PCI devices are added individually; but, for the restore,
890 * an entire slot is reset at a time.
892 void eeh_save_bars(struct eeh_dev
*edev
)
897 pdn
= eeh_dev_to_pdn(edev
);
901 for (i
= 0; i
< 16; i
++)
902 eeh_ops
->read_config(pdn
, i
* 4, 4, &edev
->config_space
[i
]);
905 * For PCI bridges including root port, we need enable bus
906 * master explicitly. Otherwise, it can't fetch IODA table
907 * entries correctly. So we cache the bit in advance so that
908 * we can restore it after reset, either PHB range or PE range.
910 if (edev
->mode
& EEH_DEV_BRIDGE
)
911 edev
->config_space
[1] |= PCI_COMMAND_MASTER
;
915 * eeh_ops_register - Register platform dependent EEH operations
916 * @ops: platform dependent EEH operations
918 * Register the platform dependent EEH operation callback
919 * functions. The platform should call this function before
920 * any other EEH operations.
922 int __init
eeh_ops_register(struct eeh_ops
*ops
)
925 pr_warn("%s: Invalid EEH ops name for %p\n",
930 if (eeh_ops
&& eeh_ops
!= ops
) {
931 pr_warn("%s: EEH ops of platform %s already existing (%s)\n",
932 __func__
, eeh_ops
->name
, ops
->name
);
942 * eeh_ops_unregister - Unreigster platform dependent EEH operations
943 * @name: name of EEH platform operations
945 * Unregister the platform dependent EEH operation callback
948 int __exit
eeh_ops_unregister(const char *name
)
950 if (!name
|| !strlen(name
)) {
951 pr_warn("%s: Invalid EEH ops name\n",
956 if (eeh_ops
&& !strcmp(eeh_ops
->name
, name
)) {
964 static int eeh_reboot_notifier(struct notifier_block
*nb
,
965 unsigned long action
, void *unused
)
967 eeh_clear_flag(EEH_ENABLED
);
971 static struct notifier_block eeh_reboot_nb
= {
972 .notifier_call
= eeh_reboot_notifier
,
976 * eeh_init - EEH initialization
978 * Initialize EEH by trying to enable it for all of the adapters in the system.
979 * As a side effect we can determine here if eeh is supported at all.
980 * Note that we leave EEH on so failed config cycles won't cause a machine
981 * check. If a user turns off EEH for a particular adapter they are really
982 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
983 * grant access to a slot if EEH isn't enabled, and so we always enable
984 * EEH for all slots/all devices.
986 * The eeh-force-off option disables EEH checking globally, for all slots.
987 * Even if force-off is set, the EEH hardware is still enabled, so that
988 * newer systems can boot.
992 struct pci_controller
*hose
, *tmp
;
998 * We have to delay the initialization on PowerNV after
999 * the PCI hierarchy tree has been built because the PEs
1000 * are figured out based on PCI devices instead of device
1003 if (machine_is(powernv
) && cnt
++ <= 0)
1006 /* Register reboot notifier */
1007 ret
= register_reboot_notifier(&eeh_reboot_nb
);
1009 pr_warn("%s: Failed to register notifier (%d)\n",
1014 /* call platform initialization function */
1016 pr_warn("%s: Platform EEH operation not found\n",
1019 } else if ((ret
= eeh_ops
->init()))
1022 /* Initialize EEH event */
1023 ret
= eeh_event_init();
1027 /* Enable EEH for all adapters */
1028 list_for_each_entry_safe(hose
, tmp
, &hose_list
, list_node
) {
1029 pdn
= hose
->pci_data
;
1030 traverse_pci_dn(pdn
, eeh_ops
->probe
, NULL
);
1034 * Call platform post-initialization. Actually, It's good chance
1035 * to inform platform that EEH is ready to supply service if the
1036 * I/O cache stuff has been built up.
1038 if (eeh_ops
->post_init
) {
1039 ret
= eeh_ops
->post_init();
1045 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
1047 pr_info("EEH: No capable adapters found\n");
1052 core_initcall_sync(eeh_init
);
1055 * eeh_add_device_early - Enable EEH for the indicated device node
1056 * @pdn: PCI device node for which to set up EEH
1058 * This routine must be used to perform EEH initialization for PCI
1059 * devices that were added after system boot (e.g. hotplug, dlpar).
1060 * This routine must be called before any i/o is performed to the
1061 * adapter (inluding any config-space i/o).
1062 * Whether this actually enables EEH or not for this device depends
1063 * on the CEC architecture, type of the device, on earlier boot
1064 * command-line arguments & etc.
1066 void eeh_add_device_early(struct pci_dn
*pdn
)
1068 struct pci_controller
*phb
= pdn
? pdn
->phb
: NULL
;
1069 struct eeh_dev
*edev
= pdn_to_eeh_dev(pdn
);
1074 if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE
))
1077 /* USB Bus children of PCI devices will not have BUID's */
1079 (eeh_has_flag(EEH_PROBE_MODE_DEVTREE
) && 0 == phb
->buid
))
1082 eeh_ops
->probe(pdn
, NULL
);
1086 * eeh_add_device_tree_early - Enable EEH for the indicated device
1087 * @pdn: PCI device node
1089 * This routine must be used to perform EEH initialization for the
1090 * indicated PCI device that was added after system boot (e.g.
1093 void eeh_add_device_tree_early(struct pci_dn
*pdn
)
1100 list_for_each_entry(n
, &pdn
->child_list
, list
)
1101 eeh_add_device_tree_early(n
);
1102 eeh_add_device_early(pdn
);
1104 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
1107 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
1108 * @dev: pci device for which to set up EEH
1110 * This routine must be used to complete EEH initialization for PCI
1111 * devices that were added after system boot (e.g. hotplug, dlpar).
1113 void eeh_add_device_late(struct pci_dev
*dev
)
1116 struct eeh_dev
*edev
;
1118 if (!dev
|| !eeh_enabled())
1121 pr_debug("EEH: Adding device %s\n", pci_name(dev
));
1123 pdn
= pci_get_pdn_by_devfn(dev
->bus
, dev
->devfn
);
1124 edev
= pdn_to_eeh_dev(pdn
);
1125 if (edev
->pdev
== dev
) {
1126 pr_debug("EEH: Already referenced !\n");
1131 * The EEH cache might not be removed correctly because of
1132 * unbalanced kref to the device during unplug time, which
1133 * relies on pcibios_release_device(). So we have to remove
1134 * that here explicitly.
1137 eeh_rmv_from_parent_pe(edev
);
1138 eeh_addr_cache_rmv_dev(edev
->pdev
);
1139 eeh_sysfs_remove_device(edev
->pdev
);
1140 edev
->mode
&= ~EEH_DEV_SYSFS
;
1143 * We definitely should have the PCI device removed
1144 * though it wasn't correctly. So we needn't call
1145 * into error handler afterwards.
1147 edev
->mode
|= EEH_DEV_NO_HANDLER
;
1150 dev
->dev
.archdata
.edev
= NULL
;
1153 if (eeh_has_flag(EEH_PROBE_MODE_DEV
))
1154 eeh_ops
->probe(pdn
, NULL
);
1157 dev
->dev
.archdata
.edev
= edev
;
1159 eeh_addr_cache_insert_dev(dev
);
1163 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
1166 * This routine must be used to perform EEH initialization for PCI
1167 * devices which are attached to the indicated PCI bus. The PCI bus
1168 * is added after system boot through hotplug or dlpar.
1170 void eeh_add_device_tree_late(struct pci_bus
*bus
)
1172 struct pci_dev
*dev
;
1174 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1175 eeh_add_device_late(dev
);
1176 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1177 struct pci_bus
*subbus
= dev
->subordinate
;
1179 eeh_add_device_tree_late(subbus
);
1183 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late
);
1186 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1189 * This routine must be used to add EEH sysfs files for PCI
1190 * devices which are attached to the indicated PCI bus. The PCI bus
1191 * is added after system boot through hotplug or dlpar.
1193 void eeh_add_sysfs_files(struct pci_bus
*bus
)
1195 struct pci_dev
*dev
;
1197 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1198 eeh_sysfs_add_device(dev
);
1199 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1200 struct pci_bus
*subbus
= dev
->subordinate
;
1202 eeh_add_sysfs_files(subbus
);
1206 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files
);
1209 * eeh_remove_device - Undo EEH setup for the indicated pci device
1210 * @dev: pci device to be removed
1212 * This routine should be called when a device is removed from
1213 * a running system (e.g. by hotplug or dlpar). It unregisters
1214 * the PCI device from the EEH subsystem. I/O errors affecting
1215 * this device will no longer be detected after this call; thus,
1216 * i/o errors affecting this slot may leave this device unusable.
1218 void eeh_remove_device(struct pci_dev
*dev
)
1220 struct eeh_dev
*edev
;
1222 if (!dev
|| !eeh_enabled())
1224 edev
= pci_dev_to_eeh_dev(dev
);
1226 /* Unregister the device with the EEH/PCI address search system */
1227 pr_debug("EEH: Removing device %s\n", pci_name(dev
));
1229 if (!edev
|| !edev
->pdev
|| !edev
->pe
) {
1230 pr_debug("EEH: Not referenced !\n");
1235 * During the hotplug for EEH error recovery, we need the EEH
1236 * device attached to the parent PE in order for BAR restore
1237 * a bit later. So we keep it for BAR restore and remove it
1238 * from the parent PE during the BAR resotre.
1243 * The flag "in_error" is used to trace EEH devices for VFs
1244 * in error state or not. It's set in eeh_report_error(). If
1245 * it's not set, eeh_report_{reset,resume}() won't be called
1246 * for the VF EEH device.
1248 edev
->in_error
= false;
1249 dev
->dev
.archdata
.edev
= NULL
;
1250 if (!(edev
->pe
->state
& EEH_PE_KEEP
))
1251 eeh_rmv_from_parent_pe(edev
);
1253 edev
->mode
|= EEH_DEV_DISCONNECTED
;
1256 * We're removing from the PCI subsystem, that means
1257 * the PCI device driver can't support EEH or not
1258 * well. So we rely on hotplug completely to do recovery
1259 * for the specific PCI device.
1261 edev
->mode
|= EEH_DEV_NO_HANDLER
;
1263 eeh_addr_cache_rmv_dev(dev
);
1264 eeh_sysfs_remove_device(dev
);
1265 edev
->mode
&= ~EEH_DEV_SYSFS
;
1268 int eeh_unfreeze_pe(struct eeh_pe
*pe
, bool sw_state
)
1272 ret
= eeh_pci_enable(pe
, EEH_OPT_THAW_MMIO
);
1274 pr_warn("%s: Failure %d enabling IO on PHB#%x-PE#%x\n",
1275 __func__
, ret
, pe
->phb
->global_number
, pe
->addr
);
1279 ret
= eeh_pci_enable(pe
, EEH_OPT_THAW_DMA
);
1281 pr_warn("%s: Failure %d enabling DMA on PHB#%x-PE#%x\n",
1282 __func__
, ret
, pe
->phb
->global_number
, pe
->addr
);
1286 /* Clear software isolated state */
1287 if (sw_state
&& (pe
->state
& EEH_PE_ISOLATED
))
1288 eeh_pe_state_clear(pe
, EEH_PE_ISOLATED
);
1294 static struct pci_device_id eeh_reset_ids
[] = {
1295 { PCI_DEVICE(0x19a2, 0x0710) }, /* Emulex, BE */
1296 { PCI_DEVICE(0x10df, 0xe220) }, /* Emulex, Lancer */
1297 { PCI_DEVICE(0x14e4, 0x1657) }, /* Broadcom BCM5719 */
1301 static int eeh_pe_change_owner(struct eeh_pe
*pe
)
1303 struct eeh_dev
*edev
, *tmp
;
1304 struct pci_dev
*pdev
;
1305 struct pci_device_id
*id
;
1308 /* Check PE state */
1309 flags
= (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
);
1310 ret
= eeh_ops
->get_state(pe
, NULL
);
1311 if (ret
< 0 || ret
== EEH_STATE_NOT_SUPPORT
)
1314 /* Unfrozen PE, nothing to do */
1315 if ((ret
& flags
) == flags
)
1318 /* Frozen PE, check if it needs PE level reset */
1319 eeh_pe_for_each_dev(pe
, edev
, tmp
) {
1320 pdev
= eeh_dev_to_pci_dev(edev
);
1324 for (id
= &eeh_reset_ids
[0]; id
->vendor
!= 0; id
++) {
1325 if (id
->vendor
!= PCI_ANY_ID
&&
1326 id
->vendor
!= pdev
->vendor
)
1328 if (id
->device
!= PCI_ANY_ID
&&
1329 id
->device
!= pdev
->device
)
1331 if (id
->subvendor
!= PCI_ANY_ID
&&
1332 id
->subvendor
!= pdev
->subsystem_vendor
)
1334 if (id
->subdevice
!= PCI_ANY_ID
&&
1335 id
->subdevice
!= pdev
->subsystem_device
)
1338 return eeh_pe_reset_and_recover(pe
);
1342 return eeh_unfreeze_pe(pe
, true);
1346 * eeh_dev_open - Increase count of pass through devices for PE
1349 * Increase count of passed through devices for the indicated
1350 * PE. In the result, the EEH errors detected on the PE won't be
1351 * reported. The PE owner will be responsible for detection
1354 int eeh_dev_open(struct pci_dev
*pdev
)
1356 struct eeh_dev
*edev
;
1359 mutex_lock(&eeh_dev_mutex
);
1361 /* No PCI device ? */
1365 /* No EEH device or PE ? */
1366 edev
= pci_dev_to_eeh_dev(pdev
);
1367 if (!edev
|| !edev
->pe
)
1371 * The PE might have been put into frozen state, but we
1372 * didn't detect that yet. The passed through PCI devices
1373 * in frozen PE won't work properly. Clear the frozen state
1376 ret
= eeh_pe_change_owner(edev
->pe
);
1380 /* Increase PE's pass through count */
1381 atomic_inc(&edev
->pe
->pass_dev_cnt
);
1382 mutex_unlock(&eeh_dev_mutex
);
1386 mutex_unlock(&eeh_dev_mutex
);
1389 EXPORT_SYMBOL_GPL(eeh_dev_open
);
1392 * eeh_dev_release - Decrease count of pass through devices for PE
1395 * Decrease count of pass through devices for the indicated PE. If
1396 * there is no passed through device in PE, the EEH errors detected
1397 * on the PE will be reported and handled as usual.
1399 void eeh_dev_release(struct pci_dev
*pdev
)
1401 struct eeh_dev
*edev
;
1403 mutex_lock(&eeh_dev_mutex
);
1405 /* No PCI device ? */
1409 /* No EEH device ? */
1410 edev
= pci_dev_to_eeh_dev(pdev
);
1411 if (!edev
|| !edev
->pe
|| !eeh_pe_passed(edev
->pe
))
1414 /* Decrease PE's pass through count */
1415 WARN_ON(atomic_dec_if_positive(&edev
->pe
->pass_dev_cnt
) < 0);
1416 eeh_pe_change_owner(edev
->pe
);
1418 mutex_unlock(&eeh_dev_mutex
);
1420 EXPORT_SYMBOL(eeh_dev_release
);
1422 #ifdef CONFIG_IOMMU_API
1424 static int dev_has_iommu_table(struct device
*dev
, void *data
)
1426 struct pci_dev
*pdev
= to_pci_dev(dev
);
1427 struct pci_dev
**ppdev
= data
;
1432 if (dev
->iommu_group
) {
1441 * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE
1442 * @group: IOMMU group
1444 * The routine is called to convert IOMMU group to EEH PE.
1446 struct eeh_pe
*eeh_iommu_group_to_pe(struct iommu_group
*group
)
1448 struct pci_dev
*pdev
= NULL
;
1449 struct eeh_dev
*edev
;
1452 /* No IOMMU group ? */
1456 ret
= iommu_group_for_each_dev(group
, &pdev
, dev_has_iommu_table
);
1460 /* No EEH device or PE ? */
1461 edev
= pci_dev_to_eeh_dev(pdev
);
1462 if (!edev
|| !edev
->pe
)
1467 EXPORT_SYMBOL_GPL(eeh_iommu_group_to_pe
);
1469 #endif /* CONFIG_IOMMU_API */
1472 * eeh_pe_set_option - Set options for the indicated PE
1474 * @option: requested option
1476 * The routine is called to enable or disable EEH functionality
1477 * on the indicated PE, to enable IO or DMA for the frozen PE.
1479 int eeh_pe_set_option(struct eeh_pe
*pe
, int option
)
1488 * EEH functionality could possibly be disabled, just
1489 * return error for the case. And the EEH functinality
1490 * isn't expected to be disabled on one specific PE.
1493 case EEH_OPT_ENABLE
:
1494 if (eeh_enabled()) {
1495 ret
= eeh_pe_change_owner(pe
);
1500 case EEH_OPT_DISABLE
:
1502 case EEH_OPT_THAW_MMIO
:
1503 case EEH_OPT_THAW_DMA
:
1504 case EEH_OPT_FREEZE_PE
:
1505 if (!eeh_ops
|| !eeh_ops
->set_option
) {
1510 ret
= eeh_pci_enable(pe
, option
);
1513 pr_debug("%s: Option %d out of range (%d, %d)\n",
1514 __func__
, option
, EEH_OPT_DISABLE
, EEH_OPT_THAW_DMA
);
1520 EXPORT_SYMBOL_GPL(eeh_pe_set_option
);
1523 * eeh_pe_get_state - Retrieve PE's state
1526 * Retrieve the PE's state, which includes 3 aspects: enabled
1527 * DMA, enabled IO and asserted reset.
1529 int eeh_pe_get_state(struct eeh_pe
*pe
)
1531 int result
, ret
= 0;
1532 bool rst_active
, dma_en
, mmio_en
;
1538 if (!eeh_ops
|| !eeh_ops
->get_state
)
1542 * If the parent PE is owned by the host kernel and is undergoing
1543 * error recovery, we should return the PE state as temporarily
1544 * unavailable so that the error recovery on the guest is suspended
1545 * until the recovery completes on the host.
1548 !(pe
->state
& EEH_PE_REMOVED
) &&
1549 (pe
->parent
->state
& (EEH_PE_ISOLATED
| EEH_PE_RECOVERING
)))
1550 return EEH_PE_STATE_UNAVAIL
;
1552 result
= eeh_ops
->get_state(pe
, NULL
);
1553 rst_active
= !!(result
& EEH_STATE_RESET_ACTIVE
);
1554 dma_en
= !!(result
& EEH_STATE_DMA_ENABLED
);
1555 mmio_en
= !!(result
& EEH_STATE_MMIO_ENABLED
);
1558 ret
= EEH_PE_STATE_RESET
;
1559 else if (dma_en
&& mmio_en
)
1560 ret
= EEH_PE_STATE_NORMAL
;
1561 else if (!dma_en
&& !mmio_en
)
1562 ret
= EEH_PE_STATE_STOPPED_IO_DMA
;
1563 else if (!dma_en
&& mmio_en
)
1564 ret
= EEH_PE_STATE_STOPPED_DMA
;
1566 ret
= EEH_PE_STATE_UNAVAIL
;
1570 EXPORT_SYMBOL_GPL(eeh_pe_get_state
);
1572 static int eeh_pe_reenable_devices(struct eeh_pe
*pe
)
1574 struct eeh_dev
*edev
, *tmp
;
1575 struct pci_dev
*pdev
;
1578 /* Restore config space */
1579 eeh_pe_restore_bars(pe
);
1582 * Reenable PCI devices as the devices passed
1583 * through are always enabled before the reset.
1585 eeh_pe_for_each_dev(pe
, edev
, tmp
) {
1586 pdev
= eeh_dev_to_pci_dev(edev
);
1590 ret
= pci_reenable_device(pdev
);
1592 pr_warn("%s: Failure %d reenabling %s\n",
1593 __func__
, ret
, pci_name(pdev
));
1598 /* The PE is still in frozen state */
1599 return eeh_unfreeze_pe(pe
, true);
1604 * eeh_pe_reset - Issue PE reset according to specified type
1606 * @option: reset type
1608 * The routine is called to reset the specified PE with the
1609 * indicated type, either fundamental reset or hot reset.
1610 * PE reset is the most important part for error recovery.
1612 int eeh_pe_reset(struct eeh_pe
*pe
, int option
)
1620 if (!eeh_ops
|| !eeh_ops
->set_option
|| !eeh_ops
->reset
)
1624 case EEH_RESET_DEACTIVATE
:
1625 ret
= eeh_ops
->reset(pe
, option
);
1626 eeh_pe_state_clear(pe
, EEH_PE_CFG_BLOCKED
);
1630 ret
= eeh_pe_reenable_devices(pe
);
1633 case EEH_RESET_FUNDAMENTAL
:
1635 * Proactively freeze the PE to drop all MMIO access
1636 * during reset, which should be banned as it's always
1637 * cause recursive EEH error.
1639 eeh_ops
->set_option(pe
, EEH_OPT_FREEZE_PE
);
1641 eeh_pe_state_mark(pe
, EEH_PE_CFG_BLOCKED
);
1642 ret
= eeh_ops
->reset(pe
, option
);
1645 pr_debug("%s: Unsupported option %d\n",
1652 EXPORT_SYMBOL_GPL(eeh_pe_reset
);
1655 * eeh_pe_configure - Configure PCI bridges after PE reset
1658 * The routine is called to restore the PCI config space for
1659 * those PCI devices, especially PCI bridges affected by PE
1660 * reset issued previously.
1662 int eeh_pe_configure(struct eeh_pe
*pe
)
1672 EXPORT_SYMBOL_GPL(eeh_pe_configure
);
1675 * eeh_pe_inject_err - Injecting the specified PCI error to the indicated PE
1676 * @pe: the indicated PE
1678 * @function: error function
1680 * @mask: address mask
1682 * The routine is called to inject the specified PCI error, which
1683 * is determined by @type and @function, to the indicated PE for
1686 int eeh_pe_inject_err(struct eeh_pe
*pe
, int type
, int func
,
1687 unsigned long addr
, unsigned long mask
)
1693 /* Unsupported operation ? */
1694 if (!eeh_ops
|| !eeh_ops
->err_inject
)
1697 /* Check on PCI error type */
1698 if (type
!= EEH_ERR_TYPE_32
&& type
!= EEH_ERR_TYPE_64
)
1701 /* Check on PCI error function */
1702 if (func
< EEH_ERR_FUNC_MIN
|| func
> EEH_ERR_FUNC_MAX
)
1705 return eeh_ops
->err_inject(pe
, type
, func
, addr
, mask
);
1707 EXPORT_SYMBOL_GPL(eeh_pe_inject_err
);
1709 static int proc_eeh_show(struct seq_file
*m
, void *v
)
1711 if (!eeh_enabled()) {
1712 seq_printf(m
, "EEH Subsystem is globally disabled\n");
1713 seq_printf(m
, "eeh_total_mmio_ffs=%llu\n", eeh_stats
.total_mmio_ffs
);
1715 seq_printf(m
, "EEH Subsystem is enabled\n");
1718 "no device node=%llu\n"
1719 "no config address=%llu\n"
1720 "check not wanted=%llu\n"
1721 "eeh_total_mmio_ffs=%llu\n"
1722 "eeh_false_positives=%llu\n"
1723 "eeh_slot_resets=%llu\n",
1724 eeh_stats
.no_device
,
1726 eeh_stats
.no_cfg_addr
,
1727 eeh_stats
.ignored_check
,
1728 eeh_stats
.total_mmio_ffs
,
1729 eeh_stats
.false_positives
,
1730 eeh_stats
.slot_resets
);
1736 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
1738 return single_open(file
, proc_eeh_show
, NULL
);
1741 static const struct file_operations proc_eeh_operations
= {
1742 .open
= proc_eeh_open
,
1744 .llseek
= seq_lseek
,
1745 .release
= single_release
,
1748 #ifdef CONFIG_DEBUG_FS
1749 static int eeh_enable_dbgfs_set(void *data
, u64 val
)
1752 eeh_clear_flag(EEH_FORCE_DISABLED
);
1754 eeh_add_flag(EEH_FORCE_DISABLED
);
1756 /* Notify the backend */
1757 if (eeh_ops
->post_init
)
1758 eeh_ops
->post_init();
1763 static int eeh_enable_dbgfs_get(void *data
, u64
*val
)
1772 static int eeh_freeze_dbgfs_set(void *data
, u64 val
)
1774 eeh_max_freezes
= val
;
1778 static int eeh_freeze_dbgfs_get(void *data
, u64
*val
)
1780 *val
= eeh_max_freezes
;
1784 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops
, eeh_enable_dbgfs_get
,
1785 eeh_enable_dbgfs_set
, "0x%llx\n");
1786 DEFINE_SIMPLE_ATTRIBUTE(eeh_freeze_dbgfs_ops
, eeh_freeze_dbgfs_get
,
1787 eeh_freeze_dbgfs_set
, "0x%llx\n");
1790 static int __init
eeh_init_proc(void)
1792 if (machine_is(pseries
) || machine_is(powernv
)) {
1793 proc_create("powerpc/eeh", 0, NULL
, &proc_eeh_operations
);
1794 #ifdef CONFIG_DEBUG_FS
1795 debugfs_create_file("eeh_enable", 0600,
1796 powerpc_debugfs_root
, NULL
,
1797 &eeh_enable_dbgfs_ops
);
1798 debugfs_create_file("eeh_max_freezes", 0600,
1799 powerpc_debugfs_root
, NULL
,
1800 &eeh_freeze_dbgfs_ops
);
1806 __initcall(eeh_init_proc
);