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powerpc: Fix denormalized exception handler
[mirror_ubuntu-zesty-kernel.git] / arch / powerpc / kernel / exceptions-64s.S
1 /*
2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
6 *
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
9 *
10 * Most of this originates from head_64.S and thus has the same
11 * copyright history.
12 *
13 */
14
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18
19 /*
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x17ff : pSeries Interrupt prologs
23 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
24 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
25 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
26 * 0x7000 - 0x7fff : FWNMI data area
27 * 0x8000 - 0x8fff : Initial (CPU0) segment table
28 * 0x9000 - : Early init and support code
29 */
30 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
31 #define SYSCALL_PSERIES_1 \
32 BEGIN_FTR_SECTION \
33 cmpdi r0,0x1ebe ; \
34 beq- 1f ; \
35 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
36 mr r9,r13 ; \
37 GET_PACA(r13) ; \
38 mfspr r11,SPRN_SRR0 ; \
39 0:
40
41 #define SYSCALL_PSERIES_2_RFID \
42 mfspr r12,SPRN_SRR1 ; \
43 ld r10,PACAKBASE(r13) ; \
44 LOAD_HANDLER(r10, system_call_entry) ; \
45 mtspr SPRN_SRR0,r10 ; \
46 ld r10,PACAKMSR(r13) ; \
47 mtspr SPRN_SRR1,r10 ; \
48 rfid ; \
49 b . ; /* prevent speculative execution */
50
51 #define SYSCALL_PSERIES_3 \
52 /* Fast LE/BE switch system call */ \
53 1: mfspr r12,SPRN_SRR1 ; \
54 xori r12,r12,MSR_LE ; \
55 mtspr SPRN_SRR1,r12 ; \
56 rfid ; /* return to userspace */ \
57 b . ; \
58 2: mfspr r12,SPRN_SRR1 ; \
59 andi. r12,r12,MSR_PR ; \
60 bne 0b ; \
61 mtspr SPRN_SRR0,r3 ; \
62 mtspr SPRN_SRR1,r4 ; \
63 mtspr SPRN_SDR1,r5 ; \
64 rfid ; \
65 b . ; /* prevent speculative execution */
66
67 #if defined(CONFIG_RELOCATABLE)
68 /*
69 * We can't branch directly; in the direct case we use LR
70 * and system_call_entry restores LR. (We thus need to move
71 * LR to r10 in the RFID case too.)
72 */
73 #define SYSCALL_PSERIES_2_DIRECT \
74 mflr r10 ; \
75 ld r12,PACAKBASE(r13) ; \
76 LOAD_HANDLER(r12, system_call_entry_direct) ; \
77 mtctr r12 ; \
78 mfspr r12,SPRN_SRR1 ; \
79 /* Re-use of r13... No spare regs to do this */ \
80 li r13,MSR_RI ; \
81 mtmsrd r13,1 ; \
82 GET_PACA(r13) ; /* get r13 back */ \
83 bctr ;
84 #else
85 /* We can branch directly */
86 #define SYSCALL_PSERIES_2_DIRECT \
87 mfspr r12,SPRN_SRR1 ; \
88 li r10,MSR_RI ; \
89 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
90 b system_call_entry_direct ;
91 #endif
92
93 /*
94 * This is the start of the interrupt handlers for pSeries
95 * This code runs with relocation off.
96 * Code from here to __end_interrupts gets copied down to real
97 * address 0x100 when we are running a relocatable kernel.
98 * Therefore any relative branches in this section must only
99 * branch to labels in this section.
100 */
101 . = 0x100
102 .globl __start_interrupts
103 __start_interrupts:
104
105 .globl system_reset_pSeries;
106 system_reset_pSeries:
107 HMT_MEDIUM_PPR_DISCARD
108 SET_SCRATCH0(r13)
109 #ifdef CONFIG_PPC_P7_NAP
110 BEGIN_FTR_SECTION
111 /* Running native on arch 2.06 or later, check if we are
112 * waking up from nap. We only handle no state loss and
113 * supervisor state loss. We do -not- handle hypervisor
114 * state loss at this time.
115 */
116 mfspr r13,SPRN_SRR1
117 rlwinm. r13,r13,47-31,30,31
118 beq 9f
119
120 /* waking up from powersave (nap) state */
121 cmpwi cr1,r13,2
122 /* Total loss of HV state is fatal, we could try to use the
123 * PIR to locate a PACA, then use an emergency stack etc...
124 * but for now, let's just stay stuck here
125 */
126 bgt cr1,.
127 GET_PACA(r13)
128
129 #ifdef CONFIG_KVM_BOOK3S_64_HV
130 li r0,KVM_HWTHREAD_IN_KERNEL
131 stb r0,HSTATE_HWTHREAD_STATE(r13)
132 /* Order setting hwthread_state vs. testing hwthread_req */
133 sync
134 lbz r0,HSTATE_HWTHREAD_REQ(r13)
135 cmpwi r0,0
136 beq 1f
137 b kvm_start_guest
138 1:
139 #endif
140
141 beq cr1,2f
142 b .power7_wakeup_noloss
143 2: b .power7_wakeup_loss
144 9:
145 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
146 #endif /* CONFIG_PPC_P7_NAP */
147 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
148 NOTEST, 0x100)
149
150 . = 0x200
151 machine_check_pSeries_1:
152 /* This is moved out of line as it can be patched by FW, but
153 * some code path might still want to branch into the original
154 * vector
155 */
156 HMT_MEDIUM_PPR_DISCARD
157 SET_SCRATCH0(r13) /* save r13 */
158 EXCEPTION_PROLOG_0(PACA_EXMC)
159 b machine_check_pSeries_0
160
161 . = 0x300
162 .globl data_access_pSeries
163 data_access_pSeries:
164 HMT_MEDIUM_PPR_DISCARD
165 SET_SCRATCH0(r13)
166 BEGIN_FTR_SECTION
167 b data_access_check_stab
168 data_access_not_stab:
169 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
170 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
171 KVMTEST, 0x300)
172
173 . = 0x380
174 .globl data_access_slb_pSeries
175 data_access_slb_pSeries:
176 HMT_MEDIUM_PPR_DISCARD
177 SET_SCRATCH0(r13)
178 EXCEPTION_PROLOG_0(PACA_EXSLB)
179 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
180 std r3,PACA_EXSLB+EX_R3(r13)
181 mfspr r3,SPRN_DAR
182 #ifdef __DISABLED__
183 /* Keep that around for when we re-implement dynamic VSIDs */
184 cmpdi r3,0
185 bge slb_miss_user_pseries
186 #endif /* __DISABLED__ */
187 mfspr r12,SPRN_SRR1
188 #ifndef CONFIG_RELOCATABLE
189 b .slb_miss_realmode
190 #else
191 /*
192 * We can't just use a direct branch to .slb_miss_realmode
193 * because the distance from here to there depends on where
194 * the kernel ends up being put.
195 */
196 mfctr r11
197 ld r10,PACAKBASE(r13)
198 LOAD_HANDLER(r10, .slb_miss_realmode)
199 mtctr r10
200 bctr
201 #endif
202
203 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
204
205 . = 0x480
206 .globl instruction_access_slb_pSeries
207 instruction_access_slb_pSeries:
208 HMT_MEDIUM_PPR_DISCARD
209 SET_SCRATCH0(r13)
210 EXCEPTION_PROLOG_0(PACA_EXSLB)
211 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
212 std r3,PACA_EXSLB+EX_R3(r13)
213 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
214 #ifdef __DISABLED__
215 /* Keep that around for when we re-implement dynamic VSIDs */
216 cmpdi r3,0
217 bge slb_miss_user_pseries
218 #endif /* __DISABLED__ */
219 mfspr r12,SPRN_SRR1
220 #ifndef CONFIG_RELOCATABLE
221 b .slb_miss_realmode
222 #else
223 mfctr r11
224 ld r10,PACAKBASE(r13)
225 LOAD_HANDLER(r10, .slb_miss_realmode)
226 mtctr r10
227 bctr
228 #endif
229
230 /* We open code these as we can't have a ". = x" (even with
231 * x = "." within a feature section
232 */
233 . = 0x500;
234 .globl hardware_interrupt_pSeries;
235 .globl hardware_interrupt_hv;
236 hardware_interrupt_pSeries:
237 hardware_interrupt_hv:
238 HMT_MEDIUM_PPR_DISCARD
239 BEGIN_FTR_SECTION
240 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
241 EXC_HV, SOFTEN_TEST_HV)
242 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
243 FTR_SECTION_ELSE
244 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
245 EXC_STD, SOFTEN_TEST_HV_201)
246 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
247 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
248
249 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
250 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
251
252 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
253 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
254
255 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
256 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
257
258 . = 0x900
259 .globl decrementer_pSeries
260 decrementer_pSeries:
261 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
262
263 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
264
265 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
266 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
267
268 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
269 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
270
271 . = 0xc00
272 .globl system_call_pSeries
273 system_call_pSeries:
274 HMT_MEDIUM
275 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
276 SET_SCRATCH0(r13)
277 GET_PACA(r13)
278 std r9,PACA_EXGEN+EX_R9(r13)
279 std r10,PACA_EXGEN+EX_R10(r13)
280 mfcr r9
281 KVMTEST(0xc00)
282 GET_SCRATCH0(r13)
283 #endif
284 SYSCALL_PSERIES_1
285 SYSCALL_PSERIES_2_RFID
286 SYSCALL_PSERIES_3
287 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
288
289 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
290 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
291
292 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
293 * out of line to handle them
294 */
295 . = 0xe00
296 hv_exception_trampoline:
297 SET_SCRATCH0(r13)
298 EXCEPTION_PROLOG_0(PACA_EXGEN)
299 b h_data_storage_hv
300
301 . = 0xe20
302 SET_SCRATCH0(r13)
303 EXCEPTION_PROLOG_0(PACA_EXGEN)
304 b h_instr_storage_hv
305
306 . = 0xe40
307 SET_SCRATCH0(r13)
308 EXCEPTION_PROLOG_0(PACA_EXGEN)
309 b emulation_assist_hv
310
311 . = 0xe60
312 SET_SCRATCH0(r13)
313 EXCEPTION_PROLOG_0(PACA_EXGEN)
314 b hmi_exception_hv
315
316 . = 0xe80
317 SET_SCRATCH0(r13)
318 EXCEPTION_PROLOG_0(PACA_EXGEN)
319 b h_doorbell_hv
320
321 /* We need to deal with the Altivec unavailable exception
322 * here which is at 0xf20, thus in the middle of the
323 * prolog code of the PerformanceMonitor one. A little
324 * trickery is thus necessary
325 */
326 performance_monitor_pSeries_1:
327 . = 0xf00
328 SET_SCRATCH0(r13)
329 EXCEPTION_PROLOG_0(PACA_EXGEN)
330 b performance_monitor_pSeries
331
332 altivec_unavailable_pSeries_1:
333 . = 0xf20
334 SET_SCRATCH0(r13)
335 EXCEPTION_PROLOG_0(PACA_EXGEN)
336 b altivec_unavailable_pSeries
337
338 vsx_unavailable_pSeries_1:
339 . = 0xf40
340 SET_SCRATCH0(r13)
341 EXCEPTION_PROLOG_0(PACA_EXGEN)
342 b vsx_unavailable_pSeries
343
344 facility_unavailable_trampoline:
345 . = 0xf60
346 SET_SCRATCH0(r13)
347 EXCEPTION_PROLOG_0(PACA_EXGEN)
348 b facility_unavailable_pSeries
349
350 hv_facility_unavailable_trampoline:
351 . = 0xf80
352 SET_SCRATCH0(r13)
353 EXCEPTION_PROLOG_0(PACA_EXGEN)
354 b facility_unavailable_hv
355
356 #ifdef CONFIG_CBE_RAS
357 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
358 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
359 #endif /* CONFIG_CBE_RAS */
360
361 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
362 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
363
364 . = 0x1500
365 .global denorm_exception_hv
366 denorm_exception_hv:
367 HMT_MEDIUM_PPR_DISCARD
368 mtspr SPRN_SPRG_HSCRATCH0,r13
369 EXCEPTION_PROLOG_0(PACA_EXGEN)
370 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
371
372 #ifdef CONFIG_PPC_DENORMALISATION
373 mfspr r10,SPRN_HSRR1
374 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
375 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
376 addi r11,r11,-4 /* HSRR0 is next instruction */
377 bne+ denorm_assist
378 #endif
379
380 KVMTEST(0x1500)
381 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
382 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
383
384 #ifdef CONFIG_CBE_RAS
385 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
386 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
387 #endif /* CONFIG_CBE_RAS */
388
389 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
390 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
391
392 #ifdef CONFIG_CBE_RAS
393 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
394 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
395 #else
396 . = 0x1800
397 #endif /* CONFIG_CBE_RAS */
398
399
400 /*** Out of line interrupts support ***/
401
402 .align 7
403 /* moved from 0x200 */
404 machine_check_pSeries:
405 .globl machine_check_fwnmi
406 machine_check_fwnmi:
407 HMT_MEDIUM_PPR_DISCARD
408 SET_SCRATCH0(r13) /* save r13 */
409 EXCEPTION_PROLOG_0(PACA_EXMC)
410 machine_check_pSeries_0:
411 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
412 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
413 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
414
415 /* moved from 0x300 */
416 data_access_check_stab:
417 GET_PACA(r13)
418 std r9,PACA_EXSLB+EX_R9(r13)
419 std r10,PACA_EXSLB+EX_R10(r13)
420 mfspr r10,SPRN_DAR
421 mfspr r9,SPRN_DSISR
422 srdi r10,r10,60
423 rlwimi r10,r9,16,0x20
424 #ifdef CONFIG_KVM_BOOK3S_PR
425 lbz r9,HSTATE_IN_GUEST(r13)
426 rlwimi r10,r9,8,0x300
427 #endif
428 mfcr r9
429 cmpwi r10,0x2c
430 beq do_stab_bolted_pSeries
431 mtcrf 0x80,r9
432 ld r9,PACA_EXSLB+EX_R9(r13)
433 ld r10,PACA_EXSLB+EX_R10(r13)
434 b data_access_not_stab
435 do_stab_bolted_pSeries:
436 std r11,PACA_EXSLB+EX_R11(r13)
437 std r12,PACA_EXSLB+EX_R12(r13)
438 GET_SCRATCH0(r10)
439 std r10,PACA_EXSLB+EX_R13(r13)
440 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
441
442 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
443 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
444 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
445 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
446 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
447 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
448
449 #ifdef CONFIG_PPC_DENORMALISATION
450 denorm_assist:
451 BEGIN_FTR_SECTION
452 /*
453 * To denormalise we need to move a copy of the register to itself.
454 * For POWER6 do that here for all FP regs.
455 */
456 mfmsr r10
457 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
458 xori r10,r10,(MSR_FE0|MSR_FE1)
459 mtmsrd r10
460 sync
461
462 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
463 #define FMR4(n) FMR2(n) ; FMR2(n+2)
464 #define FMR8(n) FMR4(n) ; FMR4(n+4)
465 #define FMR16(n) FMR8(n) ; FMR8(n+8)
466 #define FMR32(n) FMR16(n) ; FMR16(n+16)
467 FMR32(0)
468
469 FTR_SECTION_ELSE
470 /*
471 * To denormalise we need to move a copy of the register to itself.
472 * For POWER7 do that here for the first 32 VSX registers only.
473 */
474 mfmsr r10
475 oris r10,r10,MSR_VSX@h
476 mtmsrd r10
477 sync
478
479 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
480 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
481 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
482 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
483 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
484 XVCPSGNDP32(0)
485
486 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
487
488 BEGIN_FTR_SECTION
489 b denorm_done
490 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
491 /*
492 * To denormalise we need to move a copy of the register to itself.
493 * For POWER8 we need to do that for all 64 VSX registers
494 */
495 XVCPSGNDP32(32)
496 denorm_done:
497 mtspr SPRN_HSRR0,r11
498 mtcrf 0x80,r9
499 ld r9,PACA_EXGEN+EX_R9(r13)
500 RESTORE_PPR_PACA(PACA_EXGEN, r10)
501 BEGIN_FTR_SECTION
502 ld r10,PACA_EXGEN+EX_CFAR(r13)
503 mtspr SPRN_CFAR,r10
504 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
505 ld r10,PACA_EXGEN+EX_R10(r13)
506 ld r11,PACA_EXGEN+EX_R11(r13)
507 ld r12,PACA_EXGEN+EX_R12(r13)
508 ld r13,PACA_EXGEN+EX_R13(r13)
509 HRFID
510 b .
511 #endif
512
513 .align 7
514 /* moved from 0xe00 */
515 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
516 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
517 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
518 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
519 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
520 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
521 STD_EXCEPTION_HV_OOL(0xe62, hmi_exception) /* need to flush cache ? */
522 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
523 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
524 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
525
526 /* moved from 0xf00 */
527 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
528 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
529 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
530 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
531 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
532 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
533 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
534 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60)
535 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
536 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
537
538 /*
539 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
540 * - If it was a decrementer interrupt, we bump the dec to max and and return.
541 * - If it was a doorbell we return immediately since doorbells are edge
542 * triggered and won't automatically refire.
543 * - else we hard disable and return.
544 * This is called with r10 containing the value to OR to the paca field.
545 */
546 #define MASKED_INTERRUPT(_H) \
547 masked_##_H##interrupt: \
548 std r11,PACA_EXGEN+EX_R11(r13); \
549 lbz r11,PACAIRQHAPPENED(r13); \
550 or r11,r11,r10; \
551 stb r11,PACAIRQHAPPENED(r13); \
552 cmpwi r10,PACA_IRQ_DEC; \
553 bne 1f; \
554 lis r10,0x7fff; \
555 ori r10,r10,0xffff; \
556 mtspr SPRN_DEC,r10; \
557 b 2f; \
558 1: cmpwi r10,PACA_IRQ_DBELL; \
559 beq 2f; \
560 mfspr r10,SPRN_##_H##SRR1; \
561 rldicl r10,r10,48,1; /* clear MSR_EE */ \
562 rotldi r10,r10,16; \
563 mtspr SPRN_##_H##SRR1,r10; \
564 2: mtcrf 0x80,r9; \
565 ld r9,PACA_EXGEN+EX_R9(r13); \
566 ld r10,PACA_EXGEN+EX_R10(r13); \
567 ld r11,PACA_EXGEN+EX_R11(r13); \
568 GET_SCRATCH0(r13); \
569 ##_H##rfid; \
570 b .
571
572 MASKED_INTERRUPT()
573 MASKED_INTERRUPT(H)
574
575 /*
576 * Called from arch_local_irq_enable when an interrupt needs
577 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
578 * which kind of interrupt. MSR:EE is already off. We generate a
579 * stackframe like if a real interrupt had happened.
580 *
581 * Note: While MSR:EE is off, we need to make sure that _MSR
582 * in the generated frame has EE set to 1 or the exception
583 * handler will not properly re-enable them.
584 */
585 _GLOBAL(__replay_interrupt)
586 /* We are going to jump to the exception common code which
587 * will retrieve various register values from the PACA which
588 * we don't give a damn about, so we don't bother storing them.
589 */
590 mfmsr r12
591 mflr r11
592 mfcr r9
593 ori r12,r12,MSR_EE
594 cmpwi r3,0x900
595 beq decrementer_common
596 cmpwi r3,0x500
597 beq hardware_interrupt_common
598 BEGIN_FTR_SECTION
599 cmpwi r3,0xe80
600 beq h_doorbell_common
601 FTR_SECTION_ELSE
602 cmpwi r3,0xa00
603 beq doorbell_super_common
604 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
605 blr
606
607 #ifdef CONFIG_PPC_PSERIES
608 /*
609 * Vectors for the FWNMI option. Share common code.
610 */
611 .globl system_reset_fwnmi
612 .align 7
613 system_reset_fwnmi:
614 HMT_MEDIUM_PPR_DISCARD
615 SET_SCRATCH0(r13) /* save r13 */
616 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
617 NOTEST, 0x100)
618
619 #endif /* CONFIG_PPC_PSERIES */
620
621 #ifdef __DISABLED__
622 /*
623 * This is used for when the SLB miss handler has to go virtual,
624 * which doesn't happen for now anymore but will once we re-implement
625 * dynamic VSIDs for shared page tables
626 */
627 slb_miss_user_pseries:
628 std r10,PACA_EXGEN+EX_R10(r13)
629 std r11,PACA_EXGEN+EX_R11(r13)
630 std r12,PACA_EXGEN+EX_R12(r13)
631 GET_SCRATCH0(r10)
632 ld r11,PACA_EXSLB+EX_R9(r13)
633 ld r12,PACA_EXSLB+EX_R3(r13)
634 std r10,PACA_EXGEN+EX_R13(r13)
635 std r11,PACA_EXGEN+EX_R9(r13)
636 std r12,PACA_EXGEN+EX_R3(r13)
637 clrrdi r12,r13,32
638 mfmsr r10
639 mfspr r11,SRR0 /* save SRR0 */
640 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
641 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
642 mtspr SRR0,r12
643 mfspr r12,SRR1 /* and SRR1 */
644 mtspr SRR1,r10
645 rfid
646 b . /* prevent spec. execution */
647 #endif /* __DISABLED__ */
648
649 /*
650 * Code from here down to __end_handlers is invoked from the
651 * exception prologs above. Because the prologs assemble the
652 * addresses of these handlers using the LOAD_HANDLER macro,
653 * which uses an ori instruction, these handlers must be in
654 * the first 64k of the kernel image.
655 */
656
657 /*** Common interrupt handlers ***/
658
659 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
660
661 /*
662 * Machine check is different because we use a different
663 * save area: PACA_EXMC instead of PACA_EXGEN.
664 */
665 .align 7
666 .globl machine_check_common
667 machine_check_common:
668
669 mfspr r10,SPRN_DAR
670 std r10,PACA_EXGEN+EX_DAR(r13)
671 mfspr r10,SPRN_DSISR
672 stw r10,PACA_EXGEN+EX_DSISR(r13)
673 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
674 FINISH_NAP
675 DISABLE_INTS
676 ld r3,PACA_EXGEN+EX_DAR(r13)
677 lwz r4,PACA_EXGEN+EX_DSISR(r13)
678 std r3,_DAR(r1)
679 std r4,_DSISR(r1)
680 bl .save_nvgprs
681 addi r3,r1,STACK_FRAME_OVERHEAD
682 bl .machine_check_exception
683 b .ret_from_except
684
685 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
686 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
687 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
688 #ifdef CONFIG_PPC_DOORBELL
689 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
690 #else
691 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .unknown_exception)
692 #endif
693 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
694 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
695 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
696 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .emulation_assist_interrupt)
697 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
698 #ifdef CONFIG_PPC_DOORBELL
699 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .doorbell_exception)
700 #else
701 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .unknown_exception)
702 #endif
703 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
704 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
705 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception)
706 #ifdef CONFIG_ALTIVEC
707 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
708 #else
709 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
710 #endif
711 #ifdef CONFIG_CBE_RAS
712 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
713 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
714 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
715 #endif /* CONFIG_CBE_RAS */
716
717 /*
718 * Relocation-on interrupts: A subset of the interrupts can be delivered
719 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
720 * it. Addresses are the same as the original interrupt addresses, but
721 * offset by 0xc000000000004000.
722 * It's impossible to receive interrupts below 0x300 via this mechanism.
723 * KVM: None of these traps are from the guest ; anything that escalated
724 * to HV=1 from HV=0 is delivered via real mode handlers.
725 */
726
727 /*
728 * This uses the standard macro, since the original 0x300 vector
729 * only has extra guff for STAB-based processors -- which never
730 * come here.
731 */
732 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
733 . = 0x4380
734 .globl data_access_slb_relon_pSeries
735 data_access_slb_relon_pSeries:
736 SET_SCRATCH0(r13)
737 EXCEPTION_PROLOG_0(PACA_EXSLB)
738 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
739 std r3,PACA_EXSLB+EX_R3(r13)
740 mfspr r3,SPRN_DAR
741 mfspr r12,SPRN_SRR1
742 #ifndef CONFIG_RELOCATABLE
743 b .slb_miss_realmode
744 #else
745 /*
746 * We can't just use a direct branch to .slb_miss_realmode
747 * because the distance from here to there depends on where
748 * the kernel ends up being put.
749 */
750 mfctr r11
751 ld r10,PACAKBASE(r13)
752 LOAD_HANDLER(r10, .slb_miss_realmode)
753 mtctr r10
754 bctr
755 #endif
756
757 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
758 . = 0x4480
759 .globl instruction_access_slb_relon_pSeries
760 instruction_access_slb_relon_pSeries:
761 SET_SCRATCH0(r13)
762 EXCEPTION_PROLOG_0(PACA_EXSLB)
763 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
764 std r3,PACA_EXSLB+EX_R3(r13)
765 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
766 mfspr r12,SPRN_SRR1
767 #ifndef CONFIG_RELOCATABLE
768 b .slb_miss_realmode
769 #else
770 mfctr r11
771 ld r10,PACAKBASE(r13)
772 LOAD_HANDLER(r10, .slb_miss_realmode)
773 mtctr r10
774 bctr
775 #endif
776
777 . = 0x4500
778 .globl hardware_interrupt_relon_pSeries;
779 .globl hardware_interrupt_relon_hv;
780 hardware_interrupt_relon_pSeries:
781 hardware_interrupt_relon_hv:
782 BEGIN_FTR_SECTION
783 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
784 FTR_SECTION_ELSE
785 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
786 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
787 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
788 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
789 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
790 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
791 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
792 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
793 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
794
795 . = 0x4c00
796 .globl system_call_relon_pSeries
797 system_call_relon_pSeries:
798 HMT_MEDIUM
799 SYSCALL_PSERIES_1
800 SYSCALL_PSERIES_2_DIRECT
801 SYSCALL_PSERIES_3
802
803 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
804
805 . = 0x4e00
806 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
807
808 . = 0x4e20
809 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
810
811 . = 0x4e40
812 SET_SCRATCH0(r13)
813 EXCEPTION_PROLOG_0(PACA_EXGEN)
814 b emulation_assist_relon_hv
815
816 . = 0x4e60
817 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
818
819 . = 0x4e80
820 SET_SCRATCH0(r13)
821 EXCEPTION_PROLOG_0(PACA_EXGEN)
822 b h_doorbell_relon_hv
823
824 performance_monitor_relon_pSeries_1:
825 . = 0x4f00
826 SET_SCRATCH0(r13)
827 EXCEPTION_PROLOG_0(PACA_EXGEN)
828 b performance_monitor_relon_pSeries
829
830 altivec_unavailable_relon_pSeries_1:
831 . = 0x4f20
832 SET_SCRATCH0(r13)
833 EXCEPTION_PROLOG_0(PACA_EXGEN)
834 b altivec_unavailable_relon_pSeries
835
836 vsx_unavailable_relon_pSeries_1:
837 . = 0x4f40
838 SET_SCRATCH0(r13)
839 EXCEPTION_PROLOG_0(PACA_EXGEN)
840 b vsx_unavailable_relon_pSeries
841
842 facility_unavailable_relon_trampoline:
843 . = 0x4f60
844 SET_SCRATCH0(r13)
845 EXCEPTION_PROLOG_0(PACA_EXGEN)
846 b facility_unavailable_relon_pSeries
847
848 hv_facility_unavailable_relon_trampoline:
849 . = 0x4f80
850 SET_SCRATCH0(r13)
851 EXCEPTION_PROLOG_0(PACA_EXGEN)
852 b facility_unavailable_relon_hv
853
854 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
855 #ifdef CONFIG_PPC_DENORMALISATION
856 . = 0x5500
857 b denorm_exception_hv
858 #endif
859 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
860
861 /* Other future vectors */
862 .align 7
863 .globl __end_interrupts
864 __end_interrupts:
865
866 .align 7
867 system_call_entry_direct:
868 #if defined(CONFIG_RELOCATABLE)
869 /* The first level prologue may have used LR to get here, saving
870 * orig in r10. To save hacking/ifdeffing common code, restore here.
871 */
872 mtlr r10
873 #endif
874 system_call_entry:
875 b system_call_common
876
877 ppc64_runlatch_on_trampoline:
878 b .__ppc64_runlatch_on
879
880 /*
881 * Here we have detected that the kernel stack pointer is bad.
882 * R9 contains the saved CR, r13 points to the paca,
883 * r10 contains the (bad) kernel stack pointer,
884 * r11 and r12 contain the saved SRR0 and SRR1.
885 * We switch to using an emergency stack, save the registers there,
886 * and call kernel_bad_stack(), which panics.
887 */
888 bad_stack:
889 ld r1,PACAEMERGSP(r13)
890 subi r1,r1,64+INT_FRAME_SIZE
891 std r9,_CCR(r1)
892 std r10,GPR1(r1)
893 std r11,_NIP(r1)
894 std r12,_MSR(r1)
895 mfspr r11,SPRN_DAR
896 mfspr r12,SPRN_DSISR
897 std r11,_DAR(r1)
898 std r12,_DSISR(r1)
899 mflr r10
900 mfctr r11
901 mfxer r12
902 std r10,_LINK(r1)
903 std r11,_CTR(r1)
904 std r12,_XER(r1)
905 SAVE_GPR(0,r1)
906 SAVE_GPR(2,r1)
907 ld r10,EX_R3(r3)
908 std r10,GPR3(r1)
909 SAVE_GPR(4,r1)
910 SAVE_4GPRS(5,r1)
911 ld r9,EX_R9(r3)
912 ld r10,EX_R10(r3)
913 SAVE_2GPRS(9,r1)
914 ld r9,EX_R11(r3)
915 ld r10,EX_R12(r3)
916 ld r11,EX_R13(r3)
917 std r9,GPR11(r1)
918 std r10,GPR12(r1)
919 std r11,GPR13(r1)
920 BEGIN_FTR_SECTION
921 ld r10,EX_CFAR(r3)
922 std r10,ORIG_GPR3(r1)
923 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
924 SAVE_8GPRS(14,r1)
925 SAVE_10GPRS(22,r1)
926 lhz r12,PACA_TRAP_SAVE(r13)
927 std r12,_TRAP(r1)
928 addi r11,r1,INT_FRAME_SIZE
929 std r11,0(r1)
930 li r12,0
931 std r12,0(r11)
932 ld r2,PACATOC(r13)
933 ld r11,exception_marker@toc(r2)
934 std r12,RESULT(r1)
935 std r11,STACK_FRAME_OVERHEAD-16(r1)
936 1: addi r3,r1,STACK_FRAME_OVERHEAD
937 bl .kernel_bad_stack
938 b 1b
939
940 /*
941 * Here r13 points to the paca, r9 contains the saved CR,
942 * SRR0 and SRR1 are saved in r11 and r12,
943 * r9 - r13 are saved in paca->exgen.
944 */
945 .align 7
946 .globl data_access_common
947 data_access_common:
948 mfspr r10,SPRN_DAR
949 std r10,PACA_EXGEN+EX_DAR(r13)
950 mfspr r10,SPRN_DSISR
951 stw r10,PACA_EXGEN+EX_DSISR(r13)
952 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
953 DISABLE_INTS
954 ld r12,_MSR(r1)
955 ld r3,PACA_EXGEN+EX_DAR(r13)
956 lwz r4,PACA_EXGEN+EX_DSISR(r13)
957 li r5,0x300
958 b .do_hash_page /* Try to handle as hpte fault */
959
960 .align 7
961 .globl h_data_storage_common
962 h_data_storage_common:
963 mfspr r10,SPRN_HDAR
964 std r10,PACA_EXGEN+EX_DAR(r13)
965 mfspr r10,SPRN_HDSISR
966 stw r10,PACA_EXGEN+EX_DSISR(r13)
967 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
968 bl .save_nvgprs
969 DISABLE_INTS
970 addi r3,r1,STACK_FRAME_OVERHEAD
971 bl .unknown_exception
972 b .ret_from_except
973
974 .align 7
975 .globl instruction_access_common
976 instruction_access_common:
977 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
978 DISABLE_INTS
979 ld r12,_MSR(r1)
980 ld r3,_NIP(r1)
981 andis. r4,r12,0x5820
982 li r5,0x400
983 b .do_hash_page /* Try to handle as hpte fault */
984
985 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
986
987 /*
988 * Here is the common SLB miss user that is used when going to virtual
989 * mode for SLB misses, that is currently not used
990 */
991 #ifdef __DISABLED__
992 .align 7
993 .globl slb_miss_user_common
994 slb_miss_user_common:
995 mflr r10
996 std r3,PACA_EXGEN+EX_DAR(r13)
997 stw r9,PACA_EXGEN+EX_CCR(r13)
998 std r10,PACA_EXGEN+EX_LR(r13)
999 std r11,PACA_EXGEN+EX_SRR0(r13)
1000 bl .slb_allocate_user
1001
1002 ld r10,PACA_EXGEN+EX_LR(r13)
1003 ld r3,PACA_EXGEN+EX_R3(r13)
1004 lwz r9,PACA_EXGEN+EX_CCR(r13)
1005 ld r11,PACA_EXGEN+EX_SRR0(r13)
1006 mtlr r10
1007 beq- slb_miss_fault
1008
1009 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1010 beq- unrecov_user_slb
1011 mfmsr r10
1012
1013 .machine push
1014 .machine "power4"
1015 mtcrf 0x80,r9
1016 .machine pop
1017
1018 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
1019 mtmsrd r10,1
1020
1021 mtspr SRR0,r11
1022 mtspr SRR1,r12
1023
1024 ld r9,PACA_EXGEN+EX_R9(r13)
1025 ld r10,PACA_EXGEN+EX_R10(r13)
1026 ld r11,PACA_EXGEN+EX_R11(r13)
1027 ld r12,PACA_EXGEN+EX_R12(r13)
1028 ld r13,PACA_EXGEN+EX_R13(r13)
1029 rfid
1030 b .
1031
1032 slb_miss_fault:
1033 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
1034 ld r4,PACA_EXGEN+EX_DAR(r13)
1035 li r5,0
1036 std r4,_DAR(r1)
1037 std r5,_DSISR(r1)
1038 b handle_page_fault
1039
1040 unrecov_user_slb:
1041 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
1042 DISABLE_INTS
1043 bl .save_nvgprs
1044 1: addi r3,r1,STACK_FRAME_OVERHEAD
1045 bl .unrecoverable_exception
1046 b 1b
1047
1048 #endif /* __DISABLED__ */
1049
1050
1051 .align 7
1052 .globl alignment_common
1053 alignment_common:
1054 mfspr r10,SPRN_DAR
1055 std r10,PACA_EXGEN+EX_DAR(r13)
1056 mfspr r10,SPRN_DSISR
1057 stw r10,PACA_EXGEN+EX_DSISR(r13)
1058 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1059 ld r3,PACA_EXGEN+EX_DAR(r13)
1060 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1061 std r3,_DAR(r1)
1062 std r4,_DSISR(r1)
1063 bl .save_nvgprs
1064 DISABLE_INTS
1065 addi r3,r1,STACK_FRAME_OVERHEAD
1066 bl .alignment_exception
1067 b .ret_from_except
1068
1069 .align 7
1070 .globl program_check_common
1071 program_check_common:
1072 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1073 bl .save_nvgprs
1074 DISABLE_INTS
1075 addi r3,r1,STACK_FRAME_OVERHEAD
1076 bl .program_check_exception
1077 b .ret_from_except
1078
1079 .align 7
1080 .globl fp_unavailable_common
1081 fp_unavailable_common:
1082 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1083 bne 1f /* if from user, just load it up */
1084 bl .save_nvgprs
1085 DISABLE_INTS
1086 addi r3,r1,STACK_FRAME_OVERHEAD
1087 bl .kernel_fp_unavailable_exception
1088 BUG_OPCODE
1089 1:
1090 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1091 BEGIN_FTR_SECTION
1092 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1093 * transaction), go do TM stuff
1094 */
1095 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1096 bne- 2f
1097 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1098 #endif
1099 bl .load_up_fpu
1100 b fast_exception_return
1101 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1102 2: /* User process was in a transaction */
1103 bl .save_nvgprs
1104 DISABLE_INTS
1105 addi r3,r1,STACK_FRAME_OVERHEAD
1106 bl .fp_unavailable_tm
1107 b .ret_from_except
1108 #endif
1109 .align 7
1110 .globl altivec_unavailable_common
1111 altivec_unavailable_common:
1112 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1113 #ifdef CONFIG_ALTIVEC
1114 BEGIN_FTR_SECTION
1115 beq 1f
1116 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1117 BEGIN_FTR_SECTION_NESTED(69)
1118 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1119 * transaction), go do TM stuff
1120 */
1121 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1122 bne- 2f
1123 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1124 #endif
1125 bl .load_up_altivec
1126 b fast_exception_return
1127 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1128 2: /* User process was in a transaction */
1129 bl .save_nvgprs
1130 DISABLE_INTS
1131 addi r3,r1,STACK_FRAME_OVERHEAD
1132 bl .altivec_unavailable_tm
1133 b .ret_from_except
1134 #endif
1135 1:
1136 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1137 #endif
1138 bl .save_nvgprs
1139 DISABLE_INTS
1140 addi r3,r1,STACK_FRAME_OVERHEAD
1141 bl .altivec_unavailable_exception
1142 b .ret_from_except
1143
1144 .align 7
1145 .globl vsx_unavailable_common
1146 vsx_unavailable_common:
1147 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1148 #ifdef CONFIG_VSX
1149 BEGIN_FTR_SECTION
1150 beq 1f
1151 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1152 BEGIN_FTR_SECTION_NESTED(69)
1153 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1154 * transaction), go do TM stuff
1155 */
1156 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1157 bne- 2f
1158 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1159 #endif
1160 b .load_up_vsx
1161 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1162 2: /* User process was in a transaction */
1163 bl .save_nvgprs
1164 DISABLE_INTS
1165 addi r3,r1,STACK_FRAME_OVERHEAD
1166 bl .vsx_unavailable_tm
1167 b .ret_from_except
1168 #endif
1169 1:
1170 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1171 #endif
1172 bl .save_nvgprs
1173 DISABLE_INTS
1174 addi r3,r1,STACK_FRAME_OVERHEAD
1175 bl .vsx_unavailable_exception
1176 b .ret_from_except
1177
1178 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, .facility_unavailable_exception)
1179
1180 .align 7
1181 .globl __end_handlers
1182 __end_handlers:
1183
1184 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1185 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1186 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1187
1188 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1189 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1190 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1191 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1192 STD_RELON_EXCEPTION_HV_OOL(0xf80, facility_unavailable)
1193
1194 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1195 /*
1196 * Data area reserved for FWNMI option.
1197 * This address (0x7000) is fixed by the RPA.
1198 */
1199 .= 0x7000
1200 .globl fwnmi_data_area
1201 fwnmi_data_area:
1202
1203 /* pseries and powernv need to keep the whole page from
1204 * 0x7000 to 0x8000 free for use by the firmware
1205 */
1206 . = 0x8000
1207 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1208
1209 /* Space for CPU0's segment table */
1210 .balign 4096
1211 .globl initial_stab
1212 initial_stab:
1213 .space 4096
1214
1215 #ifdef CONFIG_PPC_POWERNV
1216 _GLOBAL(opal_mc_secondary_handler)
1217 HMT_MEDIUM_PPR_DISCARD
1218 SET_SCRATCH0(r13)
1219 GET_PACA(r13)
1220 clrldi r3,r3,2
1221 tovirt(r3,r3)
1222 std r3,PACA_OPAL_MC_EVT(r13)
1223 ld r13,OPAL_MC_SRR0(r3)
1224 mtspr SPRN_SRR0,r13
1225 ld r13,OPAL_MC_SRR1(r3)
1226 mtspr SPRN_SRR1,r13
1227 ld r3,OPAL_MC_GPR3(r3)
1228 GET_SCRATCH0(r13)
1229 b machine_check_pSeries
1230 #endif /* CONFIG_PPC_POWERNV */
1231
1232
1233 /*
1234 * r13 points to the PACA, r9 contains the saved CR,
1235 * r12 contain the saved SRR1, SRR0 is still ready for return
1236 * r3 has the faulting address
1237 * r9 - r13 are saved in paca->exslb.
1238 * r3 is saved in paca->slb_r3
1239 * We assume we aren't going to take any exceptions during this procedure.
1240 */
1241 _GLOBAL(slb_miss_realmode)
1242 mflr r10
1243 #ifdef CONFIG_RELOCATABLE
1244 mtctr r11
1245 #endif
1246
1247 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1248 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1249
1250 bl .slb_allocate_realmode
1251
1252 /* All done -- return from exception. */
1253
1254 ld r10,PACA_EXSLB+EX_LR(r13)
1255 ld r3,PACA_EXSLB+EX_R3(r13)
1256 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1257
1258 mtlr r10
1259
1260 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1261 beq- 2f
1262
1263 .machine push
1264 .machine "power4"
1265 mtcrf 0x80,r9
1266 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1267 .machine pop
1268
1269 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1270 ld r9,PACA_EXSLB+EX_R9(r13)
1271 ld r10,PACA_EXSLB+EX_R10(r13)
1272 ld r11,PACA_EXSLB+EX_R11(r13)
1273 ld r12,PACA_EXSLB+EX_R12(r13)
1274 ld r13,PACA_EXSLB+EX_R13(r13)
1275 rfid
1276 b . /* prevent speculative execution */
1277
1278 2: mfspr r11,SPRN_SRR0
1279 ld r10,PACAKBASE(r13)
1280 LOAD_HANDLER(r10,unrecov_slb)
1281 mtspr SPRN_SRR0,r10
1282 ld r10,PACAKMSR(r13)
1283 mtspr SPRN_SRR1,r10
1284 rfid
1285 b .
1286
1287 unrecov_slb:
1288 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1289 DISABLE_INTS
1290 bl .save_nvgprs
1291 1: addi r3,r1,STACK_FRAME_OVERHEAD
1292 bl .unrecoverable_exception
1293 b 1b
1294
1295
1296 #ifdef CONFIG_PPC_970_NAP
1297 power4_fixup_nap:
1298 andc r9,r9,r10
1299 std r9,TI_LOCAL_FLAGS(r11)
1300 ld r10,_LINK(r1) /* make idle task do the */
1301 std r10,_NIP(r1) /* equivalent of a blr */
1302 blr
1303 #endif
1304
1305 /*
1306 * Hash table stuff
1307 */
1308 .align 7
1309 _STATIC(do_hash_page)
1310 std r3,_DAR(r1)
1311 std r4,_DSISR(r1)
1312
1313 andis. r0,r4,0xa410 /* weird error? */
1314 bne- handle_page_fault /* if not, try to insert a HPTE */
1315 andis. r0,r4,DSISR_DABRMATCH@h
1316 bne- handle_dabr_fault
1317
1318 BEGIN_FTR_SECTION
1319 andis. r0,r4,0x0020 /* Is it a segment table fault? */
1320 bne- do_ste_alloc /* If so handle it */
1321 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
1322
1323 CURRENT_THREAD_INFO(r11, r1)
1324 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1325 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1326 bne 77f /* then don't call hash_page now */
1327 /*
1328 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1329 * accessing a userspace segment (even from the kernel). We assume
1330 * kernel addresses always have the high bit set.
1331 */
1332 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1333 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1334 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1335 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1336 ori r4,r4,1 /* add _PAGE_PRESENT */
1337 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1338
1339 /*
1340 * r3 contains the faulting address
1341 * r4 contains the required access permissions
1342 * r5 contains the trap number
1343 *
1344 * at return r3 = 0 for success, 1 for page fault, negative for error
1345 */
1346 bl .hash_page /* build HPTE if possible */
1347 cmpdi r3,0 /* see if hash_page succeeded */
1348
1349 /* Success */
1350 beq fast_exc_return_irq /* Return from exception on success */
1351
1352 /* Error */
1353 blt- 13f
1354
1355 /* Here we have a page fault that hash_page can't handle. */
1356 handle_page_fault:
1357 11: ld r4,_DAR(r1)
1358 ld r5,_DSISR(r1)
1359 addi r3,r1,STACK_FRAME_OVERHEAD
1360 bl .do_page_fault
1361 cmpdi r3,0
1362 beq+ 12f
1363 bl .save_nvgprs
1364 mr r5,r3
1365 addi r3,r1,STACK_FRAME_OVERHEAD
1366 lwz r4,_DAR(r1)
1367 bl .bad_page_fault
1368 b .ret_from_except
1369
1370 /* We have a data breakpoint exception - handle it */
1371 handle_dabr_fault:
1372 bl .save_nvgprs
1373 ld r4,_DAR(r1)
1374 ld r5,_DSISR(r1)
1375 addi r3,r1,STACK_FRAME_OVERHEAD
1376 bl .do_break
1377 12: b .ret_from_except_lite
1378
1379
1380 /* We have a page fault that hash_page could handle but HV refused
1381 * the PTE insertion
1382 */
1383 13: bl .save_nvgprs
1384 mr r5,r3
1385 addi r3,r1,STACK_FRAME_OVERHEAD
1386 ld r4,_DAR(r1)
1387 bl .low_hash_fault
1388 b .ret_from_except
1389
1390 /*
1391 * We come here as a result of a DSI at a point where we don't want
1392 * to call hash_page, such as when we are accessing memory (possibly
1393 * user memory) inside a PMU interrupt that occurred while interrupts
1394 * were soft-disabled. We want to invoke the exception handler for
1395 * the access, or panic if there isn't a handler.
1396 */
1397 77: bl .save_nvgprs
1398 mr r4,r3
1399 addi r3,r1,STACK_FRAME_OVERHEAD
1400 li r5,SIGSEGV
1401 bl .bad_page_fault
1402 b .ret_from_except
1403
1404 /* here we have a segment miss */
1405 do_ste_alloc:
1406 bl .ste_allocate /* try to insert stab entry */
1407 cmpdi r3,0
1408 bne- handle_page_fault
1409 b fast_exception_return
1410
1411 /*
1412 * r13 points to the PACA, r9 contains the saved CR,
1413 * r11 and r12 contain the saved SRR0 and SRR1.
1414 * r9 - r13 are saved in paca->exslb.
1415 * We assume we aren't going to take any exceptions during this procedure.
1416 * We assume (DAR >> 60) == 0xc.
1417 */
1418 .align 7
1419 _GLOBAL(do_stab_bolted)
1420 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1421 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1422 mfspr r11,SPRN_DAR /* ea */
1423
1424 /*
1425 * check for bad kernel/user address
1426 * (ea & ~REGION_MASK) >= PGTABLE_RANGE
1427 */
1428 rldicr. r9,r11,4,(63 - 46 - 4)
1429 li r9,0 /* VSID = 0 for bad address */
1430 bne- 0f
1431
1432 /*
1433 * Calculate VSID:
1434 * This is the kernel vsid, we take the top for context from
1435 * the range. context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
1436 * Here we know that (ea >> 60) == 0xc
1437 */
1438 lis r9,(MAX_USER_CONTEXT + 1)@ha
1439 addi r9,r9,(MAX_USER_CONTEXT + 1)@l
1440
1441 srdi r10,r11,SID_SHIFT
1442 rldimi r10,r9,ESID_BITS,0 /* proto vsid */
1443 ASM_VSID_SCRAMBLE(r10, r9, 256M)
1444 rldic r9,r10,12,16 /* r9 = vsid << 12 */
1445
1446 0:
1447 /* Hash to the primary group */
1448 ld r10,PACASTABVIRT(r13)
1449 srdi r11,r11,SID_SHIFT
1450 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1451
1452 /* Search the primary group for a free entry */
1453 1: ld r11,0(r10) /* Test valid bit of the current ste */
1454 andi. r11,r11,0x80
1455 beq 2f
1456 addi r10,r10,16
1457 andi. r11,r10,0x70
1458 bne 1b
1459
1460 /* Stick for only searching the primary group for now. */
1461 /* At least for now, we use a very simple random castout scheme */
1462 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1463 mftb r11
1464 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1465 ori r11,r11,0x10
1466
1467 /* r10 currently points to an ste one past the group of interest */
1468 /* make it point to the randomly selected entry */
1469 subi r10,r10,128
1470 or r10,r10,r11 /* r10 is the entry to invalidate */
1471
1472 isync /* mark the entry invalid */
1473 ld r11,0(r10)
1474 rldicl r11,r11,56,1 /* clear the valid bit */
1475 rotldi r11,r11,8
1476 std r11,0(r10)
1477 sync
1478
1479 clrrdi r11,r11,28 /* Get the esid part of the ste */
1480 slbie r11
1481
1482 2: std r9,8(r10) /* Store the vsid part of the ste */
1483 eieio
1484
1485 mfspr r11,SPRN_DAR /* Get the new esid */
1486 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1487 ori r11,r11,0x90 /* Turn on valid and kp */
1488 std r11,0(r10) /* Put new entry back into the stab */
1489
1490 sync
1491
1492 /* All done -- return from exception. */
1493 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1494 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1495
1496 andi. r10,r12,MSR_RI
1497 beq- unrecov_slb
1498
1499 mtcrf 0x80,r9 /* restore CR */
1500
1501 mfmsr r10
1502 clrrdi r10,r10,2
1503 mtmsrd r10,1
1504
1505 mtspr SPRN_SRR0,r11
1506 mtspr SPRN_SRR1,r12
1507 ld r9,PACA_EXSLB+EX_R9(r13)
1508 ld r10,PACA_EXSLB+EX_R10(r13)
1509 ld r11,PACA_EXSLB+EX_R11(r13)
1510 ld r12,PACA_EXSLB+EX_R12(r13)
1511 ld r13,PACA_EXSLB+EX_R13(r13)
1512 rfid
1513 b . /* prevent speculative execution */
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