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1 /*
2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
6 *
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
9 *
10 * Most of this originates from head_64.S and thus has the same
11 * copyright history.
12 *
13 */
14
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18
19 /*
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x17ff : pSeries Interrupt prologs
23 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
24 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
25 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
26 * 0x7000 - 0x7fff : FWNMI data area
27 * 0x8000 - 0x8fff : Initial (CPU0) segment table
28 * 0x9000 - : Early init and support code
29 */
30 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
31 #define SYSCALL_PSERIES_1 \
32 BEGIN_FTR_SECTION \
33 cmpdi r0,0x1ebe ; \
34 beq- 1f ; \
35 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
36 mr r9,r13 ; \
37 GET_PACA(r13) ; \
38 mfspr r11,SPRN_SRR0 ; \
39 0:
40
41 #define SYSCALL_PSERIES_2_RFID \
42 mfspr r12,SPRN_SRR1 ; \
43 ld r10,PACAKBASE(r13) ; \
44 LOAD_HANDLER(r10, system_call_entry) ; \
45 mtspr SPRN_SRR0,r10 ; \
46 ld r10,PACAKMSR(r13) ; \
47 mtspr SPRN_SRR1,r10 ; \
48 rfid ; \
49 b . ; /* prevent speculative execution */
50
51 #define SYSCALL_PSERIES_3 \
52 /* Fast LE/BE switch system call */ \
53 1: mfspr r12,SPRN_SRR1 ; \
54 xori r12,r12,MSR_LE ; \
55 mtspr SPRN_SRR1,r12 ; \
56 rfid ; /* return to userspace */ \
57 b . ; /* prevent speculative execution */
58
59 #if defined(CONFIG_RELOCATABLE)
60 /*
61 * We can't branch directly; in the direct case we use LR
62 * and system_call_entry restores LR. (We thus need to move
63 * LR to r10 in the RFID case too.)
64 */
65 #define SYSCALL_PSERIES_2_DIRECT \
66 mflr r10 ; \
67 ld r12,PACAKBASE(r13) ; \
68 LOAD_HANDLER(r12, system_call_entry_direct) ; \
69 mtctr r12 ; \
70 mfspr r12,SPRN_SRR1 ; \
71 /* Re-use of r13... No spare regs to do this */ \
72 li r13,MSR_RI ; \
73 mtmsrd r13,1 ; \
74 GET_PACA(r13) ; /* get r13 back */ \
75 bctr ;
76 #else
77 /* We can branch directly */
78 #define SYSCALL_PSERIES_2_DIRECT \
79 mfspr r12,SPRN_SRR1 ; \
80 li r10,MSR_RI ; \
81 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
82 b system_call_entry_direct ;
83 #endif
84
85 /*
86 * This is the start of the interrupt handlers for pSeries
87 * This code runs with relocation off.
88 * Code from here to __end_interrupts gets copied down to real
89 * address 0x100 when we are running a relocatable kernel.
90 * Therefore any relative branches in this section must only
91 * branch to labels in this section.
92 */
93 . = 0x100
94 .globl __start_interrupts
95 __start_interrupts:
96
97 .globl system_reset_pSeries;
98 system_reset_pSeries:
99 HMT_MEDIUM_PPR_DISCARD
100 SET_SCRATCH0(r13)
101 #ifdef CONFIG_PPC_P7_NAP
102 BEGIN_FTR_SECTION
103 /* Running native on arch 2.06 or later, check if we are
104 * waking up from nap. We only handle no state loss and
105 * supervisor state loss. We do -not- handle hypervisor
106 * state loss at this time.
107 */
108 mfspr r13,SPRN_SRR1
109 rlwinm. r13,r13,47-31,30,31
110 beq 9f
111
112 /* waking up from powersave (nap) state */
113 cmpwi cr1,r13,2
114 /* Total loss of HV state is fatal, we could try to use the
115 * PIR to locate a PACA, then use an emergency stack etc...
116 * OPAL v3 based powernv platforms have new idle states
117 * which fall in this catagory.
118 */
119 bgt cr1,8f
120 GET_PACA(r13)
121
122 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
123 li r0,KVM_HWTHREAD_IN_KERNEL
124 stb r0,HSTATE_HWTHREAD_STATE(r13)
125 /* Order setting hwthread_state vs. testing hwthread_req */
126 sync
127 lbz r0,HSTATE_HWTHREAD_REQ(r13)
128 cmpwi r0,0
129 beq 1f
130 b kvm_start_guest
131 1:
132 #endif
133
134 beq cr1,2f
135 b power7_wakeup_noloss
136 2: b power7_wakeup_loss
137
138 /* Fast Sleep wakeup on PowerNV */
139 8: GET_PACA(r13)
140 b power7_wakeup_tb_loss
141
142 9:
143 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
144 #endif /* CONFIG_PPC_P7_NAP */
145 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
146 NOTEST, 0x100)
147
148 . = 0x200
149 machine_check_pSeries_1:
150 /* This is moved out of line as it can be patched by FW, but
151 * some code path might still want to branch into the original
152 * vector
153 */
154 HMT_MEDIUM_PPR_DISCARD
155 SET_SCRATCH0(r13) /* save r13 */
156 #ifdef CONFIG_PPC_P7_NAP
157 BEGIN_FTR_SECTION
158 /* Running native on arch 2.06 or later, check if we are
159 * waking up from nap. We only handle no state loss and
160 * supervisor state loss. We do -not- handle hypervisor
161 * state loss at this time.
162 */
163 mfspr r13,SPRN_SRR1
164 rlwinm. r13,r13,47-31,30,31
165 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
166 beq 9f
167
168 mfspr r13,SPRN_SRR1
169 rlwinm. r13,r13,47-31,30,31
170 /* waking up from powersave (nap) state */
171 cmpwi cr1,r13,2
172 /* Total loss of HV state is fatal. let's just stay stuck here */
173 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
174 bgt cr1,.
175 9:
176 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
177 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
178 #endif /* CONFIG_PPC_P7_NAP */
179 EXCEPTION_PROLOG_0(PACA_EXMC)
180 BEGIN_FTR_SECTION
181 b machine_check_pSeries_early
182 FTR_SECTION_ELSE
183 b machine_check_pSeries_0
184 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
185
186 . = 0x300
187 .globl data_access_pSeries
188 data_access_pSeries:
189 HMT_MEDIUM_PPR_DISCARD
190 SET_SCRATCH0(r13)
191 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
192 KVMTEST, 0x300)
193
194 . = 0x380
195 .globl data_access_slb_pSeries
196 data_access_slb_pSeries:
197 HMT_MEDIUM_PPR_DISCARD
198 SET_SCRATCH0(r13)
199 EXCEPTION_PROLOG_0(PACA_EXSLB)
200 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
201 std r3,PACA_EXSLB+EX_R3(r13)
202 mfspr r3,SPRN_DAR
203 #ifdef __DISABLED__
204 /* Keep that around for when we re-implement dynamic VSIDs */
205 cmpdi r3,0
206 bge slb_miss_user_pseries
207 #endif /* __DISABLED__ */
208 mfspr r12,SPRN_SRR1
209 #ifndef CONFIG_RELOCATABLE
210 b slb_miss_realmode
211 #else
212 /*
213 * We can't just use a direct branch to slb_miss_realmode
214 * because the distance from here to there depends on where
215 * the kernel ends up being put.
216 */
217 mfctr r11
218 ld r10,PACAKBASE(r13)
219 LOAD_HANDLER(r10, slb_miss_realmode)
220 mtctr r10
221 bctr
222 #endif
223
224 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
225
226 . = 0x480
227 .globl instruction_access_slb_pSeries
228 instruction_access_slb_pSeries:
229 HMT_MEDIUM_PPR_DISCARD
230 SET_SCRATCH0(r13)
231 EXCEPTION_PROLOG_0(PACA_EXSLB)
232 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
233 std r3,PACA_EXSLB+EX_R3(r13)
234 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
235 #ifdef __DISABLED__
236 /* Keep that around for when we re-implement dynamic VSIDs */
237 cmpdi r3,0
238 bge slb_miss_user_pseries
239 #endif /* __DISABLED__ */
240 mfspr r12,SPRN_SRR1
241 #ifndef CONFIG_RELOCATABLE
242 b slb_miss_realmode
243 #else
244 mfctr r11
245 ld r10,PACAKBASE(r13)
246 LOAD_HANDLER(r10, slb_miss_realmode)
247 mtctr r10
248 bctr
249 #endif
250
251 /* We open code these as we can't have a ". = x" (even with
252 * x = "." within a feature section
253 */
254 . = 0x500;
255 .globl hardware_interrupt_pSeries;
256 .globl hardware_interrupt_hv;
257 hardware_interrupt_pSeries:
258 hardware_interrupt_hv:
259 HMT_MEDIUM_PPR_DISCARD
260 BEGIN_FTR_SECTION
261 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
262 EXC_HV, SOFTEN_TEST_HV)
263 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
264 FTR_SECTION_ELSE
265 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
266 EXC_STD, SOFTEN_TEST_HV_201)
267 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
268 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
269
270 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
271 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
272
273 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
274 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
275
276 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
277 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
278
279 . = 0x900
280 .globl decrementer_pSeries
281 decrementer_pSeries:
282 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
283
284 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
285
286 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
287 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
288
289 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
290 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
291
292 . = 0xc00
293 .globl system_call_pSeries
294 system_call_pSeries:
295 /*
296 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
297 * that support it) before changing to HMT_MEDIUM. That allows the KVM
298 * code to save that value into the guest state (it is the guest's PPR
299 * value). Otherwise just change to HMT_MEDIUM as userspace has
300 * already saved the PPR.
301 */
302 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
303 SET_SCRATCH0(r13)
304 GET_PACA(r13)
305 std r9,PACA_EXGEN+EX_R9(r13)
306 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);
307 HMT_MEDIUM;
308 std r10,PACA_EXGEN+EX_R10(r13)
309 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR);
310 mfcr r9
311 KVMTEST(0xc00)
312 GET_SCRATCH0(r13)
313 #else
314 HMT_MEDIUM;
315 #endif
316 SYSCALL_PSERIES_1
317 SYSCALL_PSERIES_2_RFID
318 SYSCALL_PSERIES_3
319 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
320
321 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
322 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
323
324 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
325 * out of line to handle them
326 */
327 . = 0xe00
328 hv_data_storage_trampoline:
329 SET_SCRATCH0(r13)
330 EXCEPTION_PROLOG_0(PACA_EXGEN)
331 b h_data_storage_hv
332
333 . = 0xe20
334 hv_instr_storage_trampoline:
335 SET_SCRATCH0(r13)
336 EXCEPTION_PROLOG_0(PACA_EXGEN)
337 b h_instr_storage_hv
338
339 . = 0xe40
340 emulation_assist_trampoline:
341 SET_SCRATCH0(r13)
342 EXCEPTION_PROLOG_0(PACA_EXGEN)
343 b emulation_assist_hv
344
345 . = 0xe60
346 hv_exception_trampoline:
347 SET_SCRATCH0(r13)
348 EXCEPTION_PROLOG_0(PACA_EXGEN)
349 b hmi_exception_early
350
351 . = 0xe80
352 hv_doorbell_trampoline:
353 SET_SCRATCH0(r13)
354 EXCEPTION_PROLOG_0(PACA_EXGEN)
355 b h_doorbell_hv
356
357 /* We need to deal with the Altivec unavailable exception
358 * here which is at 0xf20, thus in the middle of the
359 * prolog code of the PerformanceMonitor one. A little
360 * trickery is thus necessary
361 */
362 . = 0xf00
363 performance_monitor_pseries_trampoline:
364 SET_SCRATCH0(r13)
365 EXCEPTION_PROLOG_0(PACA_EXGEN)
366 b performance_monitor_pSeries
367
368 . = 0xf20
369 altivec_unavailable_pseries_trampoline:
370 SET_SCRATCH0(r13)
371 EXCEPTION_PROLOG_0(PACA_EXGEN)
372 b altivec_unavailable_pSeries
373
374 . = 0xf40
375 vsx_unavailable_pseries_trampoline:
376 SET_SCRATCH0(r13)
377 EXCEPTION_PROLOG_0(PACA_EXGEN)
378 b vsx_unavailable_pSeries
379
380 . = 0xf60
381 facility_unavailable_trampoline:
382 SET_SCRATCH0(r13)
383 EXCEPTION_PROLOG_0(PACA_EXGEN)
384 b facility_unavailable_pSeries
385
386 . = 0xf80
387 hv_facility_unavailable_trampoline:
388 SET_SCRATCH0(r13)
389 EXCEPTION_PROLOG_0(PACA_EXGEN)
390 b facility_unavailable_hv
391
392 #ifdef CONFIG_CBE_RAS
393 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
394 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
395 #endif /* CONFIG_CBE_RAS */
396
397 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
398 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
399
400 . = 0x1500
401 .global denorm_exception_hv
402 denorm_exception_hv:
403 HMT_MEDIUM_PPR_DISCARD
404 mtspr SPRN_SPRG_HSCRATCH0,r13
405 EXCEPTION_PROLOG_0(PACA_EXGEN)
406 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
407
408 #ifdef CONFIG_PPC_DENORMALISATION
409 mfspr r10,SPRN_HSRR1
410 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
411 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
412 addi r11,r11,-4 /* HSRR0 is next instruction */
413 bne+ denorm_assist
414 #endif
415
416 KVMTEST(0x1500)
417 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
418 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
419
420 #ifdef CONFIG_CBE_RAS
421 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
422 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
423 #endif /* CONFIG_CBE_RAS */
424
425 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
426 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
427
428 #ifdef CONFIG_CBE_RAS
429 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
430 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
431 #else
432 . = 0x1800
433 #endif /* CONFIG_CBE_RAS */
434
435
436 /*** Out of line interrupts support ***/
437
438 .align 7
439 /* moved from 0x200 */
440 machine_check_pSeries_early:
441 BEGIN_FTR_SECTION
442 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
443 /*
444 * Register contents:
445 * R13 = PACA
446 * R9 = CR
447 * Original R9 to R13 is saved on PACA_EXMC
448 *
449 * Switch to mc_emergency stack and handle re-entrancy (we limit
450 * the nested MCE upto level 4 to avoid stack overflow).
451 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
452 *
453 * We use paca->in_mce to check whether this is the first entry or
454 * nested machine check. We increment paca->in_mce to track nested
455 * machine checks.
456 *
457 * If this is the first entry then set stack pointer to
458 * paca->mc_emergency_sp, otherwise r1 is already pointing to
459 * stack frame on mc_emergency stack.
460 *
461 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
462 * checkstop if we get another machine check exception before we do
463 * rfid with MSR_ME=1.
464 */
465 mr r11,r1 /* Save r1 */
466 lhz r10,PACA_IN_MCE(r13)
467 cmpwi r10,0 /* Are we in nested machine check */
468 bne 0f /* Yes, we are. */
469 /* First machine check entry */
470 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
471 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
472 addi r10,r10,1 /* increment paca->in_mce */
473 sth r10,PACA_IN_MCE(r13)
474 /* Limit nested MCE to level 4 to avoid stack overflow */
475 cmpwi r10,4
476 bgt 2f /* Check if we hit limit of 4 */
477 std r11,GPR1(r1) /* Save r1 on the stack. */
478 std r11,0(r1) /* make stack chain pointer */
479 mfspr r11,SPRN_SRR0 /* Save SRR0 */
480 std r11,_NIP(r1)
481 mfspr r11,SPRN_SRR1 /* Save SRR1 */
482 std r11,_MSR(r1)
483 mfspr r11,SPRN_DAR /* Save DAR */
484 std r11,_DAR(r1)
485 mfspr r11,SPRN_DSISR /* Save DSISR */
486 std r11,_DSISR(r1)
487 std r9,_CCR(r1) /* Save CR in stackframe */
488 /* Save r9 through r13 from EXMC save area to stack frame. */
489 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
490 mfmsr r11 /* get MSR value */
491 ori r11,r11,MSR_ME /* turn on ME bit */
492 ori r11,r11,MSR_RI /* turn on RI bit */
493 ld r12,PACAKBASE(r13) /* get high part of &label */
494 LOAD_HANDLER(r12, machine_check_handle_early)
495 1: mtspr SPRN_SRR0,r12
496 mtspr SPRN_SRR1,r11
497 rfid
498 b . /* prevent speculative execution */
499 2:
500 /* Stack overflow. Stay on emergency stack and panic.
501 * Keep the ME bit off while panic-ing, so that if we hit
502 * another machine check we checkstop.
503 */
504 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
505 ld r11,PACAKMSR(r13)
506 ld r12,PACAKBASE(r13)
507 LOAD_HANDLER(r12, unrecover_mce)
508 li r10,MSR_ME
509 andc r11,r11,r10 /* Turn off MSR_ME */
510 b 1b
511 b . /* prevent speculative execution */
512 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
513
514 machine_check_pSeries:
515 .globl machine_check_fwnmi
516 machine_check_fwnmi:
517 HMT_MEDIUM_PPR_DISCARD
518 SET_SCRATCH0(r13) /* save r13 */
519 EXCEPTION_PROLOG_0(PACA_EXMC)
520 machine_check_pSeries_0:
521 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
522 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
523 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
524 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
525 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
526 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
527 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
528 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
529 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
530
531 #ifdef CONFIG_PPC_DENORMALISATION
532 denorm_assist:
533 BEGIN_FTR_SECTION
534 /*
535 * To denormalise we need to move a copy of the register to itself.
536 * For POWER6 do that here for all FP regs.
537 */
538 mfmsr r10
539 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
540 xori r10,r10,(MSR_FE0|MSR_FE1)
541 mtmsrd r10
542 sync
543
544 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
545 #define FMR4(n) FMR2(n) ; FMR2(n+2)
546 #define FMR8(n) FMR4(n) ; FMR4(n+4)
547 #define FMR16(n) FMR8(n) ; FMR8(n+8)
548 #define FMR32(n) FMR16(n) ; FMR16(n+16)
549 FMR32(0)
550
551 FTR_SECTION_ELSE
552 /*
553 * To denormalise we need to move a copy of the register to itself.
554 * For POWER7 do that here for the first 32 VSX registers only.
555 */
556 mfmsr r10
557 oris r10,r10,MSR_VSX@h
558 mtmsrd r10
559 sync
560
561 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
562 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
563 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
564 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
565 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
566 XVCPSGNDP32(0)
567
568 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
569
570 BEGIN_FTR_SECTION
571 b denorm_done
572 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
573 /*
574 * To denormalise we need to move a copy of the register to itself.
575 * For POWER8 we need to do that for all 64 VSX registers
576 */
577 XVCPSGNDP32(32)
578 denorm_done:
579 mtspr SPRN_HSRR0,r11
580 mtcrf 0x80,r9
581 ld r9,PACA_EXGEN+EX_R9(r13)
582 RESTORE_PPR_PACA(PACA_EXGEN, r10)
583 BEGIN_FTR_SECTION
584 ld r10,PACA_EXGEN+EX_CFAR(r13)
585 mtspr SPRN_CFAR,r10
586 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
587 ld r10,PACA_EXGEN+EX_R10(r13)
588 ld r11,PACA_EXGEN+EX_R11(r13)
589 ld r12,PACA_EXGEN+EX_R12(r13)
590 ld r13,PACA_EXGEN+EX_R13(r13)
591 HRFID
592 b .
593 #endif
594
595 .align 7
596 /* moved from 0xe00 */
597 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
598 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
599 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
600 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
601 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
602 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
603 MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception)
604 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
605
606 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
607 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
608
609 /* moved from 0xf00 */
610 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
611 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
612 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
613 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
614 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
615 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
616 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
617 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60)
618 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
619 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
620
621 /*
622 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
623 * - If it was a decrementer interrupt, we bump the dec to max and and return.
624 * - If it was a doorbell we return immediately since doorbells are edge
625 * triggered and won't automatically refire.
626 * - If it was a HMI we return immediately since we handled it in realmode
627 * and it won't refire.
628 * - else we hard disable and return.
629 * This is called with r10 containing the value to OR to the paca field.
630 */
631 #define MASKED_INTERRUPT(_H) \
632 masked_##_H##interrupt: \
633 std r11,PACA_EXGEN+EX_R11(r13); \
634 lbz r11,PACAIRQHAPPENED(r13); \
635 or r11,r11,r10; \
636 stb r11,PACAIRQHAPPENED(r13); \
637 cmpwi r10,PACA_IRQ_DEC; \
638 bne 1f; \
639 lis r10,0x7fff; \
640 ori r10,r10,0xffff; \
641 mtspr SPRN_DEC,r10; \
642 b 2f; \
643 1: cmpwi r10,PACA_IRQ_DBELL; \
644 beq 2f; \
645 cmpwi r10,PACA_IRQ_HMI; \
646 beq 2f; \
647 mfspr r10,SPRN_##_H##SRR1; \
648 rldicl r10,r10,48,1; /* clear MSR_EE */ \
649 rotldi r10,r10,16; \
650 mtspr SPRN_##_H##SRR1,r10; \
651 2: mtcrf 0x80,r9; \
652 ld r9,PACA_EXGEN+EX_R9(r13); \
653 ld r10,PACA_EXGEN+EX_R10(r13); \
654 ld r11,PACA_EXGEN+EX_R11(r13); \
655 GET_SCRATCH0(r13); \
656 ##_H##rfid; \
657 b .
658
659 MASKED_INTERRUPT()
660 MASKED_INTERRUPT(H)
661
662 /*
663 * Called from arch_local_irq_enable when an interrupt needs
664 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
665 * which kind of interrupt. MSR:EE is already off. We generate a
666 * stackframe like if a real interrupt had happened.
667 *
668 * Note: While MSR:EE is off, we need to make sure that _MSR
669 * in the generated frame has EE set to 1 or the exception
670 * handler will not properly re-enable them.
671 */
672 _GLOBAL(__replay_interrupt)
673 /* We are going to jump to the exception common code which
674 * will retrieve various register values from the PACA which
675 * we don't give a damn about, so we don't bother storing them.
676 */
677 mfmsr r12
678 mflr r11
679 mfcr r9
680 ori r12,r12,MSR_EE
681 cmpwi r3,0x900
682 beq decrementer_common
683 cmpwi r3,0x500
684 beq hardware_interrupt_common
685 BEGIN_FTR_SECTION
686 cmpwi r3,0xe80
687 beq h_doorbell_common
688 FTR_SECTION_ELSE
689 cmpwi r3,0xa00
690 beq doorbell_super_common
691 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
692 blr
693
694 #ifdef CONFIG_PPC_PSERIES
695 /*
696 * Vectors for the FWNMI option. Share common code.
697 */
698 .globl system_reset_fwnmi
699 .align 7
700 system_reset_fwnmi:
701 HMT_MEDIUM_PPR_DISCARD
702 SET_SCRATCH0(r13) /* save r13 */
703 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
704 NOTEST, 0x100)
705
706 #endif /* CONFIG_PPC_PSERIES */
707
708 #ifdef __DISABLED__
709 /*
710 * This is used for when the SLB miss handler has to go virtual,
711 * which doesn't happen for now anymore but will once we re-implement
712 * dynamic VSIDs for shared page tables
713 */
714 slb_miss_user_pseries:
715 std r10,PACA_EXGEN+EX_R10(r13)
716 std r11,PACA_EXGEN+EX_R11(r13)
717 std r12,PACA_EXGEN+EX_R12(r13)
718 GET_SCRATCH0(r10)
719 ld r11,PACA_EXSLB+EX_R9(r13)
720 ld r12,PACA_EXSLB+EX_R3(r13)
721 std r10,PACA_EXGEN+EX_R13(r13)
722 std r11,PACA_EXGEN+EX_R9(r13)
723 std r12,PACA_EXGEN+EX_R3(r13)
724 clrrdi r12,r13,32
725 mfmsr r10
726 mfspr r11,SRR0 /* save SRR0 */
727 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
728 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
729 mtspr SRR0,r12
730 mfspr r12,SRR1 /* and SRR1 */
731 mtspr SRR1,r10
732 rfid
733 b . /* prevent spec. execution */
734 #endif /* __DISABLED__ */
735
736 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
737 kvmppc_skip_interrupt:
738 /*
739 * Here all GPRs are unchanged from when the interrupt happened
740 * except for r13, which is saved in SPRG_SCRATCH0.
741 */
742 mfspr r13, SPRN_SRR0
743 addi r13, r13, 4
744 mtspr SPRN_SRR0, r13
745 GET_SCRATCH0(r13)
746 rfid
747 b .
748
749 kvmppc_skip_Hinterrupt:
750 /*
751 * Here all GPRs are unchanged from when the interrupt happened
752 * except for r13, which is saved in SPRG_SCRATCH0.
753 */
754 mfspr r13, SPRN_HSRR0
755 addi r13, r13, 4
756 mtspr SPRN_HSRR0, r13
757 GET_SCRATCH0(r13)
758 hrfid
759 b .
760 #endif
761
762 /*
763 * Code from here down to __end_handlers is invoked from the
764 * exception prologs above. Because the prologs assemble the
765 * addresses of these handlers using the LOAD_HANDLER macro,
766 * which uses an ori instruction, these handlers must be in
767 * the first 64k of the kernel image.
768 */
769
770 /*** Common interrupt handlers ***/
771
772 STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception)
773
774 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
775 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt)
776 STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt)
777 #ifdef CONFIG_PPC_DOORBELL
778 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception)
779 #else
780 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception)
781 #endif
782 STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception)
783 STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception)
784 STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception)
785 STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt)
786 STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception)
787 #ifdef CONFIG_PPC_DOORBELL
788 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception)
789 #else
790 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception)
791 #endif
792 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception)
793 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception)
794 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception)
795 #ifdef CONFIG_ALTIVEC
796 STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception)
797 #else
798 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception)
799 #endif
800 #ifdef CONFIG_CBE_RAS
801 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception)
802 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception)
803 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception)
804 #endif /* CONFIG_CBE_RAS */
805
806 /*
807 * Relocation-on interrupts: A subset of the interrupts can be delivered
808 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
809 * it. Addresses are the same as the original interrupt addresses, but
810 * offset by 0xc000000000004000.
811 * It's impossible to receive interrupts below 0x300 via this mechanism.
812 * KVM: None of these traps are from the guest ; anything that escalated
813 * to HV=1 from HV=0 is delivered via real mode handlers.
814 */
815
816 /*
817 * This uses the standard macro, since the original 0x300 vector
818 * only has extra guff for STAB-based processors -- which never
819 * come here.
820 */
821 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
822 . = 0x4380
823 .globl data_access_slb_relon_pSeries
824 data_access_slb_relon_pSeries:
825 SET_SCRATCH0(r13)
826 EXCEPTION_PROLOG_0(PACA_EXSLB)
827 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
828 std r3,PACA_EXSLB+EX_R3(r13)
829 mfspr r3,SPRN_DAR
830 mfspr r12,SPRN_SRR1
831 #ifndef CONFIG_RELOCATABLE
832 b slb_miss_realmode
833 #else
834 /*
835 * We can't just use a direct branch to slb_miss_realmode
836 * because the distance from here to there depends on where
837 * the kernel ends up being put.
838 */
839 mfctr r11
840 ld r10,PACAKBASE(r13)
841 LOAD_HANDLER(r10, slb_miss_realmode)
842 mtctr r10
843 bctr
844 #endif
845
846 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
847 . = 0x4480
848 .globl instruction_access_slb_relon_pSeries
849 instruction_access_slb_relon_pSeries:
850 SET_SCRATCH0(r13)
851 EXCEPTION_PROLOG_0(PACA_EXSLB)
852 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
853 std r3,PACA_EXSLB+EX_R3(r13)
854 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
855 mfspr r12,SPRN_SRR1
856 #ifndef CONFIG_RELOCATABLE
857 b slb_miss_realmode
858 #else
859 mfctr r11
860 ld r10,PACAKBASE(r13)
861 LOAD_HANDLER(r10, slb_miss_realmode)
862 mtctr r10
863 bctr
864 #endif
865
866 . = 0x4500
867 .globl hardware_interrupt_relon_pSeries;
868 .globl hardware_interrupt_relon_hv;
869 hardware_interrupt_relon_pSeries:
870 hardware_interrupt_relon_hv:
871 BEGIN_FTR_SECTION
872 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
873 FTR_SECTION_ELSE
874 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
875 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
876 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
877 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
878 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
879 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
880 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
881 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
882 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
883
884 . = 0x4c00
885 .globl system_call_relon_pSeries
886 system_call_relon_pSeries:
887 HMT_MEDIUM
888 SYSCALL_PSERIES_1
889 SYSCALL_PSERIES_2_DIRECT
890 SYSCALL_PSERIES_3
891
892 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
893
894 . = 0x4e00
895 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
896
897 . = 0x4e20
898 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
899
900 . = 0x4e40
901 emulation_assist_relon_trampoline:
902 SET_SCRATCH0(r13)
903 EXCEPTION_PROLOG_0(PACA_EXGEN)
904 b emulation_assist_relon_hv
905
906 . = 0x4e60
907 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
908
909 . = 0x4e80
910 h_doorbell_relon_trampoline:
911 SET_SCRATCH0(r13)
912 EXCEPTION_PROLOG_0(PACA_EXGEN)
913 b h_doorbell_relon_hv
914
915 . = 0x4f00
916 performance_monitor_relon_pseries_trampoline:
917 SET_SCRATCH0(r13)
918 EXCEPTION_PROLOG_0(PACA_EXGEN)
919 b performance_monitor_relon_pSeries
920
921 . = 0x4f20
922 altivec_unavailable_relon_pseries_trampoline:
923 SET_SCRATCH0(r13)
924 EXCEPTION_PROLOG_0(PACA_EXGEN)
925 b altivec_unavailable_relon_pSeries
926
927 . = 0x4f40
928 vsx_unavailable_relon_pseries_trampoline:
929 SET_SCRATCH0(r13)
930 EXCEPTION_PROLOG_0(PACA_EXGEN)
931 b vsx_unavailable_relon_pSeries
932
933 . = 0x4f60
934 facility_unavailable_relon_trampoline:
935 SET_SCRATCH0(r13)
936 EXCEPTION_PROLOG_0(PACA_EXGEN)
937 b facility_unavailable_relon_pSeries
938
939 . = 0x4f80
940 hv_facility_unavailable_relon_trampoline:
941 SET_SCRATCH0(r13)
942 EXCEPTION_PROLOG_0(PACA_EXGEN)
943 b hv_facility_unavailable_relon_hv
944
945 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
946 #ifdef CONFIG_PPC_DENORMALISATION
947 . = 0x5500
948 b denorm_exception_hv
949 #endif
950 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
951
952 /* Other future vectors */
953 .align 7
954 .globl __end_interrupts
955 __end_interrupts:
956
957 .align 7
958 system_call_entry_direct:
959 #if defined(CONFIG_RELOCATABLE)
960 /* The first level prologue may have used LR to get here, saving
961 * orig in r10. To save hacking/ifdeffing common code, restore here.
962 */
963 mtlr r10
964 #endif
965 system_call_entry:
966 b system_call_common
967
968 ppc64_runlatch_on_trampoline:
969 b __ppc64_runlatch_on
970
971 /*
972 * Here r13 points to the paca, r9 contains the saved CR,
973 * SRR0 and SRR1 are saved in r11 and r12,
974 * r9 - r13 are saved in paca->exgen.
975 */
976 .align 7
977 .globl data_access_common
978 data_access_common:
979 mfspr r10,SPRN_DAR
980 std r10,PACA_EXGEN+EX_DAR(r13)
981 mfspr r10,SPRN_DSISR
982 stw r10,PACA_EXGEN+EX_DSISR(r13)
983 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
984 RECONCILE_IRQ_STATE(r10, r11)
985 ld r12,_MSR(r1)
986 ld r3,PACA_EXGEN+EX_DAR(r13)
987 lwz r4,PACA_EXGEN+EX_DSISR(r13)
988 li r5,0x300
989 b do_hash_page /* Try to handle as hpte fault */
990
991 .align 7
992 .globl h_data_storage_common
993 h_data_storage_common:
994 mfspr r10,SPRN_HDAR
995 std r10,PACA_EXGEN+EX_DAR(r13)
996 mfspr r10,SPRN_HDSISR
997 stw r10,PACA_EXGEN+EX_DSISR(r13)
998 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
999 bl save_nvgprs
1000 RECONCILE_IRQ_STATE(r10, r11)
1001 addi r3,r1,STACK_FRAME_OVERHEAD
1002 bl unknown_exception
1003 b ret_from_except
1004
1005 .align 7
1006 .globl instruction_access_common
1007 instruction_access_common:
1008 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
1009 RECONCILE_IRQ_STATE(r10, r11)
1010 ld r12,_MSR(r1)
1011 ld r3,_NIP(r1)
1012 andis. r4,r12,0x5820
1013 li r5,0x400
1014 b do_hash_page /* Try to handle as hpte fault */
1015
1016 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception)
1017
1018 /*
1019 * Here is the common SLB miss user that is used when going to virtual
1020 * mode for SLB misses, that is currently not used
1021 */
1022 #ifdef __DISABLED__
1023 .align 7
1024 .globl slb_miss_user_common
1025 slb_miss_user_common:
1026 mflr r10
1027 std r3,PACA_EXGEN+EX_DAR(r13)
1028 stw r9,PACA_EXGEN+EX_CCR(r13)
1029 std r10,PACA_EXGEN+EX_LR(r13)
1030 std r11,PACA_EXGEN+EX_SRR0(r13)
1031 bl slb_allocate_user
1032
1033 ld r10,PACA_EXGEN+EX_LR(r13)
1034 ld r3,PACA_EXGEN+EX_R3(r13)
1035 lwz r9,PACA_EXGEN+EX_CCR(r13)
1036 ld r11,PACA_EXGEN+EX_SRR0(r13)
1037 mtlr r10
1038 beq- slb_miss_fault
1039
1040 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1041 beq- unrecov_user_slb
1042 mfmsr r10
1043
1044 .machine push
1045 .machine "power4"
1046 mtcrf 0x80,r9
1047 .machine pop
1048
1049 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
1050 mtmsrd r10,1
1051
1052 mtspr SRR0,r11
1053 mtspr SRR1,r12
1054
1055 ld r9,PACA_EXGEN+EX_R9(r13)
1056 ld r10,PACA_EXGEN+EX_R10(r13)
1057 ld r11,PACA_EXGEN+EX_R11(r13)
1058 ld r12,PACA_EXGEN+EX_R12(r13)
1059 ld r13,PACA_EXGEN+EX_R13(r13)
1060 rfid
1061 b .
1062
1063 slb_miss_fault:
1064 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
1065 ld r4,PACA_EXGEN+EX_DAR(r13)
1066 li r5,0
1067 std r4,_DAR(r1)
1068 std r5,_DSISR(r1)
1069 b handle_page_fault
1070
1071 unrecov_user_slb:
1072 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
1073 RECONCILE_IRQ_STATE(r10, r11)
1074 bl save_nvgprs
1075 1: addi r3,r1,STACK_FRAME_OVERHEAD
1076 bl unrecoverable_exception
1077 b 1b
1078
1079 #endif /* __DISABLED__ */
1080
1081
1082 /*
1083 * Machine check is different because we use a different
1084 * save area: PACA_EXMC instead of PACA_EXGEN.
1085 */
1086 .align 7
1087 .globl machine_check_common
1088 machine_check_common:
1089
1090 mfspr r10,SPRN_DAR
1091 std r10,PACA_EXGEN+EX_DAR(r13)
1092 mfspr r10,SPRN_DSISR
1093 stw r10,PACA_EXGEN+EX_DSISR(r13)
1094 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
1095 FINISH_NAP
1096 RECONCILE_IRQ_STATE(r10, r11)
1097 ld r3,PACA_EXGEN+EX_DAR(r13)
1098 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1099 std r3,_DAR(r1)
1100 std r4,_DSISR(r1)
1101 bl save_nvgprs
1102 addi r3,r1,STACK_FRAME_OVERHEAD
1103 bl machine_check_exception
1104 b ret_from_except
1105
1106 .align 7
1107 .globl alignment_common
1108 alignment_common:
1109 mfspr r10,SPRN_DAR
1110 std r10,PACA_EXGEN+EX_DAR(r13)
1111 mfspr r10,SPRN_DSISR
1112 stw r10,PACA_EXGEN+EX_DSISR(r13)
1113 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1114 ld r3,PACA_EXGEN+EX_DAR(r13)
1115 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1116 std r3,_DAR(r1)
1117 std r4,_DSISR(r1)
1118 bl save_nvgprs
1119 RECONCILE_IRQ_STATE(r10, r11)
1120 addi r3,r1,STACK_FRAME_OVERHEAD
1121 bl alignment_exception
1122 b ret_from_except
1123
1124 .align 7
1125 .globl program_check_common
1126 program_check_common:
1127 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1128 bl save_nvgprs
1129 RECONCILE_IRQ_STATE(r10, r11)
1130 addi r3,r1,STACK_FRAME_OVERHEAD
1131 bl program_check_exception
1132 b ret_from_except
1133
1134 .align 7
1135 .globl fp_unavailable_common
1136 fp_unavailable_common:
1137 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1138 bne 1f /* if from user, just load it up */
1139 bl save_nvgprs
1140 RECONCILE_IRQ_STATE(r10, r11)
1141 addi r3,r1,STACK_FRAME_OVERHEAD
1142 bl kernel_fp_unavailable_exception
1143 BUG_OPCODE
1144 1:
1145 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1146 BEGIN_FTR_SECTION
1147 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1148 * transaction), go do TM stuff
1149 */
1150 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1151 bne- 2f
1152 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1153 #endif
1154 bl load_up_fpu
1155 b fast_exception_return
1156 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1157 2: /* User process was in a transaction */
1158 bl save_nvgprs
1159 RECONCILE_IRQ_STATE(r10, r11)
1160 addi r3,r1,STACK_FRAME_OVERHEAD
1161 bl fp_unavailable_tm
1162 b ret_from_except
1163 #endif
1164 .align 7
1165 .globl altivec_unavailable_common
1166 altivec_unavailable_common:
1167 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1168 #ifdef CONFIG_ALTIVEC
1169 BEGIN_FTR_SECTION
1170 beq 1f
1171 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1172 BEGIN_FTR_SECTION_NESTED(69)
1173 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1174 * transaction), go do TM stuff
1175 */
1176 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1177 bne- 2f
1178 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1179 #endif
1180 bl load_up_altivec
1181 b fast_exception_return
1182 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1183 2: /* User process was in a transaction */
1184 bl save_nvgprs
1185 RECONCILE_IRQ_STATE(r10, r11)
1186 addi r3,r1,STACK_FRAME_OVERHEAD
1187 bl altivec_unavailable_tm
1188 b ret_from_except
1189 #endif
1190 1:
1191 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1192 #endif
1193 bl save_nvgprs
1194 RECONCILE_IRQ_STATE(r10, r11)
1195 addi r3,r1,STACK_FRAME_OVERHEAD
1196 bl altivec_unavailable_exception
1197 b ret_from_except
1198
1199 .align 7
1200 .globl vsx_unavailable_common
1201 vsx_unavailable_common:
1202 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1203 #ifdef CONFIG_VSX
1204 BEGIN_FTR_SECTION
1205 beq 1f
1206 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1207 BEGIN_FTR_SECTION_NESTED(69)
1208 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1209 * transaction), go do TM stuff
1210 */
1211 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1212 bne- 2f
1213 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1214 #endif
1215 b load_up_vsx
1216 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1217 2: /* User process was in a transaction */
1218 bl save_nvgprs
1219 RECONCILE_IRQ_STATE(r10, r11)
1220 addi r3,r1,STACK_FRAME_OVERHEAD
1221 bl vsx_unavailable_tm
1222 b ret_from_except
1223 #endif
1224 1:
1225 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1226 #endif
1227 bl save_nvgprs
1228 RECONCILE_IRQ_STATE(r10, r11)
1229 addi r3,r1,STACK_FRAME_OVERHEAD
1230 bl vsx_unavailable_exception
1231 b ret_from_except
1232
1233 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception)
1234 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception)
1235
1236 .align 7
1237 .globl __end_handlers
1238 __end_handlers:
1239
1240 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1241 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1242 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1243
1244 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1245 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1246 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1247 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1248 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
1249
1250 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1251 /*
1252 * Data area reserved for FWNMI option.
1253 * This address (0x7000) is fixed by the RPA.
1254 */
1255 .= 0x7000
1256 .globl fwnmi_data_area
1257 fwnmi_data_area:
1258
1259 /* pseries and powernv need to keep the whole page from
1260 * 0x7000 to 0x8000 free for use by the firmware
1261 */
1262 . = 0x8000
1263 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1264
1265 .globl hmi_exception_early
1266 hmi_exception_early:
1267 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60)
1268 mr r10,r1 /* Save r1 */
1269 ld r1,PACAEMERGSP(r13) /* Use emergency stack */
1270 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
1271 std r9,_CCR(r1) /* save CR in stackframe */
1272 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
1273 std r11,_NIP(r1) /* save HSRR0 in stackframe */
1274 mfspr r12,SPRN_HSRR1 /* Save SRR1 */
1275 std r12,_MSR(r1) /* save SRR1 in stackframe */
1276 std r10,0(r1) /* make stack chain pointer */
1277 std r0,GPR0(r1) /* save r0 in stackframe */
1278 std r10,GPR1(r1) /* save r1 in stackframe */
1279 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
1280 EXCEPTION_PROLOG_COMMON_3(0xe60)
1281 addi r3,r1,STACK_FRAME_OVERHEAD
1282 bl hmi_exception_realmode
1283 /* Windup the stack. */
1284 /* Move original HSRR0 and HSRR1 into the respective regs */
1285 ld r9,_MSR(r1)
1286 mtspr SPRN_HSRR1,r9
1287 ld r3,_NIP(r1)
1288 mtspr SPRN_HSRR0,r3
1289 ld r9,_CTR(r1)
1290 mtctr r9
1291 ld r9,_XER(r1)
1292 mtxer r9
1293 ld r9,_LINK(r1)
1294 mtlr r9
1295 REST_GPR(0, r1)
1296 REST_8GPRS(2, r1)
1297 REST_GPR(10, r1)
1298 ld r11,_CCR(r1)
1299 mtcr r11
1300 REST_GPR(11, r1)
1301 REST_2GPRS(12, r1)
1302 /* restore original r1. */
1303 ld r1,GPR1(r1)
1304
1305 /*
1306 * Go to virtual mode and pull the HMI event information from
1307 * firmware.
1308 */
1309 .globl hmi_exception_after_realmode
1310 hmi_exception_after_realmode:
1311 SET_SCRATCH0(r13)
1312 EXCEPTION_PROLOG_0(PACA_EXGEN)
1313 b hmi_exception_hv
1314
1315
1316 #define MACHINE_CHECK_HANDLER_WINDUP \
1317 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1318 li r0,MSR_RI; \
1319 mfmsr r9; /* get MSR value */ \
1320 andc r9,r9,r0; \
1321 mtmsrd r9,1; /* Clear MSR_RI */ \
1322 /* Move original SRR0 and SRR1 into the respective regs */ \
1323 ld r9,_MSR(r1); \
1324 mtspr SPRN_SRR1,r9; \
1325 ld r3,_NIP(r1); \
1326 mtspr SPRN_SRR0,r3; \
1327 ld r9,_CTR(r1); \
1328 mtctr r9; \
1329 ld r9,_XER(r1); \
1330 mtxer r9; \
1331 ld r9,_LINK(r1); \
1332 mtlr r9; \
1333 REST_GPR(0, r1); \
1334 REST_8GPRS(2, r1); \
1335 REST_GPR(10, r1); \
1336 ld r11,_CCR(r1); \
1337 mtcr r11; \
1338 /* Decrement paca->in_mce. */ \
1339 lhz r12,PACA_IN_MCE(r13); \
1340 subi r12,r12,1; \
1341 sth r12,PACA_IN_MCE(r13); \
1342 REST_GPR(11, r1); \
1343 REST_2GPRS(12, r1); \
1344 /* restore original r1. */ \
1345 ld r1,GPR1(r1)
1346
1347 /*
1348 * Handle machine check early in real mode. We come here with
1349 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1350 */
1351 .align 7
1352 .globl machine_check_handle_early
1353 machine_check_handle_early:
1354 std r0,GPR0(r1) /* Save r0 */
1355 EXCEPTION_PROLOG_COMMON_3(0x200)
1356 bl save_nvgprs
1357 addi r3,r1,STACK_FRAME_OVERHEAD
1358 bl machine_check_early
1359 std r3,RESULT(r1) /* Save result */
1360 ld r12,_MSR(r1)
1361 #ifdef CONFIG_PPC_P7_NAP
1362 /*
1363 * Check if thread was in power saving mode. We come here when any
1364 * of the following is true:
1365 * a. thread wasn't in power saving mode
1366 * b. thread was in power saving mode with no state loss or
1367 * supervisor state loss
1368 *
1369 * Go back to nap again if (b) is true.
1370 */
1371 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
1372 beq 4f /* No, it wasn;t */
1373 /* Thread was in power saving mode. Go back to nap again. */
1374 cmpwi r11,2
1375 bne 3f
1376 /* Supervisor state loss */
1377 li r0,1
1378 stb r0,PACA_NAPSTATELOST(r13)
1379 3: bl machine_check_queue_event
1380 MACHINE_CHECK_HANDLER_WINDUP
1381 GET_PACA(r13)
1382 ld r1,PACAR1(r13)
1383 b power7_enter_nap_mode
1384 4:
1385 #endif
1386 /*
1387 * Check if we are coming from hypervisor userspace. If yes then we
1388 * continue in host kernel in V mode to deliver the MC event.
1389 */
1390 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1391 beq 5f
1392 andi. r11,r12,MSR_PR /* See if coming from user. */
1393 bne 9f /* continue in V mode if we are. */
1394
1395 5:
1396 #ifdef CONFIG_KVM_BOOK3S_64_HV
1397 /*
1398 * We are coming from kernel context. Check if we are coming from
1399 * guest. if yes, then we can continue. We will fall through
1400 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1401 */
1402 lbz r11,HSTATE_IN_GUEST(r13)
1403 cmpwi r11,0 /* Check if coming from guest */
1404 bne 9f /* continue if we are. */
1405 #endif
1406 /*
1407 * At this point we are not sure about what context we come from.
1408 * Queue up the MCE event and return from the interrupt.
1409 * But before that, check if this is an un-recoverable exception.
1410 * If yes, then stay on emergency stack and panic.
1411 */
1412 andi. r11,r12,MSR_RI
1413 bne 2f
1414 1: mfspr r11,SPRN_SRR0
1415 ld r10,PACAKBASE(r13)
1416 LOAD_HANDLER(r10,unrecover_mce)
1417 mtspr SPRN_SRR0,r10
1418 ld r10,PACAKMSR(r13)
1419 /*
1420 * We are going down. But there are chances that we might get hit by
1421 * another MCE during panic path and we may run into unstable state
1422 * with no way out. Hence, turn ME bit off while going down, so that
1423 * when another MCE is hit during panic path, system will checkstop
1424 * and hypervisor will get restarted cleanly by SP.
1425 */
1426 li r3,MSR_ME
1427 andc r10,r10,r3 /* Turn off MSR_ME */
1428 mtspr SPRN_SRR1,r10
1429 rfid
1430 b .
1431 2:
1432 /*
1433 * Check if we have successfully handled/recovered from error, if not
1434 * then stay on emergency stack and panic.
1435 */
1436 ld r3,RESULT(r1) /* Load result */
1437 cmpdi r3,0 /* see if we handled MCE successfully */
1438
1439 beq 1b /* if !handled then panic */
1440 /*
1441 * Return from MC interrupt.
1442 * Queue up the MCE event so that we can log it later, while
1443 * returning from kernel or opal call.
1444 */
1445 bl machine_check_queue_event
1446 MACHINE_CHECK_HANDLER_WINDUP
1447 rfid
1448 9:
1449 /* Deliver the machine check to host kernel in V mode. */
1450 MACHINE_CHECK_HANDLER_WINDUP
1451 b machine_check_pSeries
1452
1453 unrecover_mce:
1454 /* Invoke machine_check_exception to print MCE event and panic. */
1455 addi r3,r1,STACK_FRAME_OVERHEAD
1456 bl machine_check_exception
1457 /*
1458 * We will not reach here. Even if we did, there is no way out. Call
1459 * unrecoverable_exception and die.
1460 */
1461 1: addi r3,r1,STACK_FRAME_OVERHEAD
1462 bl unrecoverable_exception
1463 b 1b
1464 /*
1465 * r13 points to the PACA, r9 contains the saved CR,
1466 * r12 contain the saved SRR1, SRR0 is still ready for return
1467 * r3 has the faulting address
1468 * r9 - r13 are saved in paca->exslb.
1469 * r3 is saved in paca->slb_r3
1470 * We assume we aren't going to take any exceptions during this procedure.
1471 */
1472 slb_miss_realmode:
1473 mflr r10
1474 #ifdef CONFIG_RELOCATABLE
1475 mtctr r11
1476 #endif
1477
1478 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1479 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1480
1481 bl slb_allocate_realmode
1482
1483 /* All done -- return from exception. */
1484
1485 ld r10,PACA_EXSLB+EX_LR(r13)
1486 ld r3,PACA_EXSLB+EX_R3(r13)
1487 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1488
1489 mtlr r10
1490
1491 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1492 beq- 2f
1493
1494 .machine push
1495 .machine "power4"
1496 mtcrf 0x80,r9
1497 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1498 .machine pop
1499
1500 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1501 ld r9,PACA_EXSLB+EX_R9(r13)
1502 ld r10,PACA_EXSLB+EX_R10(r13)
1503 ld r11,PACA_EXSLB+EX_R11(r13)
1504 ld r12,PACA_EXSLB+EX_R12(r13)
1505 ld r13,PACA_EXSLB+EX_R13(r13)
1506 rfid
1507 b . /* prevent speculative execution */
1508
1509 2: mfspr r11,SPRN_SRR0
1510 ld r10,PACAKBASE(r13)
1511 LOAD_HANDLER(r10,unrecov_slb)
1512 mtspr SPRN_SRR0,r10
1513 ld r10,PACAKMSR(r13)
1514 mtspr SPRN_SRR1,r10
1515 rfid
1516 b .
1517
1518 unrecov_slb:
1519 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1520 RECONCILE_IRQ_STATE(r10, r11)
1521 bl save_nvgprs
1522 1: addi r3,r1,STACK_FRAME_OVERHEAD
1523 bl unrecoverable_exception
1524 b 1b
1525
1526
1527 #ifdef CONFIG_PPC_970_NAP
1528 power4_fixup_nap:
1529 andc r9,r9,r10
1530 std r9,TI_LOCAL_FLAGS(r11)
1531 ld r10,_LINK(r1) /* make idle task do the */
1532 std r10,_NIP(r1) /* equivalent of a blr */
1533 blr
1534 #endif
1535
1536 /*
1537 * Hash table stuff
1538 */
1539 .align 7
1540 do_hash_page:
1541 std r3,_DAR(r1)
1542 std r4,_DSISR(r1)
1543
1544 andis. r0,r4,0xa410 /* weird error? */
1545 bne- handle_page_fault /* if not, try to insert a HPTE */
1546 andis. r0,r4,DSISR_DABRMATCH@h
1547 bne- handle_dabr_fault
1548 CURRENT_THREAD_INFO(r11, r1)
1549 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1550 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1551 bne 77f /* then don't call hash_page now */
1552 /*
1553 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1554 * accessing a userspace segment (even from the kernel). We assume
1555 * kernel addresses always have the high bit set.
1556 */
1557 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1558 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1559 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1560 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1561 ori r4,r4,1 /* add _PAGE_PRESENT */
1562 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1563
1564 /*
1565 * r3 contains the faulting address
1566 * r4 contains the required access permissions
1567 * r5 contains the trap number
1568 * r6 contains dsisr
1569 *
1570 * at return r3 = 0 for success, 1 for page fault, negative for error
1571 */
1572 ld r6,_DSISR(r1)
1573 bl hash_page /* build HPTE if possible */
1574 cmpdi r3,0 /* see if hash_page succeeded */
1575
1576 /* Success */
1577 beq fast_exc_return_irq /* Return from exception on success */
1578
1579 /* Error */
1580 blt- 13f
1581
1582 /* Here we have a page fault that hash_page can't handle. */
1583 handle_page_fault:
1584 11: ld r4,_DAR(r1)
1585 ld r5,_DSISR(r1)
1586 addi r3,r1,STACK_FRAME_OVERHEAD
1587 bl do_page_fault
1588 cmpdi r3,0
1589 beq+ 12f
1590 bl save_nvgprs
1591 mr r5,r3
1592 addi r3,r1,STACK_FRAME_OVERHEAD
1593 lwz r4,_DAR(r1)
1594 bl bad_page_fault
1595 b ret_from_except
1596
1597 /* We have a data breakpoint exception - handle it */
1598 handle_dabr_fault:
1599 bl save_nvgprs
1600 ld r4,_DAR(r1)
1601 ld r5,_DSISR(r1)
1602 addi r3,r1,STACK_FRAME_OVERHEAD
1603 bl do_break
1604 12: b ret_from_except_lite
1605
1606
1607 /* We have a page fault that hash_page could handle but HV refused
1608 * the PTE insertion
1609 */
1610 13: bl save_nvgprs
1611 mr r5,r3
1612 addi r3,r1,STACK_FRAME_OVERHEAD
1613 ld r4,_DAR(r1)
1614 bl low_hash_fault
1615 b ret_from_except
1616
1617 /*
1618 * We come here as a result of a DSI at a point where we don't want
1619 * to call hash_page, such as when we are accessing memory (possibly
1620 * user memory) inside a PMU interrupt that occurred while interrupts
1621 * were soft-disabled. We want to invoke the exception handler for
1622 * the access, or panic if there isn't a handler.
1623 */
1624 77: bl save_nvgprs
1625 mr r4,r3
1626 addi r3,r1,STACK_FRAME_OVERHEAD
1627 li r5,SIGSEGV
1628 bl bad_page_fault
1629 b ret_from_except
1630
1631 /*
1632 * Here we have detected that the kernel stack pointer is bad.
1633 * R9 contains the saved CR, r13 points to the paca,
1634 * r10 contains the (bad) kernel stack pointer,
1635 * r11 and r12 contain the saved SRR0 and SRR1.
1636 * We switch to using an emergency stack, save the registers there,
1637 * and call kernel_bad_stack(), which panics.
1638 */
1639 bad_stack:
1640 ld r1,PACAEMERGSP(r13)
1641 subi r1,r1,64+INT_FRAME_SIZE
1642 std r9,_CCR(r1)
1643 std r10,GPR1(r1)
1644 std r11,_NIP(r1)
1645 std r12,_MSR(r1)
1646 mfspr r11,SPRN_DAR
1647 mfspr r12,SPRN_DSISR
1648 std r11,_DAR(r1)
1649 std r12,_DSISR(r1)
1650 mflr r10
1651 mfctr r11
1652 mfxer r12
1653 std r10,_LINK(r1)
1654 std r11,_CTR(r1)
1655 std r12,_XER(r1)
1656 SAVE_GPR(0,r1)
1657 SAVE_GPR(2,r1)
1658 ld r10,EX_R3(r3)
1659 std r10,GPR3(r1)
1660 SAVE_GPR(4,r1)
1661 SAVE_4GPRS(5,r1)
1662 ld r9,EX_R9(r3)
1663 ld r10,EX_R10(r3)
1664 SAVE_2GPRS(9,r1)
1665 ld r9,EX_R11(r3)
1666 ld r10,EX_R12(r3)
1667 ld r11,EX_R13(r3)
1668 std r9,GPR11(r1)
1669 std r10,GPR12(r1)
1670 std r11,GPR13(r1)
1671 BEGIN_FTR_SECTION
1672 ld r10,EX_CFAR(r3)
1673 std r10,ORIG_GPR3(r1)
1674 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1675 SAVE_8GPRS(14,r1)
1676 SAVE_10GPRS(22,r1)
1677 lhz r12,PACA_TRAP_SAVE(r13)
1678 std r12,_TRAP(r1)
1679 addi r11,r1,INT_FRAME_SIZE
1680 std r11,0(r1)
1681 li r12,0
1682 std r12,0(r11)
1683 ld r2,PACATOC(r13)
1684 ld r11,exception_marker@toc(r2)
1685 std r12,RESULT(r1)
1686 std r11,STACK_FRAME_OVERHEAD-16(r1)
1687 1: addi r3,r1,STACK_FRAME_OVERHEAD
1688 bl kernel_bad_stack
1689 b 1b