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powernv/cpuidle: Redesign idle states management
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1 /*
2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
6 *
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
9 *
10 * Most of this originates from head_64.S and thus has the same
11 * copyright history.
12 *
13 */
14
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18 #include <asm/cpuidle.h>
19
20 /*
21 * We layout physical memory as follows:
22 * 0x0000 - 0x00ff : Secondary processor spin code
23 * 0x0100 - 0x17ff : pSeries Interrupt prologs
24 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
25 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
26 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
27 * 0x7000 - 0x7fff : FWNMI data area
28 * 0x8000 - 0x8fff : Initial (CPU0) segment table
29 * 0x9000 - : Early init and support code
30 */
31 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
32 #define SYSCALL_PSERIES_1 \
33 BEGIN_FTR_SECTION \
34 cmpdi r0,0x1ebe ; \
35 beq- 1f ; \
36 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
37 mr r9,r13 ; \
38 GET_PACA(r13) ; \
39 mfspr r11,SPRN_SRR0 ; \
40 0:
41
42 #define SYSCALL_PSERIES_2_RFID \
43 mfspr r12,SPRN_SRR1 ; \
44 ld r10,PACAKBASE(r13) ; \
45 LOAD_HANDLER(r10, system_call_entry) ; \
46 mtspr SPRN_SRR0,r10 ; \
47 ld r10,PACAKMSR(r13) ; \
48 mtspr SPRN_SRR1,r10 ; \
49 rfid ; \
50 b . ; /* prevent speculative execution */
51
52 #define SYSCALL_PSERIES_3 \
53 /* Fast LE/BE switch system call */ \
54 1: mfspr r12,SPRN_SRR1 ; \
55 xori r12,r12,MSR_LE ; \
56 mtspr SPRN_SRR1,r12 ; \
57 rfid ; /* return to userspace */ \
58 b . ; /* prevent speculative execution */
59
60 #if defined(CONFIG_RELOCATABLE)
61 /*
62 * We can't branch directly; in the direct case we use LR
63 * and system_call_entry restores LR. (We thus need to move
64 * LR to r10 in the RFID case too.)
65 */
66 #define SYSCALL_PSERIES_2_DIRECT \
67 mflr r10 ; \
68 ld r12,PACAKBASE(r13) ; \
69 LOAD_HANDLER(r12, system_call_entry_direct) ; \
70 mtctr r12 ; \
71 mfspr r12,SPRN_SRR1 ; \
72 /* Re-use of r13... No spare regs to do this */ \
73 li r13,MSR_RI ; \
74 mtmsrd r13,1 ; \
75 GET_PACA(r13) ; /* get r13 back */ \
76 bctr ;
77 #else
78 /* We can branch directly */
79 #define SYSCALL_PSERIES_2_DIRECT \
80 mfspr r12,SPRN_SRR1 ; \
81 li r10,MSR_RI ; \
82 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
83 b system_call_entry_direct ;
84 #endif
85
86 /*
87 * This is the start of the interrupt handlers for pSeries
88 * This code runs with relocation off.
89 * Code from here to __end_interrupts gets copied down to real
90 * address 0x100 when we are running a relocatable kernel.
91 * Therefore any relative branches in this section must only
92 * branch to labels in this section.
93 */
94 . = 0x100
95 .globl __start_interrupts
96 __start_interrupts:
97
98 .globl system_reset_pSeries;
99 system_reset_pSeries:
100 HMT_MEDIUM_PPR_DISCARD
101 SET_SCRATCH0(r13)
102 #ifdef CONFIG_PPC_P7_NAP
103 BEGIN_FTR_SECTION
104 /* Running native on arch 2.06 or later, check if we are
105 * waking up from nap. We only handle no state loss and
106 * supervisor state loss. We do -not- handle hypervisor
107 * state loss at this time.
108 */
109 mfspr r13,SPRN_SRR1
110 rlwinm. r13,r13,47-31,30,31
111 beq 9f
112
113 cmpwi cr3,r13,2
114
115 GET_PACA(r13)
116 lbz r0,PACA_THREAD_IDLE_STATE(r13)
117 cmpwi cr2,r0,PNV_THREAD_NAP
118 bgt cr2,8f /* Either sleep or Winkle */
119
120 /* Waking up from nap should not cause hypervisor state loss */
121 bgt cr3,.
122
123 /* Waking up from nap */
124 li r0,PNV_THREAD_RUNNING
125 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */
126
127 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
128 li r0,KVM_HWTHREAD_IN_KERNEL
129 stb r0,HSTATE_HWTHREAD_STATE(r13)
130 /* Order setting hwthread_state vs. testing hwthread_req */
131 sync
132 lbz r0,HSTATE_HWTHREAD_REQ(r13)
133 cmpwi r0,0
134 beq 1f
135 b kvm_start_guest
136 1:
137 #endif
138
139 /* Return SRR1 from power7_nap() */
140 mfspr r3,SPRN_SRR1
141 beq cr3,2f
142 b power7_wakeup_noloss
143 2: b power7_wakeup_loss
144
145 /* Fast Sleep wakeup on PowerNV */
146 8: GET_PACA(r13)
147 b power7_wakeup_tb_loss
148
149 9:
150 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
151 #endif /* CONFIG_PPC_P7_NAP */
152 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
153 NOTEST, 0x100)
154
155 . = 0x200
156 machine_check_pSeries_1:
157 /* This is moved out of line as it can be patched by FW, but
158 * some code path might still want to branch into the original
159 * vector
160 */
161 HMT_MEDIUM_PPR_DISCARD
162 SET_SCRATCH0(r13) /* save r13 */
163 #ifdef CONFIG_PPC_P7_NAP
164 BEGIN_FTR_SECTION
165 /* Running native on arch 2.06 or later, check if we are
166 * waking up from nap. We only handle no state loss and
167 * supervisor state loss. We do -not- handle hypervisor
168 * state loss at this time.
169 */
170 mfspr r13,SPRN_SRR1
171 rlwinm. r13,r13,47-31,30,31
172 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
173 beq 9f
174
175 mfspr r13,SPRN_SRR1
176 rlwinm. r13,r13,47-31,30,31
177 /* waking up from powersave (nap) state */
178 cmpwi cr1,r13,2
179 /* Total loss of HV state is fatal. let's just stay stuck here */
180 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
181 bgt cr1,.
182 9:
183 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
184 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
185 #endif /* CONFIG_PPC_P7_NAP */
186 EXCEPTION_PROLOG_0(PACA_EXMC)
187 BEGIN_FTR_SECTION
188 b machine_check_pSeries_early
189 FTR_SECTION_ELSE
190 b machine_check_pSeries_0
191 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
192
193 . = 0x300
194 .globl data_access_pSeries
195 data_access_pSeries:
196 HMT_MEDIUM_PPR_DISCARD
197 SET_SCRATCH0(r13)
198 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
199 KVMTEST, 0x300)
200
201 . = 0x380
202 .globl data_access_slb_pSeries
203 data_access_slb_pSeries:
204 HMT_MEDIUM_PPR_DISCARD
205 SET_SCRATCH0(r13)
206 EXCEPTION_PROLOG_0(PACA_EXSLB)
207 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
208 std r3,PACA_EXSLB+EX_R3(r13)
209 mfspr r3,SPRN_DAR
210 #ifdef __DISABLED__
211 /* Keep that around for when we re-implement dynamic VSIDs */
212 cmpdi r3,0
213 bge slb_miss_user_pseries
214 #endif /* __DISABLED__ */
215 mfspr r12,SPRN_SRR1
216 #ifndef CONFIG_RELOCATABLE
217 b slb_miss_realmode
218 #else
219 /*
220 * We can't just use a direct branch to slb_miss_realmode
221 * because the distance from here to there depends on where
222 * the kernel ends up being put.
223 */
224 mfctr r11
225 ld r10,PACAKBASE(r13)
226 LOAD_HANDLER(r10, slb_miss_realmode)
227 mtctr r10
228 bctr
229 #endif
230
231 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
232
233 . = 0x480
234 .globl instruction_access_slb_pSeries
235 instruction_access_slb_pSeries:
236 HMT_MEDIUM_PPR_DISCARD
237 SET_SCRATCH0(r13)
238 EXCEPTION_PROLOG_0(PACA_EXSLB)
239 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
240 std r3,PACA_EXSLB+EX_R3(r13)
241 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
242 #ifdef __DISABLED__
243 /* Keep that around for when we re-implement dynamic VSIDs */
244 cmpdi r3,0
245 bge slb_miss_user_pseries
246 #endif /* __DISABLED__ */
247 mfspr r12,SPRN_SRR1
248 #ifndef CONFIG_RELOCATABLE
249 b slb_miss_realmode
250 #else
251 mfctr r11
252 ld r10,PACAKBASE(r13)
253 LOAD_HANDLER(r10, slb_miss_realmode)
254 mtctr r10
255 bctr
256 #endif
257
258 /* We open code these as we can't have a ". = x" (even with
259 * x = "." within a feature section
260 */
261 . = 0x500;
262 .globl hardware_interrupt_pSeries;
263 .globl hardware_interrupt_hv;
264 hardware_interrupt_pSeries:
265 hardware_interrupt_hv:
266 HMT_MEDIUM_PPR_DISCARD
267 BEGIN_FTR_SECTION
268 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
269 EXC_HV, SOFTEN_TEST_HV)
270 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
271 FTR_SECTION_ELSE
272 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
273 EXC_STD, SOFTEN_TEST_HV_201)
274 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
275 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
276
277 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
278 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
279
280 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
281 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
282
283 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
284 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
285
286 . = 0x900
287 .globl decrementer_pSeries
288 decrementer_pSeries:
289 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
290
291 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
292
293 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
294 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
295
296 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
297 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
298
299 . = 0xc00
300 .globl system_call_pSeries
301 system_call_pSeries:
302 /*
303 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
304 * that support it) before changing to HMT_MEDIUM. That allows the KVM
305 * code to save that value into the guest state (it is the guest's PPR
306 * value). Otherwise just change to HMT_MEDIUM as userspace has
307 * already saved the PPR.
308 */
309 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
310 SET_SCRATCH0(r13)
311 GET_PACA(r13)
312 std r9,PACA_EXGEN+EX_R9(r13)
313 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);
314 HMT_MEDIUM;
315 std r10,PACA_EXGEN+EX_R10(r13)
316 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR);
317 mfcr r9
318 KVMTEST(0xc00)
319 GET_SCRATCH0(r13)
320 #else
321 HMT_MEDIUM;
322 #endif
323 SYSCALL_PSERIES_1
324 SYSCALL_PSERIES_2_RFID
325 SYSCALL_PSERIES_3
326 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
327
328 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
329 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
330
331 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
332 * out of line to handle them
333 */
334 . = 0xe00
335 hv_data_storage_trampoline:
336 SET_SCRATCH0(r13)
337 EXCEPTION_PROLOG_0(PACA_EXGEN)
338 b h_data_storage_hv
339
340 . = 0xe20
341 hv_instr_storage_trampoline:
342 SET_SCRATCH0(r13)
343 EXCEPTION_PROLOG_0(PACA_EXGEN)
344 b h_instr_storage_hv
345
346 . = 0xe40
347 emulation_assist_trampoline:
348 SET_SCRATCH0(r13)
349 EXCEPTION_PROLOG_0(PACA_EXGEN)
350 b emulation_assist_hv
351
352 . = 0xe60
353 hv_exception_trampoline:
354 SET_SCRATCH0(r13)
355 EXCEPTION_PROLOG_0(PACA_EXGEN)
356 b hmi_exception_early
357
358 . = 0xe80
359 hv_doorbell_trampoline:
360 SET_SCRATCH0(r13)
361 EXCEPTION_PROLOG_0(PACA_EXGEN)
362 b h_doorbell_hv
363
364 /* We need to deal with the Altivec unavailable exception
365 * here which is at 0xf20, thus in the middle of the
366 * prolog code of the PerformanceMonitor one. A little
367 * trickery is thus necessary
368 */
369 . = 0xf00
370 performance_monitor_pseries_trampoline:
371 SET_SCRATCH0(r13)
372 EXCEPTION_PROLOG_0(PACA_EXGEN)
373 b performance_monitor_pSeries
374
375 . = 0xf20
376 altivec_unavailable_pseries_trampoline:
377 SET_SCRATCH0(r13)
378 EXCEPTION_PROLOG_0(PACA_EXGEN)
379 b altivec_unavailable_pSeries
380
381 . = 0xf40
382 vsx_unavailable_pseries_trampoline:
383 SET_SCRATCH0(r13)
384 EXCEPTION_PROLOG_0(PACA_EXGEN)
385 b vsx_unavailable_pSeries
386
387 . = 0xf60
388 facility_unavailable_trampoline:
389 SET_SCRATCH0(r13)
390 EXCEPTION_PROLOG_0(PACA_EXGEN)
391 b facility_unavailable_pSeries
392
393 . = 0xf80
394 hv_facility_unavailable_trampoline:
395 SET_SCRATCH0(r13)
396 EXCEPTION_PROLOG_0(PACA_EXGEN)
397 b facility_unavailable_hv
398
399 #ifdef CONFIG_CBE_RAS
400 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
401 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
402 #endif /* CONFIG_CBE_RAS */
403
404 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
405 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
406
407 . = 0x1500
408 .global denorm_exception_hv
409 denorm_exception_hv:
410 HMT_MEDIUM_PPR_DISCARD
411 mtspr SPRN_SPRG_HSCRATCH0,r13
412 EXCEPTION_PROLOG_0(PACA_EXGEN)
413 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
414
415 #ifdef CONFIG_PPC_DENORMALISATION
416 mfspr r10,SPRN_HSRR1
417 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
418 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
419 addi r11,r11,-4 /* HSRR0 is next instruction */
420 bne+ denorm_assist
421 #endif
422
423 KVMTEST(0x1500)
424 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
425 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
426
427 #ifdef CONFIG_CBE_RAS
428 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
429 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
430 #endif /* CONFIG_CBE_RAS */
431
432 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
433 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
434
435 #ifdef CONFIG_CBE_RAS
436 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
437 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
438 #else
439 . = 0x1800
440 #endif /* CONFIG_CBE_RAS */
441
442
443 /*** Out of line interrupts support ***/
444
445 .align 7
446 /* moved from 0x200 */
447 machine_check_pSeries_early:
448 BEGIN_FTR_SECTION
449 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
450 /*
451 * Register contents:
452 * R13 = PACA
453 * R9 = CR
454 * Original R9 to R13 is saved on PACA_EXMC
455 *
456 * Switch to mc_emergency stack and handle re-entrancy (we limit
457 * the nested MCE upto level 4 to avoid stack overflow).
458 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
459 *
460 * We use paca->in_mce to check whether this is the first entry or
461 * nested machine check. We increment paca->in_mce to track nested
462 * machine checks.
463 *
464 * If this is the first entry then set stack pointer to
465 * paca->mc_emergency_sp, otherwise r1 is already pointing to
466 * stack frame on mc_emergency stack.
467 *
468 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
469 * checkstop if we get another machine check exception before we do
470 * rfid with MSR_ME=1.
471 */
472 mr r11,r1 /* Save r1 */
473 lhz r10,PACA_IN_MCE(r13)
474 cmpwi r10,0 /* Are we in nested machine check */
475 bne 0f /* Yes, we are. */
476 /* First machine check entry */
477 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
478 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
479 addi r10,r10,1 /* increment paca->in_mce */
480 sth r10,PACA_IN_MCE(r13)
481 /* Limit nested MCE to level 4 to avoid stack overflow */
482 cmpwi r10,4
483 bgt 2f /* Check if we hit limit of 4 */
484 std r11,GPR1(r1) /* Save r1 on the stack. */
485 std r11,0(r1) /* make stack chain pointer */
486 mfspr r11,SPRN_SRR0 /* Save SRR0 */
487 std r11,_NIP(r1)
488 mfspr r11,SPRN_SRR1 /* Save SRR1 */
489 std r11,_MSR(r1)
490 mfspr r11,SPRN_DAR /* Save DAR */
491 std r11,_DAR(r1)
492 mfspr r11,SPRN_DSISR /* Save DSISR */
493 std r11,_DSISR(r1)
494 std r9,_CCR(r1) /* Save CR in stackframe */
495 /* Save r9 through r13 from EXMC save area to stack frame. */
496 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
497 mfmsr r11 /* get MSR value */
498 ori r11,r11,MSR_ME /* turn on ME bit */
499 ori r11,r11,MSR_RI /* turn on RI bit */
500 ld r12,PACAKBASE(r13) /* get high part of &label */
501 LOAD_HANDLER(r12, machine_check_handle_early)
502 1: mtspr SPRN_SRR0,r12
503 mtspr SPRN_SRR1,r11
504 rfid
505 b . /* prevent speculative execution */
506 2:
507 /* Stack overflow. Stay on emergency stack and panic.
508 * Keep the ME bit off while panic-ing, so that if we hit
509 * another machine check we checkstop.
510 */
511 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
512 ld r11,PACAKMSR(r13)
513 ld r12,PACAKBASE(r13)
514 LOAD_HANDLER(r12, unrecover_mce)
515 li r10,MSR_ME
516 andc r11,r11,r10 /* Turn off MSR_ME */
517 b 1b
518 b . /* prevent speculative execution */
519 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
520
521 machine_check_pSeries:
522 .globl machine_check_fwnmi
523 machine_check_fwnmi:
524 HMT_MEDIUM_PPR_DISCARD
525 SET_SCRATCH0(r13) /* save r13 */
526 EXCEPTION_PROLOG_0(PACA_EXMC)
527 machine_check_pSeries_0:
528 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
529 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
530 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
531 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
532 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
533 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
534 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
535 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
536 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
537
538 #ifdef CONFIG_PPC_DENORMALISATION
539 denorm_assist:
540 BEGIN_FTR_SECTION
541 /*
542 * To denormalise we need to move a copy of the register to itself.
543 * For POWER6 do that here for all FP regs.
544 */
545 mfmsr r10
546 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
547 xori r10,r10,(MSR_FE0|MSR_FE1)
548 mtmsrd r10
549 sync
550
551 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
552 #define FMR4(n) FMR2(n) ; FMR2(n+2)
553 #define FMR8(n) FMR4(n) ; FMR4(n+4)
554 #define FMR16(n) FMR8(n) ; FMR8(n+8)
555 #define FMR32(n) FMR16(n) ; FMR16(n+16)
556 FMR32(0)
557
558 FTR_SECTION_ELSE
559 /*
560 * To denormalise we need to move a copy of the register to itself.
561 * For POWER7 do that here for the first 32 VSX registers only.
562 */
563 mfmsr r10
564 oris r10,r10,MSR_VSX@h
565 mtmsrd r10
566 sync
567
568 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
569 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
570 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
571 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
572 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
573 XVCPSGNDP32(0)
574
575 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
576
577 BEGIN_FTR_SECTION
578 b denorm_done
579 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
580 /*
581 * To denormalise we need to move a copy of the register to itself.
582 * For POWER8 we need to do that for all 64 VSX registers
583 */
584 XVCPSGNDP32(32)
585 denorm_done:
586 mtspr SPRN_HSRR0,r11
587 mtcrf 0x80,r9
588 ld r9,PACA_EXGEN+EX_R9(r13)
589 RESTORE_PPR_PACA(PACA_EXGEN, r10)
590 BEGIN_FTR_SECTION
591 ld r10,PACA_EXGEN+EX_CFAR(r13)
592 mtspr SPRN_CFAR,r10
593 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
594 ld r10,PACA_EXGEN+EX_R10(r13)
595 ld r11,PACA_EXGEN+EX_R11(r13)
596 ld r12,PACA_EXGEN+EX_R12(r13)
597 ld r13,PACA_EXGEN+EX_R13(r13)
598 HRFID
599 b .
600 #endif
601
602 .align 7
603 /* moved from 0xe00 */
604 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
605 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
606 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
607 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
608 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
609 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
610 MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception)
611 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
612
613 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
614 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
615
616 /* moved from 0xf00 */
617 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
618 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
619 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
620 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
621 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
622 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
623 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
624 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60)
625 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
626 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
627
628 /*
629 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
630 * - If it was a decrementer interrupt, we bump the dec to max and and return.
631 * - If it was a doorbell we return immediately since doorbells are edge
632 * triggered and won't automatically refire.
633 * - If it was a HMI we return immediately since we handled it in realmode
634 * and it won't refire.
635 * - else we hard disable and return.
636 * This is called with r10 containing the value to OR to the paca field.
637 */
638 #define MASKED_INTERRUPT(_H) \
639 masked_##_H##interrupt: \
640 std r11,PACA_EXGEN+EX_R11(r13); \
641 lbz r11,PACAIRQHAPPENED(r13); \
642 or r11,r11,r10; \
643 stb r11,PACAIRQHAPPENED(r13); \
644 cmpwi r10,PACA_IRQ_DEC; \
645 bne 1f; \
646 lis r10,0x7fff; \
647 ori r10,r10,0xffff; \
648 mtspr SPRN_DEC,r10; \
649 b 2f; \
650 1: cmpwi r10,PACA_IRQ_DBELL; \
651 beq 2f; \
652 cmpwi r10,PACA_IRQ_HMI; \
653 beq 2f; \
654 mfspr r10,SPRN_##_H##SRR1; \
655 rldicl r10,r10,48,1; /* clear MSR_EE */ \
656 rotldi r10,r10,16; \
657 mtspr SPRN_##_H##SRR1,r10; \
658 2: mtcrf 0x80,r9; \
659 ld r9,PACA_EXGEN+EX_R9(r13); \
660 ld r10,PACA_EXGEN+EX_R10(r13); \
661 ld r11,PACA_EXGEN+EX_R11(r13); \
662 GET_SCRATCH0(r13); \
663 ##_H##rfid; \
664 b .
665
666 MASKED_INTERRUPT()
667 MASKED_INTERRUPT(H)
668
669 /*
670 * Called from arch_local_irq_enable when an interrupt needs
671 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
672 * which kind of interrupt. MSR:EE is already off. We generate a
673 * stackframe like if a real interrupt had happened.
674 *
675 * Note: While MSR:EE is off, we need to make sure that _MSR
676 * in the generated frame has EE set to 1 or the exception
677 * handler will not properly re-enable them.
678 */
679 _GLOBAL(__replay_interrupt)
680 /* We are going to jump to the exception common code which
681 * will retrieve various register values from the PACA which
682 * we don't give a damn about, so we don't bother storing them.
683 */
684 mfmsr r12
685 mflr r11
686 mfcr r9
687 ori r12,r12,MSR_EE
688 cmpwi r3,0x900
689 beq decrementer_common
690 cmpwi r3,0x500
691 beq hardware_interrupt_common
692 BEGIN_FTR_SECTION
693 cmpwi r3,0xe80
694 beq h_doorbell_common
695 FTR_SECTION_ELSE
696 cmpwi r3,0xa00
697 beq doorbell_super_common
698 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
699 blr
700
701 #ifdef CONFIG_PPC_PSERIES
702 /*
703 * Vectors for the FWNMI option. Share common code.
704 */
705 .globl system_reset_fwnmi
706 .align 7
707 system_reset_fwnmi:
708 HMT_MEDIUM_PPR_DISCARD
709 SET_SCRATCH0(r13) /* save r13 */
710 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
711 NOTEST, 0x100)
712
713 #endif /* CONFIG_PPC_PSERIES */
714
715 #ifdef __DISABLED__
716 /*
717 * This is used for when the SLB miss handler has to go virtual,
718 * which doesn't happen for now anymore but will once we re-implement
719 * dynamic VSIDs for shared page tables
720 */
721 slb_miss_user_pseries:
722 std r10,PACA_EXGEN+EX_R10(r13)
723 std r11,PACA_EXGEN+EX_R11(r13)
724 std r12,PACA_EXGEN+EX_R12(r13)
725 GET_SCRATCH0(r10)
726 ld r11,PACA_EXSLB+EX_R9(r13)
727 ld r12,PACA_EXSLB+EX_R3(r13)
728 std r10,PACA_EXGEN+EX_R13(r13)
729 std r11,PACA_EXGEN+EX_R9(r13)
730 std r12,PACA_EXGEN+EX_R3(r13)
731 clrrdi r12,r13,32
732 mfmsr r10
733 mfspr r11,SRR0 /* save SRR0 */
734 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
735 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
736 mtspr SRR0,r12
737 mfspr r12,SRR1 /* and SRR1 */
738 mtspr SRR1,r10
739 rfid
740 b . /* prevent spec. execution */
741 #endif /* __DISABLED__ */
742
743 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
744 kvmppc_skip_interrupt:
745 /*
746 * Here all GPRs are unchanged from when the interrupt happened
747 * except for r13, which is saved in SPRG_SCRATCH0.
748 */
749 mfspr r13, SPRN_SRR0
750 addi r13, r13, 4
751 mtspr SPRN_SRR0, r13
752 GET_SCRATCH0(r13)
753 rfid
754 b .
755
756 kvmppc_skip_Hinterrupt:
757 /*
758 * Here all GPRs are unchanged from when the interrupt happened
759 * except for r13, which is saved in SPRG_SCRATCH0.
760 */
761 mfspr r13, SPRN_HSRR0
762 addi r13, r13, 4
763 mtspr SPRN_HSRR0, r13
764 GET_SCRATCH0(r13)
765 hrfid
766 b .
767 #endif
768
769 /*
770 * Code from here down to __end_handlers is invoked from the
771 * exception prologs above. Because the prologs assemble the
772 * addresses of these handlers using the LOAD_HANDLER macro,
773 * which uses an ori instruction, these handlers must be in
774 * the first 64k of the kernel image.
775 */
776
777 /*** Common interrupt handlers ***/
778
779 STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception)
780
781 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
782 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt)
783 STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt)
784 #ifdef CONFIG_PPC_DOORBELL
785 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception)
786 #else
787 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception)
788 #endif
789 STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception)
790 STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception)
791 STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception)
792 STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt)
793 STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception)
794 #ifdef CONFIG_PPC_DOORBELL
795 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception)
796 #else
797 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception)
798 #endif
799 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception)
800 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception)
801 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception)
802 #ifdef CONFIG_ALTIVEC
803 STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception)
804 #else
805 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception)
806 #endif
807 #ifdef CONFIG_CBE_RAS
808 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception)
809 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception)
810 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception)
811 #endif /* CONFIG_CBE_RAS */
812
813 /*
814 * Relocation-on interrupts: A subset of the interrupts can be delivered
815 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
816 * it. Addresses are the same as the original interrupt addresses, but
817 * offset by 0xc000000000004000.
818 * It's impossible to receive interrupts below 0x300 via this mechanism.
819 * KVM: None of these traps are from the guest ; anything that escalated
820 * to HV=1 from HV=0 is delivered via real mode handlers.
821 */
822
823 /*
824 * This uses the standard macro, since the original 0x300 vector
825 * only has extra guff for STAB-based processors -- which never
826 * come here.
827 */
828 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
829 . = 0x4380
830 .globl data_access_slb_relon_pSeries
831 data_access_slb_relon_pSeries:
832 SET_SCRATCH0(r13)
833 EXCEPTION_PROLOG_0(PACA_EXSLB)
834 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
835 std r3,PACA_EXSLB+EX_R3(r13)
836 mfspr r3,SPRN_DAR
837 mfspr r12,SPRN_SRR1
838 #ifndef CONFIG_RELOCATABLE
839 b slb_miss_realmode
840 #else
841 /*
842 * We can't just use a direct branch to slb_miss_realmode
843 * because the distance from here to there depends on where
844 * the kernel ends up being put.
845 */
846 mfctr r11
847 ld r10,PACAKBASE(r13)
848 LOAD_HANDLER(r10, slb_miss_realmode)
849 mtctr r10
850 bctr
851 #endif
852
853 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
854 . = 0x4480
855 .globl instruction_access_slb_relon_pSeries
856 instruction_access_slb_relon_pSeries:
857 SET_SCRATCH0(r13)
858 EXCEPTION_PROLOG_0(PACA_EXSLB)
859 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
860 std r3,PACA_EXSLB+EX_R3(r13)
861 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
862 mfspr r12,SPRN_SRR1
863 #ifndef CONFIG_RELOCATABLE
864 b slb_miss_realmode
865 #else
866 mfctr r11
867 ld r10,PACAKBASE(r13)
868 LOAD_HANDLER(r10, slb_miss_realmode)
869 mtctr r10
870 bctr
871 #endif
872
873 . = 0x4500
874 .globl hardware_interrupt_relon_pSeries;
875 .globl hardware_interrupt_relon_hv;
876 hardware_interrupt_relon_pSeries:
877 hardware_interrupt_relon_hv:
878 BEGIN_FTR_SECTION
879 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
880 FTR_SECTION_ELSE
881 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
882 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
883 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
884 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
885 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
886 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
887 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
888 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
889 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
890
891 . = 0x4c00
892 .globl system_call_relon_pSeries
893 system_call_relon_pSeries:
894 HMT_MEDIUM
895 SYSCALL_PSERIES_1
896 SYSCALL_PSERIES_2_DIRECT
897 SYSCALL_PSERIES_3
898
899 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
900
901 . = 0x4e00
902 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
903
904 . = 0x4e20
905 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
906
907 . = 0x4e40
908 emulation_assist_relon_trampoline:
909 SET_SCRATCH0(r13)
910 EXCEPTION_PROLOG_0(PACA_EXGEN)
911 b emulation_assist_relon_hv
912
913 . = 0x4e60
914 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
915
916 . = 0x4e80
917 h_doorbell_relon_trampoline:
918 SET_SCRATCH0(r13)
919 EXCEPTION_PROLOG_0(PACA_EXGEN)
920 b h_doorbell_relon_hv
921
922 . = 0x4f00
923 performance_monitor_relon_pseries_trampoline:
924 SET_SCRATCH0(r13)
925 EXCEPTION_PROLOG_0(PACA_EXGEN)
926 b performance_monitor_relon_pSeries
927
928 . = 0x4f20
929 altivec_unavailable_relon_pseries_trampoline:
930 SET_SCRATCH0(r13)
931 EXCEPTION_PROLOG_0(PACA_EXGEN)
932 b altivec_unavailable_relon_pSeries
933
934 . = 0x4f40
935 vsx_unavailable_relon_pseries_trampoline:
936 SET_SCRATCH0(r13)
937 EXCEPTION_PROLOG_0(PACA_EXGEN)
938 b vsx_unavailable_relon_pSeries
939
940 . = 0x4f60
941 facility_unavailable_relon_trampoline:
942 SET_SCRATCH0(r13)
943 EXCEPTION_PROLOG_0(PACA_EXGEN)
944 b facility_unavailable_relon_pSeries
945
946 . = 0x4f80
947 hv_facility_unavailable_relon_trampoline:
948 SET_SCRATCH0(r13)
949 EXCEPTION_PROLOG_0(PACA_EXGEN)
950 b hv_facility_unavailable_relon_hv
951
952 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
953 #ifdef CONFIG_PPC_DENORMALISATION
954 . = 0x5500
955 b denorm_exception_hv
956 #endif
957 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
958
959 /* Other future vectors */
960 .align 7
961 .globl __end_interrupts
962 __end_interrupts:
963
964 .align 7
965 system_call_entry_direct:
966 #if defined(CONFIG_RELOCATABLE)
967 /* The first level prologue may have used LR to get here, saving
968 * orig in r10. To save hacking/ifdeffing common code, restore here.
969 */
970 mtlr r10
971 #endif
972 system_call_entry:
973 b system_call_common
974
975 ppc64_runlatch_on_trampoline:
976 b __ppc64_runlatch_on
977
978 /*
979 * Here r13 points to the paca, r9 contains the saved CR,
980 * SRR0 and SRR1 are saved in r11 and r12,
981 * r9 - r13 are saved in paca->exgen.
982 */
983 .align 7
984 .globl data_access_common
985 data_access_common:
986 mfspr r10,SPRN_DAR
987 std r10,PACA_EXGEN+EX_DAR(r13)
988 mfspr r10,SPRN_DSISR
989 stw r10,PACA_EXGEN+EX_DSISR(r13)
990 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
991 RECONCILE_IRQ_STATE(r10, r11)
992 ld r12,_MSR(r1)
993 ld r3,PACA_EXGEN+EX_DAR(r13)
994 lwz r4,PACA_EXGEN+EX_DSISR(r13)
995 li r5,0x300
996 b do_hash_page /* Try to handle as hpte fault */
997
998 .align 7
999 .globl h_data_storage_common
1000 h_data_storage_common:
1001 mfspr r10,SPRN_HDAR
1002 std r10,PACA_EXGEN+EX_DAR(r13)
1003 mfspr r10,SPRN_HDSISR
1004 stw r10,PACA_EXGEN+EX_DSISR(r13)
1005 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
1006 bl save_nvgprs
1007 RECONCILE_IRQ_STATE(r10, r11)
1008 addi r3,r1,STACK_FRAME_OVERHEAD
1009 bl unknown_exception
1010 b ret_from_except
1011
1012 .align 7
1013 .globl instruction_access_common
1014 instruction_access_common:
1015 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
1016 RECONCILE_IRQ_STATE(r10, r11)
1017 ld r12,_MSR(r1)
1018 ld r3,_NIP(r1)
1019 andis. r4,r12,0x5820
1020 li r5,0x400
1021 b do_hash_page /* Try to handle as hpte fault */
1022
1023 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception)
1024
1025 /*
1026 * Here is the common SLB miss user that is used when going to virtual
1027 * mode for SLB misses, that is currently not used
1028 */
1029 #ifdef __DISABLED__
1030 .align 7
1031 .globl slb_miss_user_common
1032 slb_miss_user_common:
1033 mflr r10
1034 std r3,PACA_EXGEN+EX_DAR(r13)
1035 stw r9,PACA_EXGEN+EX_CCR(r13)
1036 std r10,PACA_EXGEN+EX_LR(r13)
1037 std r11,PACA_EXGEN+EX_SRR0(r13)
1038 bl slb_allocate_user
1039
1040 ld r10,PACA_EXGEN+EX_LR(r13)
1041 ld r3,PACA_EXGEN+EX_R3(r13)
1042 lwz r9,PACA_EXGEN+EX_CCR(r13)
1043 ld r11,PACA_EXGEN+EX_SRR0(r13)
1044 mtlr r10
1045 beq- slb_miss_fault
1046
1047 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1048 beq- unrecov_user_slb
1049 mfmsr r10
1050
1051 .machine push
1052 .machine "power4"
1053 mtcrf 0x80,r9
1054 .machine pop
1055
1056 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
1057 mtmsrd r10,1
1058
1059 mtspr SRR0,r11
1060 mtspr SRR1,r12
1061
1062 ld r9,PACA_EXGEN+EX_R9(r13)
1063 ld r10,PACA_EXGEN+EX_R10(r13)
1064 ld r11,PACA_EXGEN+EX_R11(r13)
1065 ld r12,PACA_EXGEN+EX_R12(r13)
1066 ld r13,PACA_EXGEN+EX_R13(r13)
1067 rfid
1068 b .
1069
1070 slb_miss_fault:
1071 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
1072 ld r4,PACA_EXGEN+EX_DAR(r13)
1073 li r5,0
1074 std r4,_DAR(r1)
1075 std r5,_DSISR(r1)
1076 b handle_page_fault
1077
1078 unrecov_user_slb:
1079 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
1080 RECONCILE_IRQ_STATE(r10, r11)
1081 bl save_nvgprs
1082 1: addi r3,r1,STACK_FRAME_OVERHEAD
1083 bl unrecoverable_exception
1084 b 1b
1085
1086 #endif /* __DISABLED__ */
1087
1088
1089 /*
1090 * Machine check is different because we use a different
1091 * save area: PACA_EXMC instead of PACA_EXGEN.
1092 */
1093 .align 7
1094 .globl machine_check_common
1095 machine_check_common:
1096
1097 mfspr r10,SPRN_DAR
1098 std r10,PACA_EXGEN+EX_DAR(r13)
1099 mfspr r10,SPRN_DSISR
1100 stw r10,PACA_EXGEN+EX_DSISR(r13)
1101 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
1102 FINISH_NAP
1103 RECONCILE_IRQ_STATE(r10, r11)
1104 ld r3,PACA_EXGEN+EX_DAR(r13)
1105 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1106 std r3,_DAR(r1)
1107 std r4,_DSISR(r1)
1108 bl save_nvgprs
1109 addi r3,r1,STACK_FRAME_OVERHEAD
1110 bl machine_check_exception
1111 b ret_from_except
1112
1113 .align 7
1114 .globl alignment_common
1115 alignment_common:
1116 mfspr r10,SPRN_DAR
1117 std r10,PACA_EXGEN+EX_DAR(r13)
1118 mfspr r10,SPRN_DSISR
1119 stw r10,PACA_EXGEN+EX_DSISR(r13)
1120 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1121 ld r3,PACA_EXGEN+EX_DAR(r13)
1122 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1123 std r3,_DAR(r1)
1124 std r4,_DSISR(r1)
1125 bl save_nvgprs
1126 RECONCILE_IRQ_STATE(r10, r11)
1127 addi r3,r1,STACK_FRAME_OVERHEAD
1128 bl alignment_exception
1129 b ret_from_except
1130
1131 .align 7
1132 .globl program_check_common
1133 program_check_common:
1134 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1135 bl save_nvgprs
1136 RECONCILE_IRQ_STATE(r10, r11)
1137 addi r3,r1,STACK_FRAME_OVERHEAD
1138 bl program_check_exception
1139 b ret_from_except
1140
1141 .align 7
1142 .globl fp_unavailable_common
1143 fp_unavailable_common:
1144 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1145 bne 1f /* if from user, just load it up */
1146 bl save_nvgprs
1147 RECONCILE_IRQ_STATE(r10, r11)
1148 addi r3,r1,STACK_FRAME_OVERHEAD
1149 bl kernel_fp_unavailable_exception
1150 BUG_OPCODE
1151 1:
1152 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1153 BEGIN_FTR_SECTION
1154 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1155 * transaction), go do TM stuff
1156 */
1157 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1158 bne- 2f
1159 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1160 #endif
1161 bl load_up_fpu
1162 b fast_exception_return
1163 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1164 2: /* User process was in a transaction */
1165 bl save_nvgprs
1166 RECONCILE_IRQ_STATE(r10, r11)
1167 addi r3,r1,STACK_FRAME_OVERHEAD
1168 bl fp_unavailable_tm
1169 b ret_from_except
1170 #endif
1171 .align 7
1172 .globl altivec_unavailable_common
1173 altivec_unavailable_common:
1174 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1175 #ifdef CONFIG_ALTIVEC
1176 BEGIN_FTR_SECTION
1177 beq 1f
1178 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1179 BEGIN_FTR_SECTION_NESTED(69)
1180 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1181 * transaction), go do TM stuff
1182 */
1183 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1184 bne- 2f
1185 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1186 #endif
1187 bl load_up_altivec
1188 b fast_exception_return
1189 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1190 2: /* User process was in a transaction */
1191 bl save_nvgprs
1192 RECONCILE_IRQ_STATE(r10, r11)
1193 addi r3,r1,STACK_FRAME_OVERHEAD
1194 bl altivec_unavailable_tm
1195 b ret_from_except
1196 #endif
1197 1:
1198 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1199 #endif
1200 bl save_nvgprs
1201 RECONCILE_IRQ_STATE(r10, r11)
1202 addi r3,r1,STACK_FRAME_OVERHEAD
1203 bl altivec_unavailable_exception
1204 b ret_from_except
1205
1206 .align 7
1207 .globl vsx_unavailable_common
1208 vsx_unavailable_common:
1209 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1210 #ifdef CONFIG_VSX
1211 BEGIN_FTR_SECTION
1212 beq 1f
1213 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1214 BEGIN_FTR_SECTION_NESTED(69)
1215 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1216 * transaction), go do TM stuff
1217 */
1218 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1219 bne- 2f
1220 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1221 #endif
1222 b load_up_vsx
1223 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1224 2: /* User process was in a transaction */
1225 bl save_nvgprs
1226 RECONCILE_IRQ_STATE(r10, r11)
1227 addi r3,r1,STACK_FRAME_OVERHEAD
1228 bl vsx_unavailable_tm
1229 b ret_from_except
1230 #endif
1231 1:
1232 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1233 #endif
1234 bl save_nvgprs
1235 RECONCILE_IRQ_STATE(r10, r11)
1236 addi r3,r1,STACK_FRAME_OVERHEAD
1237 bl vsx_unavailable_exception
1238 b ret_from_except
1239
1240 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception)
1241 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception)
1242
1243 .align 7
1244 .globl __end_handlers
1245 __end_handlers:
1246
1247 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1248 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1249 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1250
1251 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1252 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1253 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1254 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1255 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
1256
1257 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1258 /*
1259 * Data area reserved for FWNMI option.
1260 * This address (0x7000) is fixed by the RPA.
1261 */
1262 .= 0x7000
1263 .globl fwnmi_data_area
1264 fwnmi_data_area:
1265
1266 /* pseries and powernv need to keep the whole page from
1267 * 0x7000 to 0x8000 free for use by the firmware
1268 */
1269 . = 0x8000
1270 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1271
1272 .globl hmi_exception_early
1273 hmi_exception_early:
1274 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60)
1275 mr r10,r1 /* Save r1 */
1276 ld r1,PACAEMERGSP(r13) /* Use emergency stack */
1277 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
1278 std r9,_CCR(r1) /* save CR in stackframe */
1279 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
1280 std r11,_NIP(r1) /* save HSRR0 in stackframe */
1281 mfspr r12,SPRN_HSRR1 /* Save SRR1 */
1282 std r12,_MSR(r1) /* save SRR1 in stackframe */
1283 std r10,0(r1) /* make stack chain pointer */
1284 std r0,GPR0(r1) /* save r0 in stackframe */
1285 std r10,GPR1(r1) /* save r1 in stackframe */
1286 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
1287 EXCEPTION_PROLOG_COMMON_3(0xe60)
1288 addi r3,r1,STACK_FRAME_OVERHEAD
1289 bl hmi_exception_realmode
1290 /* Windup the stack. */
1291 /* Move original HSRR0 and HSRR1 into the respective regs */
1292 ld r9,_MSR(r1)
1293 mtspr SPRN_HSRR1,r9
1294 ld r3,_NIP(r1)
1295 mtspr SPRN_HSRR0,r3
1296 ld r9,_CTR(r1)
1297 mtctr r9
1298 ld r9,_XER(r1)
1299 mtxer r9
1300 ld r9,_LINK(r1)
1301 mtlr r9
1302 REST_GPR(0, r1)
1303 REST_8GPRS(2, r1)
1304 REST_GPR(10, r1)
1305 ld r11,_CCR(r1)
1306 mtcr r11
1307 REST_GPR(11, r1)
1308 REST_2GPRS(12, r1)
1309 /* restore original r1. */
1310 ld r1,GPR1(r1)
1311
1312 /*
1313 * Go to virtual mode and pull the HMI event information from
1314 * firmware.
1315 */
1316 .globl hmi_exception_after_realmode
1317 hmi_exception_after_realmode:
1318 SET_SCRATCH0(r13)
1319 EXCEPTION_PROLOG_0(PACA_EXGEN)
1320 b hmi_exception_hv
1321
1322
1323 #define MACHINE_CHECK_HANDLER_WINDUP \
1324 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1325 li r0,MSR_RI; \
1326 mfmsr r9; /* get MSR value */ \
1327 andc r9,r9,r0; \
1328 mtmsrd r9,1; /* Clear MSR_RI */ \
1329 /* Move original SRR0 and SRR1 into the respective regs */ \
1330 ld r9,_MSR(r1); \
1331 mtspr SPRN_SRR1,r9; \
1332 ld r3,_NIP(r1); \
1333 mtspr SPRN_SRR0,r3; \
1334 ld r9,_CTR(r1); \
1335 mtctr r9; \
1336 ld r9,_XER(r1); \
1337 mtxer r9; \
1338 ld r9,_LINK(r1); \
1339 mtlr r9; \
1340 REST_GPR(0, r1); \
1341 REST_8GPRS(2, r1); \
1342 REST_GPR(10, r1); \
1343 ld r11,_CCR(r1); \
1344 mtcr r11; \
1345 /* Decrement paca->in_mce. */ \
1346 lhz r12,PACA_IN_MCE(r13); \
1347 subi r12,r12,1; \
1348 sth r12,PACA_IN_MCE(r13); \
1349 REST_GPR(11, r1); \
1350 REST_2GPRS(12, r1); \
1351 /* restore original r1. */ \
1352 ld r1,GPR1(r1)
1353
1354 /*
1355 * Handle machine check early in real mode. We come here with
1356 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1357 */
1358 .align 7
1359 .globl machine_check_handle_early
1360 machine_check_handle_early:
1361 std r0,GPR0(r1) /* Save r0 */
1362 EXCEPTION_PROLOG_COMMON_3(0x200)
1363 bl save_nvgprs
1364 addi r3,r1,STACK_FRAME_OVERHEAD
1365 bl machine_check_early
1366 std r3,RESULT(r1) /* Save result */
1367 ld r12,_MSR(r1)
1368 #ifdef CONFIG_PPC_P7_NAP
1369 /*
1370 * Check if thread was in power saving mode. We come here when any
1371 * of the following is true:
1372 * a. thread wasn't in power saving mode
1373 * b. thread was in power saving mode with no state loss or
1374 * supervisor state loss
1375 *
1376 * Go back to nap again if (b) is true.
1377 */
1378 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
1379 beq 4f /* No, it wasn;t */
1380 /* Thread was in power saving mode. Go back to nap again. */
1381 cmpwi r11,2
1382 bne 3f
1383 /* Supervisor state loss */
1384 li r0,1
1385 stb r0,PACA_NAPSTATELOST(r13)
1386 3: bl machine_check_queue_event
1387 MACHINE_CHECK_HANDLER_WINDUP
1388 GET_PACA(r13)
1389 ld r1,PACAR1(r13)
1390 li r3,PNV_THREAD_NAP
1391 b power7_enter_nap_mode
1392 4:
1393 #endif
1394 /*
1395 * Check if we are coming from hypervisor userspace. If yes then we
1396 * continue in host kernel in V mode to deliver the MC event.
1397 */
1398 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1399 beq 5f
1400 andi. r11,r12,MSR_PR /* See if coming from user. */
1401 bne 9f /* continue in V mode if we are. */
1402
1403 5:
1404 #ifdef CONFIG_KVM_BOOK3S_64_HV
1405 /*
1406 * We are coming from kernel context. Check if we are coming from
1407 * guest. if yes, then we can continue. We will fall through
1408 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1409 */
1410 lbz r11,HSTATE_IN_GUEST(r13)
1411 cmpwi r11,0 /* Check if coming from guest */
1412 bne 9f /* continue if we are. */
1413 #endif
1414 /*
1415 * At this point we are not sure about what context we come from.
1416 * Queue up the MCE event and return from the interrupt.
1417 * But before that, check if this is an un-recoverable exception.
1418 * If yes, then stay on emergency stack and panic.
1419 */
1420 andi. r11,r12,MSR_RI
1421 bne 2f
1422 1: mfspr r11,SPRN_SRR0
1423 ld r10,PACAKBASE(r13)
1424 LOAD_HANDLER(r10,unrecover_mce)
1425 mtspr SPRN_SRR0,r10
1426 ld r10,PACAKMSR(r13)
1427 /*
1428 * We are going down. But there are chances that we might get hit by
1429 * another MCE during panic path and we may run into unstable state
1430 * with no way out. Hence, turn ME bit off while going down, so that
1431 * when another MCE is hit during panic path, system will checkstop
1432 * and hypervisor will get restarted cleanly by SP.
1433 */
1434 li r3,MSR_ME
1435 andc r10,r10,r3 /* Turn off MSR_ME */
1436 mtspr SPRN_SRR1,r10
1437 rfid
1438 b .
1439 2:
1440 /*
1441 * Check if we have successfully handled/recovered from error, if not
1442 * then stay on emergency stack and panic.
1443 */
1444 ld r3,RESULT(r1) /* Load result */
1445 cmpdi r3,0 /* see if we handled MCE successfully */
1446
1447 beq 1b /* if !handled then panic */
1448 /*
1449 * Return from MC interrupt.
1450 * Queue up the MCE event so that we can log it later, while
1451 * returning from kernel or opal call.
1452 */
1453 bl machine_check_queue_event
1454 MACHINE_CHECK_HANDLER_WINDUP
1455 rfid
1456 9:
1457 /* Deliver the machine check to host kernel in V mode. */
1458 MACHINE_CHECK_HANDLER_WINDUP
1459 b machine_check_pSeries
1460
1461 unrecover_mce:
1462 /* Invoke machine_check_exception to print MCE event and panic. */
1463 addi r3,r1,STACK_FRAME_OVERHEAD
1464 bl machine_check_exception
1465 /*
1466 * We will not reach here. Even if we did, there is no way out. Call
1467 * unrecoverable_exception and die.
1468 */
1469 1: addi r3,r1,STACK_FRAME_OVERHEAD
1470 bl unrecoverable_exception
1471 b 1b
1472 /*
1473 * r13 points to the PACA, r9 contains the saved CR,
1474 * r12 contain the saved SRR1, SRR0 is still ready for return
1475 * r3 has the faulting address
1476 * r9 - r13 are saved in paca->exslb.
1477 * r3 is saved in paca->slb_r3
1478 * We assume we aren't going to take any exceptions during this procedure.
1479 */
1480 slb_miss_realmode:
1481 mflr r10
1482 #ifdef CONFIG_RELOCATABLE
1483 mtctr r11
1484 #endif
1485
1486 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1487 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1488
1489 bl slb_allocate_realmode
1490
1491 /* All done -- return from exception. */
1492
1493 ld r10,PACA_EXSLB+EX_LR(r13)
1494 ld r3,PACA_EXSLB+EX_R3(r13)
1495 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1496
1497 mtlr r10
1498
1499 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1500 beq- 2f
1501
1502 .machine push
1503 .machine "power4"
1504 mtcrf 0x80,r9
1505 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1506 .machine pop
1507
1508 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1509 ld r9,PACA_EXSLB+EX_R9(r13)
1510 ld r10,PACA_EXSLB+EX_R10(r13)
1511 ld r11,PACA_EXSLB+EX_R11(r13)
1512 ld r12,PACA_EXSLB+EX_R12(r13)
1513 ld r13,PACA_EXSLB+EX_R13(r13)
1514 rfid
1515 b . /* prevent speculative execution */
1516
1517 2: mfspr r11,SPRN_SRR0
1518 ld r10,PACAKBASE(r13)
1519 LOAD_HANDLER(r10,unrecov_slb)
1520 mtspr SPRN_SRR0,r10
1521 ld r10,PACAKMSR(r13)
1522 mtspr SPRN_SRR1,r10
1523 rfid
1524 b .
1525
1526 unrecov_slb:
1527 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1528 RECONCILE_IRQ_STATE(r10, r11)
1529 bl save_nvgprs
1530 1: addi r3,r1,STACK_FRAME_OVERHEAD
1531 bl unrecoverable_exception
1532 b 1b
1533
1534
1535 #ifdef CONFIG_PPC_970_NAP
1536 power4_fixup_nap:
1537 andc r9,r9,r10
1538 std r9,TI_LOCAL_FLAGS(r11)
1539 ld r10,_LINK(r1) /* make idle task do the */
1540 std r10,_NIP(r1) /* equivalent of a blr */
1541 blr
1542 #endif
1543
1544 /*
1545 * Hash table stuff
1546 */
1547 .align 7
1548 do_hash_page:
1549 std r3,_DAR(r1)
1550 std r4,_DSISR(r1)
1551
1552 andis. r0,r4,0xa410 /* weird error? */
1553 bne- handle_page_fault /* if not, try to insert a HPTE */
1554 andis. r0,r4,DSISR_DABRMATCH@h
1555 bne- handle_dabr_fault
1556 CURRENT_THREAD_INFO(r11, r1)
1557 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1558 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1559 bne 77f /* then don't call hash_page now */
1560 /*
1561 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1562 * accessing a userspace segment (even from the kernel). We assume
1563 * kernel addresses always have the high bit set.
1564 */
1565 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1566 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1567 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1568 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1569 ori r4,r4,1 /* add _PAGE_PRESENT */
1570 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1571
1572 /*
1573 * r3 contains the faulting address
1574 * r4 contains the required access permissions
1575 * r5 contains the trap number
1576 * r6 contains dsisr
1577 *
1578 * at return r3 = 0 for success, 1 for page fault, negative for error
1579 */
1580 ld r6,_DSISR(r1)
1581 bl hash_page /* build HPTE if possible */
1582 cmpdi r3,0 /* see if hash_page succeeded */
1583
1584 /* Success */
1585 beq fast_exc_return_irq /* Return from exception on success */
1586
1587 /* Error */
1588 blt- 13f
1589
1590 /* Here we have a page fault that hash_page can't handle. */
1591 handle_page_fault:
1592 11: ld r4,_DAR(r1)
1593 ld r5,_DSISR(r1)
1594 addi r3,r1,STACK_FRAME_OVERHEAD
1595 bl do_page_fault
1596 cmpdi r3,0
1597 beq+ 12f
1598 bl save_nvgprs
1599 mr r5,r3
1600 addi r3,r1,STACK_FRAME_OVERHEAD
1601 lwz r4,_DAR(r1)
1602 bl bad_page_fault
1603 b ret_from_except
1604
1605 /* We have a data breakpoint exception - handle it */
1606 handle_dabr_fault:
1607 bl save_nvgprs
1608 ld r4,_DAR(r1)
1609 ld r5,_DSISR(r1)
1610 addi r3,r1,STACK_FRAME_OVERHEAD
1611 bl do_break
1612 12: b ret_from_except_lite
1613
1614
1615 /* We have a page fault that hash_page could handle but HV refused
1616 * the PTE insertion
1617 */
1618 13: bl save_nvgprs
1619 mr r5,r3
1620 addi r3,r1,STACK_FRAME_OVERHEAD
1621 ld r4,_DAR(r1)
1622 bl low_hash_fault
1623 b ret_from_except
1624
1625 /*
1626 * We come here as a result of a DSI at a point where we don't want
1627 * to call hash_page, such as when we are accessing memory (possibly
1628 * user memory) inside a PMU interrupt that occurred while interrupts
1629 * were soft-disabled. We want to invoke the exception handler for
1630 * the access, or panic if there isn't a handler.
1631 */
1632 77: bl save_nvgprs
1633 mr r4,r3
1634 addi r3,r1,STACK_FRAME_OVERHEAD
1635 li r5,SIGSEGV
1636 bl bad_page_fault
1637 b ret_from_except
1638
1639 /*
1640 * Here we have detected that the kernel stack pointer is bad.
1641 * R9 contains the saved CR, r13 points to the paca,
1642 * r10 contains the (bad) kernel stack pointer,
1643 * r11 and r12 contain the saved SRR0 and SRR1.
1644 * We switch to using an emergency stack, save the registers there,
1645 * and call kernel_bad_stack(), which panics.
1646 */
1647 bad_stack:
1648 ld r1,PACAEMERGSP(r13)
1649 subi r1,r1,64+INT_FRAME_SIZE
1650 std r9,_CCR(r1)
1651 std r10,GPR1(r1)
1652 std r11,_NIP(r1)
1653 std r12,_MSR(r1)
1654 mfspr r11,SPRN_DAR
1655 mfspr r12,SPRN_DSISR
1656 std r11,_DAR(r1)
1657 std r12,_DSISR(r1)
1658 mflr r10
1659 mfctr r11
1660 mfxer r12
1661 std r10,_LINK(r1)
1662 std r11,_CTR(r1)
1663 std r12,_XER(r1)
1664 SAVE_GPR(0,r1)
1665 SAVE_GPR(2,r1)
1666 ld r10,EX_R3(r3)
1667 std r10,GPR3(r1)
1668 SAVE_GPR(4,r1)
1669 SAVE_4GPRS(5,r1)
1670 ld r9,EX_R9(r3)
1671 ld r10,EX_R10(r3)
1672 SAVE_2GPRS(9,r1)
1673 ld r9,EX_R11(r3)
1674 ld r10,EX_R12(r3)
1675 ld r11,EX_R13(r3)
1676 std r9,GPR11(r1)
1677 std r10,GPR12(r1)
1678 std r11,GPR13(r1)
1679 BEGIN_FTR_SECTION
1680 ld r10,EX_CFAR(r3)
1681 std r10,ORIG_GPR3(r1)
1682 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1683 SAVE_8GPRS(14,r1)
1684 SAVE_10GPRS(22,r1)
1685 lhz r12,PACA_TRAP_SAVE(r13)
1686 std r12,_TRAP(r1)
1687 addi r11,r1,INT_FRAME_SIZE
1688 std r11,0(r1)
1689 li r12,0
1690 std r12,0(r11)
1691 ld r2,PACATOC(r13)
1692 ld r11,exception_marker@toc(r2)
1693 std r12,RESULT(r1)
1694 std r11,STACK_FRAME_OVERHEAD-16(r1)
1695 1: addi r3,r1,STACK_FRAME_OVERHEAD
1696 bl kernel_bad_stack
1697 b 1b