2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18 #include <asm/cpuidle.h>
19 #include <asm/head-64.h>
22 * There are a few constraints to be concerned with.
23 * - Real mode exceptions code/data must be located at their physical location.
24 * - Virtual mode exceptions must be mapped at their 0xc000... location.
25 * - Fixed location code must not call directly beyond the __end_interrupts
26 * area when built with CONFIG_RELOCATABLE. LOAD_HANDLER / bctr sequence
28 * - LOAD_HANDLER targets must be within first 64K of physical 0 /
30 * - Conditional branch targets must be within +/-32K of caller.
32 * "Virtual exceptions" run with relocation on (MSR_IR=1, MSR_DR=1), and
33 * therefore don't have to run in physically located code or rfid to
34 * virtual mode kernel code. However on relocatable kernels they do have
35 * to branch to KERNELBASE offset because the rest of the kernel (outside
36 * the exception vectors) may be located elsewhere.
38 * Virtual exceptions correspond with physical, except their entry points
39 * are offset by 0xc000000000000000 and also tend to get an added 0x4000
40 * offset applied. Virtual exceptions are enabled with the Alternate
41 * Interrupt Location (AIL) bit set in the LPCR. However this does not
42 * guarantee they will be delivered virtually. Some conditions (see the ISA)
43 * cause exceptions to be delivered in real mode.
45 * It's impossible to receive interrupts below 0x300 via AIL.
47 * KVM: None of the virtual exceptions are from the guest. Anything that
48 * escalated to HV=1 from HV=0 is delivered via real mode handlers.
51 * We layout physical memory as follows:
52 * 0x0000 - 0x00ff : Secondary processor spin code
53 * 0x0100 - 0x18ff : Real mode pSeries interrupt vectors
54 * 0x1900 - 0x3fff : Real mode trampolines
55 * 0x4000 - 0x58ff : Relon (IR=1,DR=1) mode pSeries interrupt vectors
56 * 0x5900 - 0x6fff : Relon mode trampolines
57 * 0x7000 - 0x7fff : FWNMI data area
58 * 0x8000 - .... : Common interrupt handlers, remaining early
59 * setup code, rest of kernel.
61 * We could reclaim 0x4000-0x42ff for real mode trampolines if the space
62 * is necessary. Until then it's more consistent to explicitly put VIRT_NONE
65 OPEN_FIXED_SECTION(real_vectors, 0x0100, 0x1900)
66 OPEN_FIXED_SECTION(real_trampolines, 0x1900, 0x4000)
67 OPEN_FIXED_SECTION(virt_vectors, 0x4000, 0x5900)
68 OPEN_FIXED_SECTION(virt_trampolines, 0x5900, 0x7000)
69 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
71 * Data area reserved for FWNMI option.
72 * This address (0x7000) is fixed by the RPA.
73 * pseries and powernv need to keep the whole page from
74 * 0x7000 to 0x8000 free for use by the firmware
76 ZERO_FIXED_SECTION(fwnmi_page, 0x7000, 0x8000)
77 OPEN_TEXT_SECTION(0x8000)
79 OPEN_TEXT_SECTION(0x7000)
82 USE_FIXED_SECTION(real_vectors)
85 * This is the start of the interrupt handlers for pSeries
86 * This code runs with relocation off.
87 * Code from here to __end_interrupts gets copied down to real
88 * address 0x100 when we are running a relocatable kernel.
89 * Therefore any relative branches in this section must only
90 * branch to labels in this section.
92 .globl __start_interrupts
95 /* No virt vectors corresponding with 0x0..0x100 */
96 EXC_VIRT_NONE(0x4000, 0x4100)
99 #ifdef CONFIG_PPC_P7_NAP
101 * If running native on arch 2.06 or later, check if we are waking up
102 * from nap/sleep/winkle, and branch to idle handler.
104 #define IDLETEST(n) \
105 BEGIN_FTR_SECTION ; \
106 mfspr r10,SPRN_SRR1 ; \
107 rlwinm. r10,r10,47-31,30,31 ; \
110 BRANCH_TO_COMMON(r10, system_reset_idle_common) ; \
112 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
114 #define IDLETEST NOTEST
117 EXC_REAL_BEGIN(system_reset, 0x100, 0x200)
120 clrrdi r13,r13,1 /* Last bit of HSPRG0 is set if waking from winkle */
121 EXCEPTION_PROLOG_PSERIES_PACA(PACA_EXGEN, system_reset_common, EXC_STD,
124 EXC_REAL_END(system_reset, 0x100, 0x200)
125 EXC_VIRT_NONE(0x4100, 0x4200)
127 #ifdef CONFIG_PPC_P7_NAP
128 EXC_COMMON_BEGIN(system_reset_idle_common)
130 GET_PACA(r13) /* Restore HSPRG0 to get the winkle bit in r13 */
131 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
132 bl pnv_restore_hyp_resource
134 li r0,PNV_THREAD_RUNNING
135 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */
137 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
138 li r0,KVM_HWTHREAD_IN_KERNEL
139 stb r0,HSTATE_HWTHREAD_STATE(r13)
140 /* Order setting hwthread_state vs. testing hwthread_req */
142 lbz r0,HSTATE_HWTHREAD_REQ(r13)
149 /* Return SRR1 from power7_nap() */
153 2: b pnv_wakeup_noloss
156 EXC_COMMON(system_reset_common, 0x100, system_reset_exception)
158 #ifdef CONFIG_PPC_PSERIES
160 * Vectors for the FWNMI option. Share common code.
162 TRAMP_REAL_BEGIN(system_reset_fwnmi)
163 SET_SCRATCH0(r13) /* save r13 */
164 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
166 #endif /* CONFIG_PPC_PSERIES */
169 EXC_REAL_BEGIN(machine_check, 0x200, 0x300)
170 /* This is moved out of line as it can be patched by FW, but
171 * some code path might still want to branch into the original
174 SET_SCRATCH0(r13) /* save r13 */
176 * Running native on arch 2.06 or later, we may wakeup from winkle
177 * inside machine check. If yes, then last bit of HSPRG0 would be set
178 * to 1. Hence clear it unconditionally.
183 EXCEPTION_PROLOG_0(PACA_EXMC)
185 b machine_check_powernv_early
187 b machine_check_pSeries_0
188 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
189 EXC_REAL_END(machine_check, 0x200, 0x300)
190 EXC_VIRT_NONE(0x4200, 0x4300)
191 TRAMP_REAL_BEGIN(machine_check_powernv_early)
193 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
198 * Original R9 to R13 is saved on PACA_EXMC
200 * Switch to mc_emergency stack and handle re-entrancy (we limit
201 * the nested MCE upto level 4 to avoid stack overflow).
202 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
204 * We use paca->in_mce to check whether this is the first entry or
205 * nested machine check. We increment paca->in_mce to track nested
208 * If this is the first entry then set stack pointer to
209 * paca->mc_emergency_sp, otherwise r1 is already pointing to
210 * stack frame on mc_emergency stack.
212 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
213 * checkstop if we get another machine check exception before we do
214 * rfid with MSR_ME=1.
216 mr r11,r1 /* Save r1 */
217 lhz r10,PACA_IN_MCE(r13)
218 cmpwi r10,0 /* Are we in nested machine check */
219 bne 0f /* Yes, we are. */
220 /* First machine check entry */
221 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
222 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
223 addi r10,r10,1 /* increment paca->in_mce */
224 sth r10,PACA_IN_MCE(r13)
225 /* Limit nested MCE to level 4 to avoid stack overflow */
227 bgt 2f /* Check if we hit limit of 4 */
228 std r11,GPR1(r1) /* Save r1 on the stack. */
229 std r11,0(r1) /* make stack chain pointer */
230 mfspr r11,SPRN_SRR0 /* Save SRR0 */
232 mfspr r11,SPRN_SRR1 /* Save SRR1 */
234 mfspr r11,SPRN_DAR /* Save DAR */
236 mfspr r11,SPRN_DSISR /* Save DSISR */
238 std r9,_CCR(r1) /* Save CR in stackframe */
239 /* Save r9 through r13 from EXMC save area to stack frame. */
240 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
241 mfmsr r11 /* get MSR value */
242 ori r11,r11,MSR_ME /* turn on ME bit */
243 ori r11,r11,MSR_RI /* turn on RI bit */
244 LOAD_HANDLER(r12, machine_check_handle_early)
245 1: mtspr SPRN_SRR0,r12
248 b . /* prevent speculative execution */
250 /* Stack overflow. Stay on emergency stack and panic.
251 * Keep the ME bit off while panic-ing, so that if we hit
252 * another machine check we checkstop.
254 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
256 LOAD_HANDLER(r12, unrecover_mce)
258 andc r11,r11,r10 /* Turn off MSR_ME */
260 b . /* prevent speculative execution */
261 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
263 TRAMP_REAL_BEGIN(machine_check_pSeries)
264 .globl machine_check_fwnmi
266 SET_SCRATCH0(r13) /* save r13 */
267 EXCEPTION_PROLOG_0(PACA_EXMC)
268 machine_check_pSeries_0:
269 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST_PR, 0x200)
271 * The following is essentially EXCEPTION_PROLOG_PSERIES_1 with the
272 * difference that MSR_RI is not enabled, because PACA_EXMC is being
273 * used, so nested machine check corrupts it. machine_check_common
279 LOAD_HANDLER(r12, machine_check_common)
284 b . /* prevent speculative execution */
286 TRAMP_KVM_SKIP(PACA_EXMC, 0x200)
288 EXC_COMMON_BEGIN(machine_check_common)
290 * Machine check is different because we use a different
291 * save area: PACA_EXMC instead of PACA_EXGEN.
294 std r10,PACA_EXMC+EX_DAR(r13)
296 stw r10,PACA_EXMC+EX_DSISR(r13)
297 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
299 RECONCILE_IRQ_STATE(r10, r11)
300 ld r3,PACA_EXMC+EX_DAR(r13)
301 lwz r4,PACA_EXMC+EX_DSISR(r13)
302 /* Enable MSR_RI when finished with PACA_EXMC */
308 addi r3,r1,STACK_FRAME_OVERHEAD
309 bl machine_check_exception
312 #define MACHINE_CHECK_HANDLER_WINDUP \
313 /* Clear MSR_RI before setting SRR0 and SRR1. */\
315 mfmsr r9; /* get MSR value */ \
317 mtmsrd r9,1; /* Clear MSR_RI */ \
318 /* Move original SRR0 and SRR1 into the respective regs */ \
320 mtspr SPRN_SRR1,r9; \
322 mtspr SPRN_SRR0,r3; \
334 /* Decrement paca->in_mce. */ \
335 lhz r12,PACA_IN_MCE(r13); \
337 sth r12,PACA_IN_MCE(r13); \
339 REST_2GPRS(12, r1); \
340 /* restore original r1. */ \
344 * Handle machine check early in real mode. We come here with
345 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
347 EXC_COMMON_BEGIN(machine_check_handle_early)
348 std r0,GPR0(r1) /* Save r0 */
349 EXCEPTION_PROLOG_COMMON_3(0x200)
351 addi r3,r1,STACK_FRAME_OVERHEAD
352 bl machine_check_early
353 std r3,RESULT(r1) /* Save result */
355 #ifdef CONFIG_PPC_P7_NAP
357 * Check if thread was in power saving mode. We come here when any
358 * of the following is true:
359 * a. thread wasn't in power saving mode
360 * b. thread was in power saving mode with no state loss,
361 * supervisor state loss or hypervisor state loss.
363 * Go back to nap/sleep/winkle mode again if (b) is true.
365 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
366 beq 4f /* No, it wasn;t */
367 /* Thread was in power saving mode. Go back to nap again. */
370 /* Supervisor/Hypervisor state loss */
372 stb r0,PACA_NAPSTATELOST(r13)
373 3: bl machine_check_queue_event
374 MACHINE_CHECK_HANDLER_WINDUP
378 * Check what idle state this CPU was in and go back to same mode
381 lbz r3,PACA_THREAD_IDLE_STATE(r13)
382 cmpwi r3,PNV_THREAD_NAP
384 IDLE_STATE_ENTER_SEQ(PPC_NAP)
387 cmpwi r3,PNV_THREAD_SLEEP
389 IDLE_STATE_ENTER_SEQ(PPC_SLEEP)
394 * Go back to winkle. Please note that this thread was woken up in
395 * machine check from winkle and have not restored the per-subcore
396 * state. Hence before going back to winkle, set last bit of HSPRG0
397 * to 1. This will make sure that if this thread gets woken up
398 * again at reset vector 0x100 then it will get chance to restore
403 IDLE_STATE_ENTER_SEQ(PPC_WINKLE)
408 * Check if we are coming from hypervisor userspace. If yes then we
409 * continue in host kernel in V mode to deliver the MC event.
411 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
413 andi. r11,r12,MSR_PR /* See if coming from user. */
414 bne 9f /* continue in V mode if we are. */
417 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
419 * We are coming from kernel context. Check if we are coming from
420 * guest. if yes, then we can continue. We will fall through
421 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
423 lbz r11,HSTATE_IN_GUEST(r13)
424 cmpwi r11,0 /* Check if coming from guest */
425 bne 9f /* continue if we are. */
428 * At this point we are not sure about what context we come from.
429 * Queue up the MCE event and return from the interrupt.
430 * But before that, check if this is an un-recoverable exception.
431 * If yes, then stay on emergency stack and panic.
435 1: mfspr r11,SPRN_SRR0
436 LOAD_HANDLER(r10,unrecover_mce)
440 * We are going down. But there are chances that we might get hit by
441 * another MCE during panic path and we may run into unstable state
442 * with no way out. Hence, turn ME bit off while going down, so that
443 * when another MCE is hit during panic path, system will checkstop
444 * and hypervisor will get restarted cleanly by SP.
447 andc r10,r10,r3 /* Turn off MSR_ME */
453 * Check if we have successfully handled/recovered from error, if not
454 * then stay on emergency stack and panic.
456 ld r3,RESULT(r1) /* Load result */
457 cmpdi r3,0 /* see if we handled MCE successfully */
459 beq 1b /* if !handled then panic */
461 * Return from MC interrupt.
462 * Queue up the MCE event so that we can log it later, while
463 * returning from kernel or opal call.
465 bl machine_check_queue_event
466 MACHINE_CHECK_HANDLER_WINDUP
469 /* Deliver the machine check to host kernel in V mode. */
470 MACHINE_CHECK_HANDLER_WINDUP
471 b machine_check_pSeries
473 EXC_COMMON_BEGIN(unrecover_mce)
474 /* Invoke machine_check_exception to print MCE event and panic. */
475 addi r3,r1,STACK_FRAME_OVERHEAD
476 bl machine_check_exception
478 * We will not reach here. Even if we did, there is no way out. Call
479 * unrecoverable_exception and die.
481 1: addi r3,r1,STACK_FRAME_OVERHEAD
482 bl unrecoverable_exception
486 EXC_REAL(data_access, 0x300, 0x380)
487 EXC_VIRT(data_access, 0x4300, 0x4380, 0x300)
488 TRAMP_KVM_SKIP(PACA_EXGEN, 0x300)
490 EXC_COMMON_BEGIN(data_access_common)
492 * Here r13 points to the paca, r9 contains the saved CR,
493 * SRR0 and SRR1 are saved in r11 and r12,
494 * r9 - r13 are saved in paca->exgen.
497 std r10,PACA_EXGEN+EX_DAR(r13)
499 stw r10,PACA_EXGEN+EX_DSISR(r13)
500 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
501 RECONCILE_IRQ_STATE(r10, r11)
503 ld r3,PACA_EXGEN+EX_DAR(r13)
504 lwz r4,PACA_EXGEN+EX_DSISR(r13)
508 BEGIN_MMU_FTR_SECTION
509 b do_hash_page /* Try to handle as hpte fault */
512 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
515 EXC_REAL_BEGIN(data_access_slb, 0x380, 0x400)
517 EXCEPTION_PROLOG_0(PACA_EXSLB)
518 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
519 std r3,PACA_EXSLB+EX_R3(r13)
523 #ifndef CONFIG_RELOCATABLE
527 * We can't just use a direct branch to slb_miss_realmode
528 * because the distance from here to there depends on where
529 * the kernel ends up being put.
532 LOAD_HANDLER(r10, slb_miss_realmode)
536 EXC_REAL_END(data_access_slb, 0x380, 0x400)
538 EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x4400)
540 EXCEPTION_PROLOG_0(PACA_EXSLB)
541 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
542 std r3,PACA_EXSLB+EX_R3(r13)
546 #ifndef CONFIG_RELOCATABLE
550 * We can't just use a direct branch to slb_miss_realmode
551 * because the distance from here to there depends on where
552 * the kernel ends up being put.
555 LOAD_HANDLER(r10, slb_miss_realmode)
559 EXC_VIRT_END(data_access_slb, 0x4380, 0x4400)
560 TRAMP_KVM_SKIP(PACA_EXSLB, 0x380)
563 EXC_REAL(instruction_access, 0x400, 0x480)
564 EXC_VIRT(instruction_access, 0x4400, 0x4480, 0x400)
565 TRAMP_KVM(PACA_EXGEN, 0x400)
567 EXC_COMMON_BEGIN(instruction_access_common)
568 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
569 RECONCILE_IRQ_STATE(r10, r11)
576 BEGIN_MMU_FTR_SECTION
577 b do_hash_page /* Try to handle as hpte fault */
580 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
583 EXC_REAL_BEGIN(instruction_access_slb, 0x480, 0x500)
585 EXCEPTION_PROLOG_0(PACA_EXSLB)
586 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
587 std r3,PACA_EXSLB+EX_R3(r13)
588 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
591 #ifndef CONFIG_RELOCATABLE
595 LOAD_HANDLER(r10, slb_miss_realmode)
599 EXC_REAL_END(instruction_access_slb, 0x480, 0x500)
601 EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x4500)
603 EXCEPTION_PROLOG_0(PACA_EXSLB)
604 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
605 std r3,PACA_EXSLB+EX_R3(r13)
606 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
609 #ifndef CONFIG_RELOCATABLE
613 LOAD_HANDLER(r10, slb_miss_realmode)
617 EXC_VIRT_END(instruction_access_slb, 0x4480, 0x4500)
618 TRAMP_KVM(PACA_EXSLB, 0x480)
621 /* This handler is used by both 0x380 and 0x480 slb miss interrupts */
622 EXC_COMMON_BEGIN(slb_miss_realmode)
624 * r13 points to the PACA, r9 contains the saved CR,
625 * r12 contain the saved SRR1, SRR0 is still ready for return
626 * r3 has the faulting address
627 * r9 - r13 are saved in paca->exslb.
628 * r3 is saved in paca->slb_r3
629 * cr6.eq is set for a D-SLB miss, clear for a I-SLB miss
630 * We assume we aren't going to take any exceptions during this
634 #ifdef CONFIG_RELOCATABLE
638 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
639 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
640 std r3,PACA_EXSLB+EX_DAR(r13)
643 #ifdef CONFIG_PPC_STD_MMU_64
644 BEGIN_MMU_FTR_SECTION
645 bl slb_allocate_realmode
646 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
649 ld r10,PACA_EXSLB+EX_LR(r13)
650 ld r3,PACA_EXSLB+EX_R3(r13)
651 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
654 beq 8f /* if bad address, make full stack frame */
656 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
659 /* All done -- return from exception. */
664 mtcrf 0x02,r9 /* I/D indication is in cr6 */
665 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
668 RESTORE_PPR_PACA(PACA_EXSLB, r9)
669 ld r9,PACA_EXSLB+EX_R9(r13)
670 ld r10,PACA_EXSLB+EX_R10(r13)
671 ld r11,PACA_EXSLB+EX_R11(r13)
672 ld r12,PACA_EXSLB+EX_R12(r13)
673 ld r13,PACA_EXSLB+EX_R13(r13)
675 b . /* prevent speculative execution */
677 2: mfspr r11,SPRN_SRR0
678 LOAD_HANDLER(r10,unrecov_slb)
685 8: mfspr r11,SPRN_SRR0
686 LOAD_HANDLER(r10,bad_addr_slb)
693 EXC_COMMON_BEGIN(unrecov_slb)
694 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
695 RECONCILE_IRQ_STATE(r10, r11)
697 1: addi r3,r1,STACK_FRAME_OVERHEAD
698 bl unrecoverable_exception
701 EXC_COMMON_BEGIN(bad_addr_slb)
702 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXSLB)
703 RECONCILE_IRQ_STATE(r10, r11)
704 ld r3, PACA_EXSLB+EX_DAR(r13)
707 li r10, 0x480 /* fix trap number for I-SLB miss */
710 addi r3, r1, STACK_FRAME_OVERHEAD
714 EXC_REAL_BEGIN(hardware_interrupt, 0x500, 0x600)
715 .globl hardware_interrupt_hv;
716 hardware_interrupt_hv:
718 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt_common,
719 EXC_HV, SOFTEN_TEST_HV)
721 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
723 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt_common,
724 EXC_STD, SOFTEN_TEST_PR)
726 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
727 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
728 EXC_REAL_END(hardware_interrupt, 0x500, 0x600)
730 EXC_VIRT_BEGIN(hardware_interrupt, 0x4500, 0x4600)
731 .globl hardware_interrupt_relon_hv;
732 hardware_interrupt_relon_hv:
734 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt_common, EXC_HV, SOFTEN_TEST_HV)
736 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt_common, EXC_STD, SOFTEN_TEST_PR)
737 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
738 EXC_VIRT_END(hardware_interrupt, 0x4500, 0x4600)
740 EXC_COMMON_ASYNC(hardware_interrupt_common, 0x500, do_IRQ)
743 EXC_REAL(alignment, 0x600, 0x700)
744 EXC_VIRT(alignment, 0x4600, 0x4700, 0x600)
745 TRAMP_KVM(PACA_EXGEN, 0x600)
746 EXC_COMMON_BEGIN(alignment_common)
748 std r10,PACA_EXGEN+EX_DAR(r13)
750 stw r10,PACA_EXGEN+EX_DSISR(r13)
751 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
752 ld r3,PACA_EXGEN+EX_DAR(r13)
753 lwz r4,PACA_EXGEN+EX_DSISR(r13)
757 RECONCILE_IRQ_STATE(r10, r11)
758 addi r3,r1,STACK_FRAME_OVERHEAD
759 bl alignment_exception
763 EXC_REAL(program_check, 0x700, 0x800)
764 EXC_VIRT(program_check, 0x4700, 0x4800, 0x700)
765 TRAMP_KVM(PACA_EXGEN, 0x700)
766 EXC_COMMON_BEGIN(program_check_common)
767 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
769 RECONCILE_IRQ_STATE(r10, r11)
770 addi r3,r1,STACK_FRAME_OVERHEAD
771 bl program_check_exception
775 EXC_REAL(fp_unavailable, 0x800, 0x900)
776 EXC_VIRT(fp_unavailable, 0x4800, 0x4900, 0x800)
777 TRAMP_KVM(PACA_EXGEN, 0x800)
778 EXC_COMMON_BEGIN(fp_unavailable_common)
779 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
780 bne 1f /* if from user, just load it up */
782 RECONCILE_IRQ_STATE(r10, r11)
783 addi r3,r1,STACK_FRAME_OVERHEAD
784 bl kernel_fp_unavailable_exception
787 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
789 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
790 * transaction), go do TM stuff
792 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
794 END_FTR_SECTION_IFSET(CPU_FTR_TM)
797 b fast_exception_return
798 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
799 2: /* User process was in a transaction */
801 RECONCILE_IRQ_STATE(r10, r11)
802 addi r3,r1,STACK_FRAME_OVERHEAD
808 EXC_REAL_MASKABLE(decrementer, 0x900, 0x980)
809 EXC_VIRT_MASKABLE(decrementer, 0x4900, 0x4980, 0x900)
810 TRAMP_KVM(PACA_EXGEN, 0x900)
811 EXC_COMMON_ASYNC(decrementer_common, 0x900, timer_interrupt)
814 EXC_REAL_HV(hdecrementer, 0x980, 0xa00)
815 EXC_VIRT_HV(hdecrementer, 0x4980, 0x4a00, 0x980)
816 TRAMP_KVM_HV(PACA_EXGEN, 0x980)
817 EXC_COMMON(hdecrementer_common, 0x980, hdec_interrupt)
820 EXC_REAL_MASKABLE(doorbell_super, 0xa00, 0xb00)
821 EXC_VIRT_MASKABLE(doorbell_super, 0x4a00, 0x4b00, 0xa00)
822 TRAMP_KVM(PACA_EXGEN, 0xa00)
823 #ifdef CONFIG_PPC_DOORBELL
824 EXC_COMMON_ASYNC(doorbell_super_common, 0xa00, doorbell_exception)
826 EXC_COMMON_ASYNC(doorbell_super_common, 0xa00, unknown_exception)
830 EXC_REAL(trap_0b, 0xb00, 0xc00)
831 EXC_VIRT(trap_0b, 0x4b00, 0x4c00, 0xb00)
832 TRAMP_KVM(PACA_EXGEN, 0xb00)
833 EXC_COMMON(trap_0b_common, 0xb00, unknown_exception)
835 #define LOAD_SYSCALL_HANDLER(reg) \
836 __LOAD_HANDLER(reg, system_call_common)
838 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
839 #define SYSCALL_PSERIES_1 \
843 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
846 mfspr r11,SPRN_SRR0 ; \
849 #define SYSCALL_PSERIES_2_RFID \
850 mfspr r12,SPRN_SRR1 ; \
851 LOAD_SYSCALL_HANDLER(r10) ; \
852 mtspr SPRN_SRR0,r10 ; \
853 ld r10,PACAKMSR(r13) ; \
854 mtspr SPRN_SRR1,r10 ; \
856 b . ; /* prevent speculative execution */
858 #define SYSCALL_PSERIES_3 \
859 /* Fast LE/BE switch system call */ \
860 1: mfspr r12,SPRN_SRR1 ; \
861 xori r12,r12,MSR_LE ; \
862 mtspr SPRN_SRR1,r12 ; \
863 rfid ; /* return to userspace */ \
864 b . ; /* prevent speculative execution */
866 #if defined(CONFIG_RELOCATABLE)
868 * We can't branch directly so we do it via the CTR which
869 * is volatile across system calls.
871 #define SYSCALL_PSERIES_2_DIRECT \
872 LOAD_SYSCALL_HANDLER(r12) ; \
874 mfspr r12,SPRN_SRR1 ; \
879 /* We can branch directly */
880 #define SYSCALL_PSERIES_2_DIRECT \
881 mfspr r12,SPRN_SRR1 ; \
883 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
884 b system_call_common ;
887 EXC_REAL_BEGIN(system_call, 0xc00, 0xd00)
889 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
890 * that support it) before changing to HMT_MEDIUM. That allows the KVM
891 * code to save that value into the guest state (it is the guest's PPR
892 * value). Otherwise just change to HMT_MEDIUM as userspace has
893 * already saved the PPR.
895 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
898 std r9,PACA_EXGEN+EX_R9(r13)
899 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);
901 std r10,PACA_EXGEN+EX_R10(r13)
902 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR);
910 SYSCALL_PSERIES_2_RFID
912 EXC_REAL_END(system_call, 0xc00, 0xd00)
914 EXC_VIRT_BEGIN(system_call, 0x4c00, 0x4d00)
917 SYSCALL_PSERIES_2_DIRECT
919 EXC_VIRT_END(system_call, 0x4c00, 0x4d00)
921 TRAMP_KVM(PACA_EXGEN, 0xc00)
924 EXC_REAL(single_step, 0xd00, 0xe00)
925 EXC_VIRT(single_step, 0x4d00, 0x4e00, 0xd00)
926 TRAMP_KVM(PACA_EXGEN, 0xd00)
927 EXC_COMMON(single_step_common, 0xd00, single_step_exception)
929 EXC_REAL_OOL_HV(h_data_storage, 0xe00, 0xe20)
930 EXC_VIRT_NONE(0x4e00, 0x4e20)
931 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0xe00)
932 EXC_COMMON_BEGIN(h_data_storage_common)
934 std r10,PACA_EXGEN+EX_DAR(r13)
935 mfspr r10,SPRN_HDSISR
936 stw r10,PACA_EXGEN+EX_DSISR(r13)
937 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
939 RECONCILE_IRQ_STATE(r10, r11)
940 addi r3,r1,STACK_FRAME_OVERHEAD
945 EXC_REAL_OOL_HV(h_instr_storage, 0xe20, 0xe40)
946 EXC_VIRT_NONE(0x4e20, 0x4e40)
947 TRAMP_KVM_HV(PACA_EXGEN, 0xe20)
948 EXC_COMMON(h_instr_storage_common, 0xe20, unknown_exception)
951 EXC_REAL_OOL_HV(emulation_assist, 0xe40, 0xe60)
952 EXC_VIRT_OOL_HV(emulation_assist, 0x4e40, 0x4e60, 0xe40)
953 TRAMP_KVM_HV(PACA_EXGEN, 0xe40)
954 EXC_COMMON(emulation_assist_common, 0xe40, emulation_assist_interrupt)
958 * hmi_exception trampoline is a special case. It jumps to hmi_exception_early
959 * first, and then eventaully from there to the trampoline to get into virtual
962 __EXC_REAL_OOL_HV_DIRECT(hmi_exception, 0xe60, 0xe80, hmi_exception_early)
963 __TRAMP_REAL_REAL_OOL_MASKABLE_HV(hmi_exception, 0xe60)
964 EXC_VIRT_NONE(0x4e60, 0x4e80)
965 TRAMP_KVM_HV(PACA_EXGEN, 0xe60)
966 TRAMP_REAL_BEGIN(hmi_exception_early)
967 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, 0xe60)
968 mr r10,r1 /* Save r1 */
969 ld r1,PACAEMERGSP(r13) /* Use emergency stack */
970 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
971 std r9,_CCR(r1) /* save CR in stackframe */
972 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
973 std r11,_NIP(r1) /* save HSRR0 in stackframe */
974 mfspr r12,SPRN_HSRR1 /* Save SRR1 */
975 std r12,_MSR(r1) /* save SRR1 in stackframe */
976 std r10,0(r1) /* make stack chain pointer */
977 std r0,GPR0(r1) /* save r0 in stackframe */
978 std r10,GPR1(r1) /* save r1 in stackframe */
979 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
980 EXCEPTION_PROLOG_COMMON_3(0xe60)
981 addi r3,r1,STACK_FRAME_OVERHEAD
982 bl hmi_exception_realmode
983 /* Windup the stack. */
984 /* Move original HSRR0 and HSRR1 into the respective regs */
1002 /* restore original r1. */
1006 * Go to virtual mode and pull the HMI event information from
1009 .globl hmi_exception_after_realmode
1010 hmi_exception_after_realmode:
1012 EXCEPTION_PROLOG_0(PACA_EXGEN)
1013 b tramp_real_hmi_exception
1015 EXC_COMMON_ASYNC(hmi_exception_common, 0xe60, handle_hmi_exception)
1018 EXC_REAL_OOL_MASKABLE_HV(h_doorbell, 0xe80, 0xea0)
1019 EXC_VIRT_OOL_MASKABLE_HV(h_doorbell, 0x4e80, 0x4ea0, 0xe80)
1020 TRAMP_KVM_HV(PACA_EXGEN, 0xe80)
1021 #ifdef CONFIG_PPC_DOORBELL
1022 EXC_COMMON_ASYNC(h_doorbell_common, 0xe80, doorbell_exception)
1024 EXC_COMMON_ASYNC(h_doorbell_common, 0xe80, unknown_exception)
1028 EXC_REAL_OOL_MASKABLE_HV(h_virt_irq, 0xea0, 0xec0)
1029 EXC_VIRT_OOL_MASKABLE_HV(h_virt_irq, 0x4ea0, 0x4ec0, 0xea0)
1030 TRAMP_KVM_HV(PACA_EXGEN, 0xea0)
1031 EXC_COMMON_ASYNC(h_virt_irq_common, 0xea0, do_IRQ)
1034 EXC_REAL_NONE(0xec0, 0xf00)
1035 EXC_VIRT_NONE(0x4ec0, 0x4f00)
1038 EXC_REAL_OOL(performance_monitor, 0xf00, 0xf20)
1039 EXC_VIRT_OOL(performance_monitor, 0x4f00, 0x4f20, 0xf00)
1040 TRAMP_KVM(PACA_EXGEN, 0xf00)
1041 EXC_COMMON_ASYNC(performance_monitor_common, 0xf00, performance_monitor_exception)
1044 EXC_REAL_OOL(altivec_unavailable, 0xf20, 0xf40)
1045 EXC_VIRT_OOL(altivec_unavailable, 0x4f20, 0x4f40, 0xf20)
1046 TRAMP_KVM(PACA_EXGEN, 0xf20)
1047 EXC_COMMON_BEGIN(altivec_unavailable_common)
1048 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1049 #ifdef CONFIG_ALTIVEC
1052 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1053 BEGIN_FTR_SECTION_NESTED(69)
1054 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1055 * transaction), go do TM stuff
1057 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1059 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1062 b fast_exception_return
1063 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1064 2: /* User process was in a transaction */
1066 RECONCILE_IRQ_STATE(r10, r11)
1067 addi r3,r1,STACK_FRAME_OVERHEAD
1068 bl altivec_unavailable_tm
1072 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1075 RECONCILE_IRQ_STATE(r10, r11)
1076 addi r3,r1,STACK_FRAME_OVERHEAD
1077 bl altivec_unavailable_exception
1081 EXC_REAL_OOL(vsx_unavailable, 0xf40, 0xf60)
1082 EXC_VIRT_OOL(vsx_unavailable, 0x4f40, 0x4f60, 0xf40)
1083 TRAMP_KVM(PACA_EXGEN, 0xf40)
1084 EXC_COMMON_BEGIN(vsx_unavailable_common)
1085 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1089 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1090 BEGIN_FTR_SECTION_NESTED(69)
1091 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1092 * transaction), go do TM stuff
1094 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1096 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1099 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1100 2: /* User process was in a transaction */
1102 RECONCILE_IRQ_STATE(r10, r11)
1103 addi r3,r1,STACK_FRAME_OVERHEAD
1104 bl vsx_unavailable_tm
1108 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1111 RECONCILE_IRQ_STATE(r10, r11)
1112 addi r3,r1,STACK_FRAME_OVERHEAD
1113 bl vsx_unavailable_exception
1117 EXC_REAL_OOL(facility_unavailable, 0xf60, 0xf80)
1118 EXC_VIRT_OOL(facility_unavailable, 0x4f60, 0x4f80, 0xf60)
1119 TRAMP_KVM(PACA_EXGEN, 0xf60)
1120 EXC_COMMON(facility_unavailable_common, 0xf60, facility_unavailable_exception)
1123 EXC_REAL_OOL_HV(h_facility_unavailable, 0xf80, 0xfa0)
1124 EXC_VIRT_OOL_HV(h_facility_unavailable, 0x4f80, 0x4fa0, 0xf80)
1125 TRAMP_KVM_HV(PACA_EXGEN, 0xf80)
1126 EXC_COMMON(h_facility_unavailable_common, 0xf80, facility_unavailable_exception)
1129 EXC_REAL_NONE(0xfa0, 0x1200)
1130 EXC_VIRT_NONE(0x4fa0, 0x5200)
1132 #ifdef CONFIG_CBE_RAS
1133 EXC_REAL_HV(cbe_system_error, 0x1200, 0x1300)
1134 EXC_VIRT_NONE(0x5200, 0x5300)
1135 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1200)
1136 EXC_COMMON(cbe_system_error_common, 0x1200, cbe_system_error_exception)
1137 #else /* CONFIG_CBE_RAS */
1138 EXC_REAL_NONE(0x1200, 0x1300)
1139 EXC_VIRT_NONE(0x5200, 0x5300)
1143 EXC_REAL(instruction_breakpoint, 0x1300, 0x1400)
1144 EXC_VIRT(instruction_breakpoint, 0x5300, 0x5400, 0x1300)
1145 TRAMP_KVM_SKIP(PACA_EXGEN, 0x1300)
1146 EXC_COMMON(instruction_breakpoint_common, 0x1300, instruction_breakpoint_exception)
1148 EXC_REAL_NONE(0x1400, 0x1500)
1149 EXC_VIRT_NONE(0x5400, 0x5500)
1151 EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x1600)
1152 mtspr SPRN_SPRG_HSCRATCH0,r13
1153 EXCEPTION_PROLOG_0(PACA_EXGEN)
1154 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
1156 #ifdef CONFIG_PPC_DENORMALISATION
1157 mfspr r10,SPRN_HSRR1
1158 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
1159 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
1160 addi r11,r11,-4 /* HSRR0 is next instruction */
1165 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
1166 EXC_REAL_END(denorm_exception_hv, 0x1500, 0x1600)
1168 #ifdef CONFIG_PPC_DENORMALISATION
1169 EXC_VIRT_BEGIN(denorm_exception, 0x5500, 0x5600)
1170 b exc_real_0x1500_denorm_exception_hv
1171 EXC_VIRT_END(denorm_exception, 0x5500, 0x5600)
1173 EXC_VIRT_NONE(0x5500, 0x5600)
1176 TRAMP_KVM_SKIP(PACA_EXGEN, 0x1500)
1178 #ifdef CONFIG_PPC_DENORMALISATION
1179 TRAMP_REAL_BEGIN(denorm_assist)
1182 * To denormalise we need to move a copy of the register to itself.
1183 * For POWER6 do that here for all FP regs.
1186 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
1187 xori r10,r10,(MSR_FE0|MSR_FE1)
1191 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
1192 #define FMR4(n) FMR2(n) ; FMR2(n+2)
1193 #define FMR8(n) FMR4(n) ; FMR4(n+4)
1194 #define FMR16(n) FMR8(n) ; FMR8(n+8)
1195 #define FMR32(n) FMR16(n) ; FMR16(n+16)
1200 * To denormalise we need to move a copy of the register to itself.
1201 * For POWER7 do that here for the first 32 VSX registers only.
1204 oris r10,r10,MSR_VSX@h
1208 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
1209 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
1210 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
1211 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
1212 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
1215 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
1219 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
1221 * To denormalise we need to move a copy of the register to itself.
1222 * For POWER8 we need to do that for all 64 VSX registers
1226 mtspr SPRN_HSRR0,r11
1228 ld r9,PACA_EXGEN+EX_R9(r13)
1229 RESTORE_PPR_PACA(PACA_EXGEN, r10)
1231 ld r10,PACA_EXGEN+EX_CFAR(r13)
1233 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1234 ld r10,PACA_EXGEN+EX_R10(r13)
1235 ld r11,PACA_EXGEN+EX_R11(r13)
1236 ld r12,PACA_EXGEN+EX_R12(r13)
1237 ld r13,PACA_EXGEN+EX_R13(r13)
1242 EXC_COMMON_HV(denorm_common, 0x1500, unknown_exception)
1245 #ifdef CONFIG_CBE_RAS
1246 EXC_REAL_HV(cbe_maintenance, 0x1600, 0x1700)
1247 EXC_VIRT_NONE(0x5600, 0x5700)
1248 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1600)
1249 EXC_COMMON(cbe_maintenance_common, 0x1600, cbe_maintenance_exception)
1250 #else /* CONFIG_CBE_RAS */
1251 EXC_REAL_NONE(0x1600, 0x1700)
1252 EXC_VIRT_NONE(0x5600, 0x5700)
1256 EXC_REAL(altivec_assist, 0x1700, 0x1800)
1257 EXC_VIRT(altivec_assist, 0x5700, 0x5800, 0x1700)
1258 TRAMP_KVM(PACA_EXGEN, 0x1700)
1259 #ifdef CONFIG_ALTIVEC
1260 EXC_COMMON(altivec_assist_common, 0x1700, altivec_assist_exception)
1262 EXC_COMMON(altivec_assist_common, 0x1700, unknown_exception)
1266 #ifdef CONFIG_CBE_RAS
1267 EXC_REAL_HV(cbe_thermal, 0x1800, 0x1900)
1268 EXC_VIRT_NONE(0x5800, 0x5900)
1269 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1800)
1270 EXC_COMMON(cbe_thermal_common, 0x1800, cbe_thermal_exception)
1271 #else /* CONFIG_CBE_RAS */
1272 EXC_REAL_NONE(0x1800, 0x1900)
1273 EXC_VIRT_NONE(0x5800, 0x5900)
1278 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
1279 * - If it was a decrementer interrupt, we bump the dec to max and and return.
1280 * - If it was a doorbell we return immediately since doorbells are edge
1281 * triggered and won't automatically refire.
1282 * - If it was a HMI we return immediately since we handled it in realmode
1283 * and it won't refire.
1284 * - else we hard disable and return.
1285 * This is called with r10 containing the value to OR to the paca field.
1287 #define MASKED_INTERRUPT(_H) \
1288 masked_##_H##interrupt: \
1289 std r11,PACA_EXGEN+EX_R11(r13); \
1290 lbz r11,PACAIRQHAPPENED(r13); \
1292 stb r11,PACAIRQHAPPENED(r13); \
1293 cmpwi r10,PACA_IRQ_DEC; \
1296 ori r10,r10,0xffff; \
1297 mtspr SPRN_DEC,r10; \
1299 1: cmpwi r10,PACA_IRQ_DBELL; \
1301 cmpwi r10,PACA_IRQ_HMI; \
1303 mfspr r10,SPRN_##_H##SRR1; \
1304 rldicl r10,r10,48,1; /* clear MSR_EE */ \
1305 rotldi r10,r10,16; \
1306 mtspr SPRN_##_H##SRR1,r10; \
1308 ld r9,PACA_EXGEN+EX_R9(r13); \
1309 ld r10,PACA_EXGEN+EX_R10(r13); \
1310 ld r11,PACA_EXGEN+EX_R11(r13); \
1311 GET_SCRATCH0(r13); \
1316 * Real mode exceptions actually use this too, but alternate
1317 * instruction code patches (which end up in the common .text area)
1318 * cannot reach these if they are put there.
1320 USE_FIXED_SECTION(virt_trampolines)
1324 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1325 TRAMP_REAL_BEGIN(kvmppc_skip_interrupt)
1327 * Here all GPRs are unchanged from when the interrupt happened
1328 * except for r13, which is saved in SPRG_SCRATCH0.
1330 mfspr r13, SPRN_SRR0
1332 mtspr SPRN_SRR0, r13
1337 TRAMP_REAL_BEGIN(kvmppc_skip_Hinterrupt)
1339 * Here all GPRs are unchanged from when the interrupt happened
1340 * except for r13, which is saved in SPRG_SCRATCH0.
1342 mfspr r13, SPRN_HSRR0
1344 mtspr SPRN_HSRR0, r13
1351 * Ensure that any handlers that get invoked from the exception prologs
1352 * above are below the first 64KB (0x10000) of the kernel image because
1353 * the prologs assemble the addresses of these handlers using the
1354 * LOAD_HANDLER macro, which uses an ori instruction.
1357 /*** Common interrupt handlers ***/
1361 * Relocation-on interrupts: A subset of the interrupts can be delivered
1362 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
1363 * it. Addresses are the same as the original interrupt addresses, but
1364 * offset by 0xc000000000004000.
1365 * It's impossible to receive interrupts below 0x300 via this mechanism.
1366 * KVM: None of these traps are from the guest ; anything that escalated
1367 * to HV=1 from HV=0 is delivered via real mode handlers.
1371 * This uses the standard macro, since the original 0x300 vector
1372 * only has extra guff for STAB-based processors -- which never
1376 EXC_COMMON_BEGIN(ppc64_runlatch_on_trampoline)
1377 b __ppc64_runlatch_on
1379 USE_FIXED_SECTION(virt_trampolines)
1381 * The __end_interrupts marker must be past the out-of-line (OOL)
1382 * handlers, so that they are copied to real address 0x100 when running
1383 * a relocatable kernel. This ensures they can be reached from the short
1384 * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch
1385 * directly, without using LOAD_HANDLER().
1388 .globl __end_interrupts
1390 DEFINE_FIXED_SYMBOL(__end_interrupts)
1392 #ifdef CONFIG_PPC_970_NAP
1393 EXC_COMMON_BEGIN(power4_fixup_nap)
1395 std r9,TI_LOCAL_FLAGS(r11)
1396 ld r10,_LINK(r1) /* make idle task do the */
1397 std r10,_NIP(r1) /* equivalent of a blr */
1401 CLOSE_FIXED_SECTION(real_vectors);
1402 CLOSE_FIXED_SECTION(real_trampolines);
1403 CLOSE_FIXED_SECTION(virt_vectors);
1404 CLOSE_FIXED_SECTION(virt_trampolines);
1411 .balign IFETCH_ALIGN_BYTES
1413 #ifdef CONFIG_PPC_STD_MMU_64
1414 andis. r0,r4,0xa410 /* weird error? */
1415 bne- handle_page_fault /* if not, try to insert a HPTE */
1416 andis. r0,r4,DSISR_DABRMATCH@h
1417 bne- handle_dabr_fault
1418 CURRENT_THREAD_INFO(r11, r1)
1419 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1420 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1421 bne 77f /* then don't call hash_page now */
1424 * r3 contains the faulting address
1426 * r5 contains the trap number
1429 * at return r3 = 0 for success, 1 for page fault, negative for error
1433 bl __hash_page /* build HPTE if possible */
1434 cmpdi r3,0 /* see if __hash_page succeeded */
1437 beq fast_exc_return_irq /* Return from exception on success */
1441 #endif /* CONFIG_PPC_STD_MMU_64 */
1443 /* Here we have a page fault that hash_page can't handle. */
1447 addi r3,r1,STACK_FRAME_OVERHEAD
1453 addi r3,r1,STACK_FRAME_OVERHEAD
1458 /* We have a data breakpoint exception - handle it */
1463 addi r3,r1,STACK_FRAME_OVERHEAD
1465 12: b ret_from_except_lite
1468 #ifdef CONFIG_PPC_STD_MMU_64
1469 /* We have a page fault that hash_page could handle but HV refused
1474 addi r3,r1,STACK_FRAME_OVERHEAD
1481 * We come here as a result of a DSI at a point where we don't want
1482 * to call hash_page, such as when we are accessing memory (possibly
1483 * user memory) inside a PMU interrupt that occurred while interrupts
1484 * were soft-disabled. We want to invoke the exception handler for
1485 * the access, or panic if there isn't a handler.
1489 addi r3,r1,STACK_FRAME_OVERHEAD
1495 * Here we have detected that the kernel stack pointer is bad.
1496 * R9 contains the saved CR, r13 points to the paca,
1497 * r10 contains the (bad) kernel stack pointer,
1498 * r11 and r12 contain the saved SRR0 and SRR1.
1499 * We switch to using an emergency stack, save the registers there,
1500 * and call kernel_bad_stack(), which panics.
1503 ld r1,PACAEMERGSP(r13)
1504 subi r1,r1,64+INT_FRAME_SIZE
1510 mfspr r12,SPRN_DSISR
1536 std r10,ORIG_GPR3(r1)
1537 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1540 lhz r12,PACA_TRAP_SAVE(r13)
1542 addi r11,r1,INT_FRAME_SIZE
1547 ld r11,exception_marker@toc(r2)
1549 std r11,STACK_FRAME_OVERHEAD-16(r1)
1550 1: addi r3,r1,STACK_FRAME_OVERHEAD
1555 * Called from arch_local_irq_enable when an interrupt needs
1556 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
1557 * which kind of interrupt. MSR:EE is already off. We generate a
1558 * stackframe like if a real interrupt had happened.
1560 * Note: While MSR:EE is off, we need to make sure that _MSR
1561 * in the generated frame has EE set to 1 or the exception
1562 * handler will not properly re-enable them.
1564 _GLOBAL(__replay_interrupt)
1565 /* We are going to jump to the exception common code which
1566 * will retrieve various register values from the PACA which
1567 * we don't give a damn about, so we don't bother storing them.
1574 beq decrementer_common
1576 beq hardware_interrupt_common
1579 beq h_doorbell_common
1581 beq h_virt_irq_common
1583 beq hmi_exception_common
1586 beq doorbell_super_common
1587 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)