arch/powerpc/kernel/head_64.S

   1 /*
   2  *  PowerPC version
   3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   4  *
   5  *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
   6  *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
   7  *  Adapted for Power Macintosh by Paul Mackerras.
   8  *  Low-level exception handlers and MMU support
   9  *  rewritten by Paul Mackerras.
  10  *    Copyright (C) 1996 Paul Mackerras.
  11  *
  12  *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
  13  *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
  14  *
  15  *  This file contains the entry point for the 64-bit kernel along
  16  *  with some early initialization code common to all 64-bit powerpc
  17  *  variants.
  18  *
  19  *  This program is free software; you can redistribute it and/or
  20  *  modify it under the terms of the GNU General Public License
  21  *  as published by the Free Software Foundation; either version
  22  *  2 of the License, or (at your option) any later version.
  23  */
  24
  25 #include <linux/threads.h>
  26 #include <linux/init.h>
  27 #include <asm/reg.h>
  28 #include <asm/page.h>
  29 #include <asm/mmu.h>
  30 #include <asm/ppc_asm.h>
  31 #include <asm/asm-offsets.h>
  32 #include <asm/bug.h>
  33 #include <asm/cputable.h>
  34 #include <asm/setup.h>
  35 #include <asm/hvcall.h>
  36 #include <asm/thread_info.h>
  37 #include <asm/firmware.h>
  38 #include <asm/page_64.h>
  39 #include <asm/irqflags.h>
  40 #include <asm/kvm_book3s_asm.h>
  41 #include <asm/ptrace.h>
  42 #include <asm/hw_irq.h>
  43
  44 /* The physical memory is laid out such that the secondary processor
  45  * spin code sits at 0x0000...0x00ff. On server, the vectors follow
  46  * using the layout described in exceptions-64s.S
  47  */
  48
  49 /*
  50  * Entering into this code we make the following assumptions:
  51  *
  52  *  For pSeries or server processors:
  53  *   1. The MMU is off & open firmware is running in real mode.
  54  *   2. The kernel is entered at __start
  55  * -or- For OPAL entry:
  56  *   1. The MMU is off, processor in HV mode, primary CPU enters at 0
  57  *      with device-tree in gpr3. We also get OPAL base in r8 and
  58  *      entry in r9 for debugging purposes
  59  *   2. Secondary processors enter at 0x60 with PIR in gpr3
  60  *
  61  *  For Book3E processors:
  62  *   1. The MMU is on running in AS0 in a state defined in ePAPR
  63  *   2. The kernel is entered at __start
  64  */
  65
  66         .text
  67         .globl  _stext
  68 _stext:
  69 _GLOBAL(__start)
  70         /* NOP this out unconditionally */
  71 BEGIN_FTR_SECTION
  72         FIXUP_ENDIAN
  73         b       __start_initialization_multiplatform
  74 END_FTR_SECTION(0, 1)
  75
  76         /* Catch branch to 0 in real mode */
  77         trap
  78
  79         /* Secondary processors spin on this value until it becomes nonzero.
  80          * When it does it contains the real address of the descriptor
  81          * of the function that the cpu should jump to to continue
  82          * initialization.
  83          */
  84         .balign 8
  85         .globl  __secondary_hold_spinloop
  86 __secondary_hold_spinloop:
  87         .llong  0x0
  88
  89         /* Secondary processors write this value with their cpu # */
  90         /* after they enter the spin loop immediately below.      */
  91         .globl  __secondary_hold_acknowledge
  92 __secondary_hold_acknowledge:
  93         .llong  0x0
  94
  95 #ifdef CONFIG_RELOCATABLE
  96         /* This flag is set to 1 by a loader if the kernel should run
  97          * at the loaded address instead of the linked address.  This
  98          * is used by kexec-tools to keep the the kdump kernel in the
  99          * crash_kernel region.  The loader is responsible for
 100          * observing the alignment requirement.
 101          */
 102         /* Do not move this variable as kexec-tools knows about it. */
 103         . = 0x5c
 104         .globl  __run_at_load
 105 __run_at_load:
 106         .long   0x72756e30      /* "run0" -- relocate to 0 by default */
 107 #endif
 108
 109         . = 0x60
 110 /*
 111  * The following code is used to hold secondary processors
 112  * in a spin loop after they have entered the kernel, but
 113  * before the bulk of the kernel has been relocated.  This code
 114  * is relocated to physical address 0x60 before prom_init is run.
 115  * All of it must fit below the first exception vector at 0x100.
 116  * Use .globl here not _GLOBAL because we want __secondary_hold
 117  * to be the actual text address, not a descriptor.
 118  */
 119         .globl  __secondary_hold
 120 __secondary_hold:
 121         FIXUP_ENDIAN
 122 #ifndef CONFIG_PPC_BOOK3E
 123         mfmsr   r24
 124         ori     r24,r24,MSR_RI
 125         mtmsrd  r24                     /* RI on */
 126 #endif
 127         /* Grab our physical cpu number */
 128         mr      r24,r3
 129         /* stash r4 for book3e */
 130         mr      r25,r4
 131
 132         /* Tell the master cpu we're here */
 133         /* Relocation is off & we are located at an address less */
 134         /* than 0x100, so only need to grab low order offset.    */
 135         std     r24,__secondary_hold_acknowledge-_stext(0)
 136         sync
 137
 138         li      r26,0
 139 #ifdef CONFIG_PPC_BOOK3E
 140         tovirt(r26,r26)
 141 #endif
 142         /* All secondary cpus wait here until told to start. */
 143 100:    ld      r4,__secondary_hold_spinloop-_stext(r26)
 144         cmpdi   0,r4,0
 145         beq     100b
 146
 147 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
 148 #ifdef CONFIG_PPC_BOOK3E
 149         tovirt(r4,r4)
 150 #endif
 151         ld      r4,0(r4)                /* deref function descriptor */
 152         mtctr   r4
 153         mr      r3,r24
 154         /*
 155          * it may be the case that other platforms have r4 right to
 156          * begin with, this gives us some safety in case it is not
 157          */
 158 #ifdef CONFIG_PPC_BOOK3E
 159         mr      r4,r25
 160 #else
 161         li      r4,0
 162 #endif
 163         /* Make sure that patched code is visible */
 164         isync
 165         bctr
 166 #else
 167         BUG_OPCODE
 168 #endif
 169
 170 /* This value is used to mark exception frames on the stack. */
 171         .section ".toc","aw"
 172 exception_marker:
 173         .tc     ID_72656773_68657265[TC],0x7265677368657265
 174         .text
 175
 176 /*
 177  * On server, we include the exception vectors code here as it
 178  * relies on absolute addressing which is only possible within
 179  * this compilation unit
 180  */
 181 #ifdef CONFIG_PPC_BOOK3S
 182 #include "exceptions-64s.S"
 183 #endif
 184
 185 _GLOBAL(generic_secondary_thread_init)
 186         mr      r24,r3
 187
 188         /* turn on 64-bit mode */
 189         bl      enable_64b_mode
 190
 191         /* get a valid TOC pointer, wherever we're mapped at */
 192         bl      relative_toc
 193         tovirt(r2,r2)
 194
 195 #ifdef CONFIG_PPC_BOOK3E
 196         /* Book3E initialization */
 197         mr      r3,r24
 198         bl      book3e_secondary_thread_init
 199 #endif
 200         b       generic_secondary_common_init
 201
 202 /*
 203  * On pSeries and most other platforms, secondary processors spin
 204  * in the following code.
 205  * At entry, r3 = this processor's number (physical cpu id)
 206  *
 207  * On Book3E, r4 = 1 to indicate that the initial TLB entry for
 208  * this core already exists (setup via some other mechanism such
 209  * as SCOM before entry).
 210  */
 211 _GLOBAL(generic_secondary_smp_init)
 212         FIXUP_ENDIAN
 213         mr      r24,r3
 214         mr      r25,r4
 215
 216         /* turn on 64-bit mode */
 217         bl      enable_64b_mode
 218
 219         /* get a valid TOC pointer, wherever we're mapped at */
 220         bl      relative_toc
 221         tovirt(r2,r2)
 222
 223 #ifdef CONFIG_PPC_BOOK3E
 224         /* Book3E initialization */
 225         mr      r3,r24
 226         mr      r4,r25
 227         bl      book3e_secondary_core_init
 228 #endif
 229
 230 generic_secondary_common_init:
 231         /* Set up a paca value for this processor. Since we have the
 232          * physical cpu id in r24, we need to search the pacas to find
 233          * which logical id maps to our physical one.
 234          */
 235         LOAD_REG_ADDR(r13, paca)        /* Load paca pointer             */
 236         ld      r13,0(r13)              /* Get base vaddr of paca array  */
 237 #ifndef CONFIG_SMP
 238         addi    r13,r13,PACA_SIZE       /* know r13 if used accidentally */
 239         b       kexec_wait              /* wait for next kernel if !SMP  */
 240 #else
 241         LOAD_REG_ADDR(r7, nr_cpu_ids)   /* Load nr_cpu_ids address       */
 242         lwz     r7,0(r7)                /* also the max paca allocated   */
 243         li      r5,0                    /* logical cpu id                */
 244 1:      lhz     r6,PACAHWCPUID(r13)     /* Load HW procid from paca      */
 245         cmpw    r6,r24                  /* Compare to our id             */
 246         beq     2f
 247         addi    r13,r13,PACA_SIZE       /* Loop to next PACA on miss     */
 248         addi    r5,r5,1
 249         cmpw    r5,r7                   /* Check if more pacas exist     */
 250         blt     1b
 251
 252         mr      r3,r24                  /* not found, copy phys to r3    */
 253         b       kexec_wait              /* next kernel might do better   */
 254
 255 2:      SET_PACA(r13)
 256 #ifdef CONFIG_PPC_BOOK3E
 257         addi    r12,r13,PACA_EXTLB      /* and TLB exc frame in another  */
 258         mtspr   SPRN_SPRG_TLB_EXFRAME,r12
 259 #endif
 260
 261         /* From now on, r24 is expected to be logical cpuid */
 262         mr      r24,r5
 263
 264         /* See if we need to call a cpu state restore handler */
 265         LOAD_REG_ADDR(r23, cur_cpu_spec)
 266         ld      r23,0(r23)
 267         ld      r23,CPU_SPEC_RESTORE(r23)
 268         cmpdi   0,r23,0
 269         beq     3f
 270         ld      r23,0(r23)
 271         mtctr   r23
 272         bctrl
 273
 274 3:      LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */
 275         lwarx   r4,0,r3
 276         subi    r4,r4,1
 277         stwcx.  r4,0,r3
 278         bne     3b
 279         isync
 280
 281 4:      HMT_LOW
 282         lbz     r23,PACAPROCSTART(r13)  /* Test if this processor should */
 283                                         /* start.                        */
 284         cmpwi   0,r23,0
 285         beq     4b                      /* Loop until told to go         */
 286
 287         sync                            /* order paca.run and cur_cpu_spec */
 288         isync                           /* In case code patching happened */
 289
 290         /* Create a temp kernel stack for use before relocation is on.  */
 291         ld      r1,PACAEMERGSP(r13)
 292         subi    r1,r1,STACK_FRAME_OVERHEAD
 293
 294         b       __secondary_start
 295 #endif /* SMP */
 296
 297 /*
 298  * Turn the MMU off.
 299  * Assumes we're mapped EA == RA if the MMU is on.
 300  */
 301 #ifdef CONFIG_PPC_BOOK3S
 302 __mmu_off:
 303         mfmsr   r3
 304         andi.   r0,r3,MSR_IR|MSR_DR
 305         beqlr
 306         mflr    r4
 307         andc    r3,r3,r0
 308         mtspr   SPRN_SRR0,r4
 309         mtspr   SPRN_SRR1,r3
 310         sync
 311         rfid
 312         b       .       /* prevent speculative execution */
 313 #endif
 314
 315
 316 /*
 317  * Here is our main kernel entry point. We support currently 2 kind of entries
 318  * depending on the value of r5.
 319  *
 320  *   r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
 321  *                 in r3...r7
 322  *
 323  *   r5 == NULL -> kexec style entry. r3 is a physical pointer to the
 324  *                 DT block, r4 is a physical pointer to the kernel itself
 325  *
 326  */
 327 __start_initialization_multiplatform:
 328         /* Make sure we are running in 64 bits mode */
 329         bl      enable_64b_mode
 330
 331         /* Get TOC pointer (current runtime address) */
 332         bl      relative_toc
 333
 334         /* find out where we are now */
 335         bcl     20,31,$+4
 336 0:      mflr    r26                     /* r26 = runtime addr here */
 337         addis   r26,r26,(_stext - 0b)@ha
 338         addi    r26,r26,(_stext - 0b)@l /* current runtime base addr */
 339
 340         /*
 341          * Are we booted from a PROM Of-type client-interface ?
 342          */
 343         cmpldi  cr0,r5,0
 344         beq     1f
 345         b       __boot_from_prom                /* yes -> prom */
 346 1:
 347         /* Save parameters */
 348         mr      r31,r3
 349         mr      r30,r4
 350 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
 351         /* Save OPAL entry */
 352         mr      r28,r8
 353         mr      r29,r9
 354 #endif
 355
 356 #ifdef CONFIG_PPC_BOOK3E
 357         bl      start_initialization_book3e
 358         b       __after_prom_start
 359 #else
 360         /* Setup some critical 970 SPRs before switching MMU off */
 361         mfspr   r0,SPRN_PVR
 362         srwi    r0,r0,16
 363         cmpwi   r0,0x39         /* 970 */
 364         beq     1f
 365         cmpwi   r0,0x3c         /* 970FX */
 366         beq     1f
 367         cmpwi   r0,0x44         /* 970MP */
 368         beq     1f
 369         cmpwi   r0,0x45         /* 970GX */
 370         bne     2f
 371 1:      bl      __cpu_preinit_ppc970
 372 2:
 373
 374         /* Switch off MMU if not already off */
 375         bl      __mmu_off
 376         b       __after_prom_start
 377 #endif /* CONFIG_PPC_BOOK3E */
 378
 379 __boot_from_prom:
 380 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
 381         /* Save parameters */
 382         mr      r31,r3
 383         mr      r30,r4
 384         mr      r29,r5
 385         mr      r28,r6
 386         mr      r27,r7
 387
 388         /*
 389          * Align the stack to 16-byte boundary
 390          * Depending on the size and layout of the ELF sections in the initial
 391          * boot binary, the stack pointer may be unaligned on PowerMac
 392          */
 393         rldicr  r1,r1,0,59
 394
 395 #ifdef CONFIG_RELOCATABLE
 396         /* Relocate code for where we are now */
 397         mr      r3,r26
 398         bl      relocate
 399 #endif
 400
 401         /* Restore parameters */
 402         mr      r3,r31
 403         mr      r4,r30
 404         mr      r5,r29
 405         mr      r6,r28
 406         mr      r7,r27
 407
 408         /* Do all of the interaction with OF client interface */
 409         mr      r8,r26
 410         bl      prom_init
 411 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
 412
 413         /* We never return. We also hit that trap if trying to boot
 414          * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
 415         trap
 416
 417 __after_prom_start:
 418 #ifdef CONFIG_RELOCATABLE
 419         /* process relocations for the final address of the kernel */
 420         lis     r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
 421         sldi    r25,r25,32
 422         lwz     r7,__run_at_load-_stext(r26)
 423         cmplwi  cr0,r7,1        /* flagged to stay where we are ? */
 424         bne     1f
 425         add     r25,r25,r26
 426 1:      mr      r3,r25
 427         bl      relocate
 428 #endif
 429
 430 /*
 431  * We need to run with _stext at physical address PHYSICAL_START.
 432  * This will leave some code in the first 256B of
 433  * real memory, which are reserved for software use.
 434  *
 435  * Note: This process overwrites the OF exception vectors.
 436  */
 437         li      r3,0                    /* target addr */
 438 #ifdef CONFIG_PPC_BOOK3E
 439         tovirt(r3,r3)                   /* on booke, we already run at PAGE_OFFSET */
 440 #endif
 441         mr.     r4,r26                  /* In some cases the loader may  */
 442         beq     9f                      /* have already put us at zero */
 443         li      r6,0x100                /* Start offset, the first 0x100 */
 444                                         /* bytes were copied earlier.    */
 445 #ifdef CONFIG_PPC_BOOK3E
 446         tovirt(r6,r6)                   /* on booke, we already run at PAGE_OFFSET */
 447 #endif
 448
 449 #ifdef CONFIG_RELOCATABLE
 450 /*
 451  * Check if the kernel has to be running as relocatable kernel based on the
 452  * variable __run_at_load, if it is set the kernel is treated as relocatable
 453  * kernel, otherwise it will be moved to PHYSICAL_START
 454  */
 455         lwz     r7,__run_at_load-_stext(r26)
 456         cmplwi  cr0,r7,1
 457         bne     3f
 458
 459         /* just copy interrupts */
 460         LOAD_REG_IMMEDIATE(r5, __end_interrupts - _stext)
 461         b       5f
 462 3:
 463 #endif
 464         lis     r5,(copy_to_here - _stext)@ha
 465         addi    r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
 466
 467         bl      copy_and_flush          /* copy the first n bytes        */
 468                                         /* this includes the code being  */
 469                                         /* executed here.                */
 470         addis   r8,r3,(4f - _stext)@ha  /* Jump to the copy of this code */
 471         addi    r8,r8,(4f - _stext)@l   /* that we just made */
 472         mtctr   r8
 473         bctr
 474
 475 .balign 8
 476 p_end:  .llong  _end - _stext
 477
 478 4:      /* Now copy the rest of the kernel up to _end */
 479         addis   r5,r26,(p_end - _stext)@ha
 480         ld      r5,(p_end - _stext)@l(r5)       /* get _end */
 481 5:      bl      copy_and_flush          /* copy the rest */
 482
 483 9:      b       start_here_multiplatform
 484
 485 /*
 486  * Copy routine used to copy the kernel to start at physical address 0
 487  * and flush and invalidate the caches as needed.
 488  * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
 489  * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
 490  *
 491  * Note: this routine *only* clobbers r0, r6 and lr
 492  */
 493 _GLOBAL(copy_and_flush)
 494         addi    r5,r5,-8
 495         addi    r6,r6,-8
 496 4:      li      r0,8                    /* Use the smallest common      */
 497                                         /* denominator cache line       */
 498                                         /* size.  This results in       */
 499                                         /* extra cache line flushes     */
 500                                         /* but operation is correct.    */
 501                                         /* Can't get cache line size    */
 502                                         /* from NACA as it is being     */
 503                                         /* moved too.                   */
 504
 505         mtctr   r0                      /* put # words/line in ctr      */
 506 3:      addi    r6,r6,8                 /* copy a cache line            */
 507         ldx     r0,r6,r4
 508         stdx    r0,r6,r3
 509         bdnz    3b
 510         dcbst   r6,r3                   /* write it to memory           */
 511         sync
 512         icbi    r6,r3                   /* flush the icache line        */
 513         cmpld   0,r6,r5
 514         blt     4b
 515         sync
 516         addi    r5,r5,8
 517         addi    r6,r6,8
 518         isync
 519         blr
 520
 521 .align 8
 522 copy_to_here:
 523
 524 #ifdef CONFIG_SMP
 525 #ifdef CONFIG_PPC_PMAC
 526 /*
 527  * On PowerMac, secondary processors starts from the reset vector, which
 528  * is temporarily turned into a call to one of the functions below.
 529  */
 530         .section ".text";
 531         .align 2 ;
 532
 533         .globl  __secondary_start_pmac_0
 534 __secondary_start_pmac_0:
 535         /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
 536         li      r24,0
 537         b       1f
 538         li      r24,1
 539         b       1f
 540         li      r24,2
 541         b       1f
 542         li      r24,3
 543 1:
 544
 545 _GLOBAL(pmac_secondary_start)
 546         /* turn on 64-bit mode */
 547         bl      enable_64b_mode
 548
 549         li      r0,0
 550         mfspr   r3,SPRN_HID4
 551         rldimi  r3,r0,40,23     /* clear bit 23 (rm_ci) */
 552         sync
 553         mtspr   SPRN_HID4,r3
 554         isync
 555         sync
 556         slbia
 557
 558         /* get TOC pointer (real address) */
 559         bl      relative_toc
 560         tovirt(r2,r2)
 561
 562         /* Copy some CPU settings from CPU 0 */
 563         bl      __restore_cpu_ppc970
 564
 565         /* pSeries do that early though I don't think we really need it */
 566         mfmsr   r3
 567         ori     r3,r3,MSR_RI
 568         mtmsrd  r3                      /* RI on */
 569
 570         /* Set up a paca value for this processor. */
 571         LOAD_REG_ADDR(r4,paca)          /* Load paca pointer            */
 572         ld      r4,0(r4)                /* Get base vaddr of paca array */
 573         mulli   r13,r24,PACA_SIZE       /* Calculate vaddr of right paca */
 574         add     r13,r13,r4              /* for this processor.          */
 575         SET_PACA(r13)                   /* Save vaddr of paca in an SPRG*/
 576
 577         /* Mark interrupts soft and hard disabled (they might be enabled
 578          * in the PACA when doing hotplug)
 579          */
 580         li      r0,0
 581         stb     r0,PACASOFTIRQEN(r13)
 582         li      r0,PACA_IRQ_HARD_DIS
 583         stb     r0,PACAIRQHAPPENED(r13)
 584
 585         /* Create a temp kernel stack for use before relocation is on.  */
 586         ld      r1,PACAEMERGSP(r13)
 587         subi    r1,r1,STACK_FRAME_OVERHEAD
 588
 589         b       __secondary_start
 590
 591 #endif /* CONFIG_PPC_PMAC */
 592
 593 /*
 594  * This function is called after the master CPU has released the
 595  * secondary processors.  The execution environment is relocation off.
 596  * The paca for this processor has the following fields initialized at
 597  * this point:
 598  *   1. Processor number
 599  *   2. Segment table pointer (virtual address)
 600  * On entry the following are set:
 601  *   r1        = stack pointer (real addr of temp stack)
 602  *   r24       = cpu# (in Linux terms)
 603  *   r13       = paca virtual address
 604  *   SPRG_PACA = paca virtual address
 605  */
 606         .section ".text";
 607         .align 2 ;
 608
 609         .globl  __secondary_start
 610 __secondary_start:
 611         /* Set thread priority to MEDIUM */
 612         HMT_MEDIUM
 613
 614         /* Initialize the kernel stack */
 615         LOAD_REG_ADDR(r3, current_set)
 616         sldi    r28,r24,3               /* get current_set[cpu#]         */
 617         ldx     r14,r3,r28
 618         addi    r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
 619         std     r14,PACAKSAVE(r13)
 620
 621         /* Do early setup for that CPU (stab, slb, hash table pointer) */
 622         bl      early_setup_secondary
 623
 624         /*
 625          * setup the new stack pointer, but *don't* use this until
 626          * translation is on.
 627          */
 628         mr      r1, r14
 629
 630         /* Clear backchain so we get nice backtraces */
 631         li      r7,0
 632         mtlr    r7
 633
 634         /* Mark interrupts soft and hard disabled (they might be enabled
 635          * in the PACA when doing hotplug)
 636          */
 637         stb     r7,PACASOFTIRQEN(r13)
 638         li      r0,PACA_IRQ_HARD_DIS
 639         stb     r0,PACAIRQHAPPENED(r13)
 640
 641         /* enable MMU and jump to start_secondary */
 642         LOAD_REG_ADDR(r3, start_secondary_prolog)
 643         LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
 644
 645         mtspr   SPRN_SRR0,r3
 646         mtspr   SPRN_SRR1,r4
 647         RFI
 648         b       .       /* prevent speculative execution */
 649
 650 /*
 651  * Running with relocation on at this point.  All we want to do is
 652  * zero the stack back-chain pointer and get the TOC virtual address
 653  * before going into C code.
 654  */
 655 start_secondary_prolog:
 656         ld      r2,PACATOC(r13)
 657         li      r3,0
 658         std     r3,0(r1)                /* Zero the stack frame pointer */
 659         bl      start_secondary
 660         b       .
 661 /*
 662  * Reset stack pointer and call start_secondary
 663  * to continue with online operation when woken up
 664  * from cede in cpu offline.
 665  */
 666 _GLOBAL(start_secondary_resume)
 667         ld      r1,PACAKSAVE(r13)       /* Reload kernel stack pointer */
 668         li      r3,0
 669         std     r3,0(r1)                /* Zero the stack frame pointer */
 670         bl      start_secondary
 671         b       .
 672 #endif
 673
 674 /*
 675  * This subroutine clobbers r11 and r12
 676  */
 677 enable_64b_mode:
 678         mfmsr   r11                     /* grab the current MSR */
 679 #ifdef CONFIG_PPC_BOOK3E
 680         oris    r11,r11,0x8000          /* CM bit set, we'll set ICM later */
 681         mtmsr   r11
 682 #else /* CONFIG_PPC_BOOK3E */
 683         li      r12,(MSR_64BIT | MSR_ISF)@highest
 684         sldi    r12,r12,48
 685         or      r11,r11,r12
 686         mtmsrd  r11
 687         isync
 688 #endif
 689         blr
 690
 691 /*
 692  * This puts the TOC pointer into r2, offset by 0x8000 (as expected
 693  * by the toolchain).  It computes the correct value for wherever we
 694  * are running at the moment, using position-independent code.
 695  *
 696  * Note: The compiler constructs pointers using offsets from the
 697  * TOC in -mcmodel=medium mode. After we relocate to 0 but before
 698  * the MMU is on we need our TOC to be a virtual address otherwise
 699  * these pointers will be real addresses which may get stored and
 700  * accessed later with the MMU on. We use tovirt() at the call
 701  * sites to handle this.
 702  */
 703 _GLOBAL(relative_toc)
 704         mflr    r0
 705         bcl     20,31,$+4
 706 0:      mflr    r11
 707         ld      r2,(p_toc - 0b)(r11)
 708         add     r2,r2,r11
 709         mtlr    r0
 710         blr
 711
 712 .balign 8
 713 p_toc:  .llong  __toc_start + 0x8000 - 0b
 714
 715 /*
 716  * This is where the main kernel code starts.
 717  */
 718 start_here_multiplatform:
 719         /* set up the TOC */
 720         bl      relative_toc
 721         tovirt(r2,r2)
 722
 723         /* Clear out the BSS. It may have been done in prom_init,
 724          * already but that's irrelevant since prom_init will soon
 725          * be detached from the kernel completely. Besides, we need
 726          * to clear it now for kexec-style entry.
 727          */
 728         LOAD_REG_ADDR(r11,__bss_stop)
 729         LOAD_REG_ADDR(r8,__bss_start)
 730         sub     r11,r11,r8              /* bss size                     */
 731         addi    r11,r11,7               /* round up to an even double word */
 732         srdi.   r11,r11,3               /* shift right by 3             */
 733         beq     4f
 734         addi    r8,r8,-8
 735         li      r0,0
 736         mtctr   r11                     /* zero this many doublewords   */
 737 3:      stdu    r0,8(r8)
 738         bdnz    3b
 739 4:
 740
 741 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
 742         /* Setup OPAL entry */
 743         LOAD_REG_ADDR(r11, opal)
 744         std     r28,0(r11);
 745         std     r29,8(r11);
 746 #endif
 747
 748 #ifndef CONFIG_PPC_BOOK3E
 749         mfmsr   r6
 750         ori     r6,r6,MSR_RI
 751         mtmsrd  r6                      /* RI on */
 752 #endif
 753
 754 #ifdef CONFIG_RELOCATABLE
 755         /* Save the physical address we're running at in kernstart_addr */
 756         LOAD_REG_ADDR(r4, kernstart_addr)
 757         clrldi  r0,r25,2
 758         std     r0,0(r4)
 759 #endif
 760
 761         /* The following gets the stack set up with the regs */
 762         /* pointing to the real addr of the kernel stack.  This is   */
 763         /* all done to support the C function call below which sets  */
 764         /* up the htab.  This is done because we have relocated the  */
 765         /* kernel but are still running in real mode. */
 766
 767         LOAD_REG_ADDR(r3,init_thread_union)
 768
 769         /* set up a stack pointer */
 770         addi    r1,r3,THREAD_SIZE
 771         li      r0,0
 772         stdu    r0,-STACK_FRAME_OVERHEAD(r1)
 773
 774         /* Do very early kernel initializations, including initial hash table,
 775          * stab and slb setup before we turn on relocation.     */
 776
 777         /* Restore parameters passed from prom_init/kexec */
 778         mr      r3,r31
 779         bl      early_setup             /* also sets r13 and SPRG_PACA */
 780
 781         LOAD_REG_ADDR(r3, start_here_common)
 782         ld      r4,PACAKMSR(r13)
 783         mtspr   SPRN_SRR0,r3
 784         mtspr   SPRN_SRR1,r4
 785         RFI
 786         b       .       /* prevent speculative execution */
 787
 788         /* This is where all platforms converge execution */
 789
 790 start_here_common:
 791         /* relocation is on at this point */
 792         std     r1,PACAKSAVE(r13)
 793
 794         /* Load the TOC (virtual address) */
 795         ld      r2,PACATOC(r13)
 796
 797         /* Do more system initializations in virtual mode */
 798         bl      setup_system
 799
 800         /* Mark interrupts soft and hard disabled (they might be enabled
 801          * in the PACA when doing hotplug)
 802          */
 803         li      r0,0
 804         stb     r0,PACASOFTIRQEN(r13)
 805         li      r0,PACA_IRQ_HARD_DIS
 806         stb     r0,PACAIRQHAPPENED(r13)
 807
 808         /* Generic kernel entry */
 809         bl      start_kernel
 810
 811         /* Not reached */
 812         BUG_OPCODE
 813
 814 /*
 815  * We put a few things here that have to be page-aligned.
 816  * This stuff goes at the beginning of the bss, which is page-aligned.
 817  */
 818         .section ".bss"
 819
 820         .align  PAGE_SHIFT
 821
 822         .globl  empty_zero_page
 823 empty_zero_page:
 824         .space  PAGE_SIZE
 825
 826         .globl  swapper_pg_dir
 827 swapper_pg_dir:
 828         .space  PGD_TABLE_SIZE