arch/powerpc/kernel/idle_power7.S

   1 /*
   2  *  This file contains the power_save function for Power7 CPUs.
   3  *
   4  *  This program is free software; you can redistribute it and/or
   5  *  modify it under the terms of the GNU General Public License
   6  *  as published by the Free Software Foundation; either version
   7  *  2 of the License, or (at your option) any later version.
   8  */
   9
  10 #include <linux/threads.h>
  11 #include <asm/processor.h>
  12 #include <asm/page.h>
  13 #include <asm/cputable.h>
  14 #include <asm/thread_info.h>
  15 #include <asm/ppc_asm.h>
  16 #include <asm/asm-offsets.h>
  17 #include <asm/ppc-opcode.h>
  18 #include <asm/hw_irq.h>
  19 #include <asm/kvm_book3s_asm.h>
  20
  21 #undef DEBUG
  22
  23         .text
  24
  25 _GLOBAL(power7_idle)
  26         /* Now check if user or arch enabled NAP mode */
  27         LOAD_REG_ADDRBASE(r3,powersave_nap)
  28         lwz     r4,ADDROFF(powersave_nap)(r3)
  29         cmpwi   0,r4,0
  30         beqlr
  31         /* fall through */
  32
  33 _GLOBAL(power7_nap)
  34         /* NAP is a state loss, we create a regs frame on the
  35          * stack, fill it up with the state we care about and
  36          * stick a pointer to it in PACAR1. We really only
  37          * need to save PC, some CR bits and the NV GPRs,
  38          * but for now an interrupt frame will do.
  39          */
  40         mflr    r0
  41         std     r0,16(r1)
  42         stdu    r1,-INT_FRAME_SIZE(r1)
  43         std     r0,_LINK(r1)
  44         std     r0,_NIP(r1)
  45
  46 #ifndef CONFIG_SMP
  47         /* Make sure FPU, VSX etc... are flushed as we may lose
  48          * state when going to nap mode
  49          */
  50         bl      .discard_lazy_cpu_state
  51 #endif /* CONFIG_SMP */
  52
  53         /* Hard disable interrupts */
  54         mfmsr   r9
  55         rldicl  r9,r9,48,1
  56         rotldi  r9,r9,16
  57         mtmsrd  r9,1                    /* hard-disable interrupts */
  58
  59         /* Check if something happened while soft-disabled */
  60         lbz     r0,PACAIRQHAPPENED(r13)
  61         cmpwi   cr0,r0,0
  62         beq     1f
  63         addi    r1,r1,INT_FRAME_SIZE
  64         ld      r0,16(r1)
  65         mtlr    r0
  66         blr
  67
  68 1:      /* We mark irqs hard disabled as this is the state we'll
  69          * be in when returning and we need to tell arch_local_irq_restore()
  70          * about it
  71          */
  72         li      r0,PACA_IRQ_HARD_DIS
  73         stb     r0,PACAIRQHAPPENED(r13)
  74
  75         /* We haven't lost state ... yet */
  76         li      r0,0
  77         stb     r0,PACA_NAPSTATELOST(r13)
  78
  79         /* Continue saving state */
  80         SAVE_GPR(2, r1)
  81         SAVE_NVGPRS(r1)
  82         mfcr    r3
  83         std     r3,_CCR(r1)
  84         std     r9,_MSR(r1)
  85         std     r1,PACAR1(r13)
  86
  87 #ifdef CONFIG_KVM_BOOK3S_64_HV
  88         /* Tell KVM we're napping */
  89         li      r4,KVM_HWTHREAD_IN_NAP
  90         stb     r4,HSTATE_HWTHREAD_STATE(r13)
  91 #endif
  92
  93         /* Magic NAP mode enter sequence */
  94         std     r0,0(r1)
  95         ptesync
  96         ld      r0,0(r1)
  97 1:      cmp     cr0,r0,r0
  98         bne     1b
  99         PPC_NAP
 100         b       .
 101
 102 _GLOBAL(power7_wakeup_loss)
 103         ld      r1,PACAR1(r13)
 104         REST_NVGPRS(r1)
 105         REST_GPR(2, r1)
 106         ld      r3,_CCR(r1)
 107         ld      r4,_MSR(r1)
 108         ld      r5,_NIP(r1)
 109         addi    r1,r1,INT_FRAME_SIZE
 110         mtcr    r3
 111         mtspr   SPRN_SRR1,r4
 112         mtspr   SPRN_SRR0,r5
 113         rfid
 114
 115 _GLOBAL(power7_wakeup_noloss)
 116         lbz     r0,PACA_NAPSTATELOST(r13)
 117         cmpwi   r0,0
 118         bne     .power7_wakeup_loss
 119         ld      r1,PACAR1(r13)
 120         ld      r4,_MSR(r1)
 121         ld      r5,_NIP(r1)
 122         addi    r1,r1,INT_FRAME_SIZE
 123         mtspr   SPRN_SRR1,r4
 124         mtspr   SPRN_SRR0,r5
 125         rfid