2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
16 * This file contains the code used by various IRQ handling routines:
17 * asking for different IRQ's should be done through these routines
18 * instead of just grabbing them. Thus setups with different IRQ numbers
19 * shouldn't result in any weird surprises, and installing new handlers
22 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
23 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
24 * mask register (of which only 16 are defined), hence the weird shifting
25 * and complement of the cached_irq_mask. I want to be able to stuff
26 * this right into the SIU SMASK register.
27 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
28 * to reduce code space and undefined function references.
33 #include <linux/export.h>
34 #include <linux/threads.h>
35 #include <linux/kernel_stat.h>
36 #include <linux/signal.h>
37 #include <linux/sched.h>
38 #include <linux/ptrace.h>
39 #include <linux/ioport.h>
40 #include <linux/interrupt.h>
41 #include <linux/timex.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/delay.h>
45 #include <linux/irq.h>
46 #include <linux/seq_file.h>
47 #include <linux/cpumask.h>
48 #include <linux/profile.h>
49 #include <linux/bitops.h>
50 #include <linux/list.h>
51 #include <linux/radix-tree.h>
52 #include <linux/mutex.h>
53 #include <linux/bootmem.h>
54 #include <linux/pci.h>
55 #include <linux/debugfs.h>
57 #include <linux/of_irq.h>
59 #include <asm/uaccess.h>
61 #include <asm/pgtable.h>
63 #include <asm/cache.h>
65 #include <asm/ptrace.h>
66 #include <asm/machdep.h>
69 #include <asm/debug.h>
73 #include <asm/firmware.h>
74 #include <asm/lv1call.h>
76 #define CREATE_TRACE_POINTS
77 #include <asm/trace.h>
79 DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t
, irq_stat
);
80 EXPORT_PER_CPU_SYMBOL(irq_stat
);
82 int __irq_offset_value
;
85 EXPORT_SYMBOL(__irq_offset_value
);
86 atomic_t ppc_n_lost_interrupts
;
89 extern int tau_initialized
;
90 extern int tau_interrupts(int);
92 #endif /* CONFIG_PPC32 */
96 int distribute_irqs
= 1;
98 static inline notrace
unsigned long get_irq_happened(void)
100 unsigned long happened
;
102 __asm__
__volatile__("lbz %0,%1(13)"
103 : "=r" (happened
) : "i" (offsetof(struct paca_struct
, irq_happened
)));
108 static inline notrace
void set_soft_enabled(unsigned long enable
)
110 __asm__
__volatile__("stb %0,%1(13)"
111 : : "r" (enable
), "i" (offsetof(struct paca_struct
, soft_enabled
)));
114 static inline notrace
int decrementer_check_overflow(void)
116 u64 now
= get_tb_or_rtc();
117 u64
*next_tb
= &__get_cpu_var(decrementers_next_tb
);
121 return now
>= *next_tb
;
124 /* This is called whenever we are re-enabling interrupts
125 * and returns either 0 (nothing to do) or 500/900 if there's
126 * either an EE or a DEC to generate.
128 * This is called in two contexts: From arch_local_irq_restore()
129 * before soft-enabling interrupts, and from the exception exit
130 * path when returning from an interrupt from a soft-disabled to
131 * a soft enabled context. In both case we have interrupts hard
134 * We take care of only clearing the bits we handled in the
135 * PACA irq_happened field since we can only re-emit one at a
136 * time and we don't want to "lose" one.
138 notrace
unsigned int __check_irq_replay(void)
141 * We use local_paca rather than get_paca() to avoid all
142 * the debug_smp_processor_id() business in this low level
145 unsigned char happened
= local_paca
->irq_happened
;
147 /* Clear bit 0 which we wouldn't clear otherwise */
148 local_paca
->irq_happened
&= ~PACA_IRQ_HARD_DIS
;
151 * Force the delivery of pending soft-disabled interrupts on PS3.
152 * Any HV call will have this side effect.
154 if (firmware_has_feature(FW_FEATURE_PS3_LV1
)) {
156 lv1_get_version_info(&tmp
, &tmp2
);
160 * We may have missed a decrementer interrupt. We check the
161 * decrementer itself rather than the paca irq_happened field
162 * in case we also had a rollover while hard disabled
164 local_paca
->irq_happened
&= ~PACA_IRQ_DEC
;
165 if (decrementer_check_overflow())
168 /* Finally check if an external interrupt happened */
169 local_paca
->irq_happened
&= ~PACA_IRQ_EE
;
170 if (happened
& PACA_IRQ_EE
)
173 #ifdef CONFIG_PPC_BOOK3E
174 /* Finally check if an EPR external interrupt happened
175 * this bit is typically set if we need to handle another
176 * "edge" interrupt from within the MPIC "EPR" handler
178 local_paca
->irq_happened
&= ~PACA_IRQ_EE_EDGE
;
179 if (happened
& PACA_IRQ_EE_EDGE
)
182 local_paca
->irq_happened
&= ~PACA_IRQ_DBELL
;
183 if (happened
& PACA_IRQ_DBELL
)
185 #endif /* CONFIG_PPC_BOOK3E */
187 /* There should be nothing left ! */
188 BUG_ON(local_paca
->irq_happened
!= 0);
193 notrace
void arch_local_irq_restore(unsigned long en
)
195 unsigned char irq_happened
;
198 /* Write the new soft-enabled value */
199 set_soft_enabled(en
);
203 * From this point onward, we can take interrupts, preempt,
204 * etc... unless we got hard-disabled. We check if an event
205 * happened. If none happened, we know we can just return.
207 * We may have preempted before the check below, in which case
208 * we are checking the "new" CPU instead of the old one. This
209 * is only a problem if an event happened on the "old" CPU.
211 * External interrupt events will have caused interrupts to
212 * be hard-disabled, so there is no problem, we
213 * cannot have preempted.
215 irq_happened
= get_irq_happened();
220 * We need to hard disable to get a trusted value from
221 * __check_irq_replay(). We also need to soft-disable
222 * again to avoid warnings in there due to the use of
225 * We know that if the value in irq_happened is exactly 0x01
226 * then we are already hard disabled (there are other less
227 * common cases that we'll ignore for now), so we skip the
228 * (expensive) mtmsrd.
230 if (unlikely(irq_happened
!= PACA_IRQ_HARD_DIS
))
231 __hard_irq_disable();
235 * Check if anything needs to be re-emitted. We haven't
236 * soft-enabled yet to avoid warnings in decrementer_check_overflow
237 * accessing per-cpu variables
239 replay
= __check_irq_replay();
241 /* We can soft-enable now */
245 * And replay if we have to. This will return with interrupts
249 __replay_interrupt(replay
);
253 /* Finally, let's ensure we are hard enabled */
256 EXPORT_SYMBOL(arch_local_irq_restore
);
259 * This is specifically called by assembly code to re-enable interrupts
260 * if they are currently disabled. This is typically called before
261 * schedule() or do_signal() when returning to userspace. We do it
262 * in C to avoid the burden of dealing with lockdep etc...
264 void restore_interrupts(void)
270 #endif /* CONFIG_PPC64 */
272 int arch_show_interrupts(struct seq_file
*p
, int prec
)
276 #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
277 if (tau_initialized
) {
278 seq_printf(p
, "%*s: ", prec
, "TAU");
279 for_each_online_cpu(j
)
280 seq_printf(p
, "%10u ", tau_interrupts(j
));
281 seq_puts(p
, " PowerPC Thermal Assist (cpu temp)\n");
283 #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
285 seq_printf(p
, "%*s: ", prec
, "LOC");
286 for_each_online_cpu(j
)
287 seq_printf(p
, "%10u ", per_cpu(irq_stat
, j
).timer_irqs
);
288 seq_printf(p
, " Local timer interrupts\n");
290 seq_printf(p
, "%*s: ", prec
, "SPU");
291 for_each_online_cpu(j
)
292 seq_printf(p
, "%10u ", per_cpu(irq_stat
, j
).spurious_irqs
);
293 seq_printf(p
, " Spurious interrupts\n");
295 seq_printf(p
, "%*s: ", prec
, "CNT");
296 for_each_online_cpu(j
)
297 seq_printf(p
, "%10u ", per_cpu(irq_stat
, j
).pmu_irqs
);
298 seq_printf(p
, " Performance monitoring interrupts\n");
300 seq_printf(p
, "%*s: ", prec
, "MCE");
301 for_each_online_cpu(j
)
302 seq_printf(p
, "%10u ", per_cpu(irq_stat
, j
).mce_exceptions
);
303 seq_printf(p
, " Machine check exceptions\n");
311 u64
arch_irq_stat_cpu(unsigned int cpu
)
313 u64 sum
= per_cpu(irq_stat
, cpu
).timer_irqs
;
315 sum
+= per_cpu(irq_stat
, cpu
).pmu_irqs
;
316 sum
+= per_cpu(irq_stat
, cpu
).mce_exceptions
;
317 sum
+= per_cpu(irq_stat
, cpu
).spurious_irqs
;
322 #ifdef CONFIG_HOTPLUG_CPU
323 void migrate_irqs(void)
325 struct irq_desc
*desc
;
329 const struct cpumask
*map
= cpu_online_mask
;
331 alloc_cpumask_var(&mask
, GFP_KERNEL
);
334 struct irq_data
*data
;
335 struct irq_chip
*chip
;
337 desc
= irq_to_desc(irq
);
341 data
= irq_desc_get_irq_data(desc
);
342 if (irqd_is_per_cpu(data
))
345 chip
= irq_data_get_irq_chip(data
);
347 cpumask_and(mask
, data
->affinity
, map
);
348 if (cpumask_any(mask
) >= nr_cpu_ids
) {
349 printk("Breaking affinity for irq %i\n", irq
);
350 cpumask_copy(mask
, map
);
352 if (chip
->irq_set_affinity
)
353 chip
->irq_set_affinity(data
, mask
, true);
354 else if (desc
->action
&& !(warned
++))
355 printk("Cannot set affinity for irq %i\n", irq
);
358 free_cpumask_var(mask
);
366 static inline void handle_one_irq(unsigned int irq
)
368 struct thread_info
*curtp
, *irqtp
;
369 unsigned long saved_sp_limit
;
370 struct irq_desc
*desc
;
372 desc
= irq_to_desc(irq
);
376 /* Switch to the irq stack to handle this */
377 curtp
= current_thread_info();
378 irqtp
= hardirq_ctx
[smp_processor_id()];
380 if (curtp
== irqtp
) {
381 /* We're already on the irq stack, just handle it */
382 desc
->handle_irq(irq
, desc
);
386 saved_sp_limit
= current
->thread
.ksp_limit
;
388 irqtp
->task
= curtp
->task
;
391 /* Copy the softirq bits in preempt_count so that the
392 * softirq checks work in the hardirq context. */
393 irqtp
->preempt_count
= (irqtp
->preempt_count
& ~SOFTIRQ_MASK
) |
394 (curtp
->preempt_count
& SOFTIRQ_MASK
);
396 current
->thread
.ksp_limit
= (unsigned long)irqtp
+
397 _ALIGN_UP(sizeof(struct thread_info
), 16);
399 call_handle_irq(irq
, desc
, irqtp
, desc
->handle_irq
);
400 current
->thread
.ksp_limit
= saved_sp_limit
;
403 /* Set any flag that may have been set on the
407 set_bits(irqtp
->flags
, &curtp
->flags
);
410 static inline void check_stack_overflow(void)
412 #ifdef CONFIG_DEBUG_STACKOVERFLOW
415 sp
= __get_SP() & (THREAD_SIZE
-1);
417 /* check for stack overflow: is there less than 2KB free? */
418 if (unlikely(sp
< (sizeof(struct thread_info
) + 2048))) {
419 printk("do_IRQ: stack overflow: %ld\n",
420 sp
- sizeof(struct thread_info
));
426 void do_IRQ(struct pt_regs
*regs
)
428 struct pt_regs
*old_regs
= set_irq_regs(regs
);
431 trace_irq_entry(regs
);
435 check_stack_overflow();
438 * Query the platform PIC for the interrupt & ack it.
440 * This will typically lower the interrupt line to the CPU
442 irq
= ppc_md
.get_irq();
444 /* We can hard enable interrupts now */
445 may_hard_irq_enable();
447 /* And finally process it */
451 __get_cpu_var(irq_stat
).spurious_irqs
++;
454 set_irq_regs(old_regs
);
456 trace_irq_exit(regs
);
459 void __init
init_IRQ(void)
469 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
470 struct thread_info
*critirq_ctx
[NR_CPUS
] __read_mostly
;
471 struct thread_info
*dbgirq_ctx
[NR_CPUS
] __read_mostly
;
472 struct thread_info
*mcheckirq_ctx
[NR_CPUS
] __read_mostly
;
474 void exc_lvl_ctx_init(void)
476 struct thread_info
*tp
;
479 for_each_possible_cpu(i
) {
483 cpu_nr
= get_hard_smp_processor_id(i
);
485 memset((void *)critirq_ctx
[cpu_nr
], 0, THREAD_SIZE
);
486 tp
= critirq_ctx
[cpu_nr
];
488 tp
->preempt_count
= 0;
491 memset((void *)dbgirq_ctx
[cpu_nr
], 0, THREAD_SIZE
);
492 tp
= dbgirq_ctx
[cpu_nr
];
494 tp
->preempt_count
= 0;
496 memset((void *)mcheckirq_ctx
[cpu_nr
], 0, THREAD_SIZE
);
497 tp
= mcheckirq_ctx
[cpu_nr
];
499 tp
->preempt_count
= HARDIRQ_OFFSET
;
505 struct thread_info
*softirq_ctx
[NR_CPUS
] __read_mostly
;
506 struct thread_info
*hardirq_ctx
[NR_CPUS
] __read_mostly
;
508 void irq_ctx_init(void)
510 struct thread_info
*tp
;
513 for_each_possible_cpu(i
) {
514 memset((void *)softirq_ctx
[i
], 0, THREAD_SIZE
);
517 tp
->preempt_count
= 0;
519 memset((void *)hardirq_ctx
[i
], 0, THREAD_SIZE
);
522 tp
->preempt_count
= HARDIRQ_OFFSET
;
526 static inline void do_softirq_onstack(void)
528 struct thread_info
*curtp
, *irqtp
;
529 unsigned long saved_sp_limit
= current
->thread
.ksp_limit
;
531 curtp
= current_thread_info();
532 irqtp
= softirq_ctx
[smp_processor_id()];
533 irqtp
->task
= curtp
->task
;
535 current
->thread
.ksp_limit
= (unsigned long)irqtp
+
536 _ALIGN_UP(sizeof(struct thread_info
), 16);
537 call_do_softirq(irqtp
);
538 current
->thread
.ksp_limit
= saved_sp_limit
;
541 /* Set any flag that may have been set on the
545 set_bits(irqtp
->flags
, &curtp
->flags
);
548 void do_softirq(void)
555 local_irq_save(flags
);
557 if (local_softirq_pending())
558 do_softirq_onstack();
560 local_irq_restore(flags
);
563 irq_hw_number_t
virq_to_hw(unsigned int virq
)
565 struct irq_data
*irq_data
= irq_get_irq_data(virq
);
566 return WARN_ON(!irq_data
) ? 0 : irq_data
->hwirq
;
568 EXPORT_SYMBOL_GPL(virq_to_hw
);
571 int irq_choose_cpu(const struct cpumask
*mask
)
575 if (cpumask_equal(mask
, cpu_all_mask
)) {
576 static int irq_rover
;
577 static DEFINE_RAW_SPINLOCK(irq_rover_lock
);
580 /* Round-robin distribution... */
582 raw_spin_lock_irqsave(&irq_rover_lock
, flags
);
584 irq_rover
= cpumask_next(irq_rover
, cpu_online_mask
);
585 if (irq_rover
>= nr_cpu_ids
)
586 irq_rover
= cpumask_first(cpu_online_mask
);
590 raw_spin_unlock_irqrestore(&irq_rover_lock
, flags
);
592 cpuid
= cpumask_first_and(mask
, cpu_online_mask
);
593 if (cpuid
>= nr_cpu_ids
)
597 return get_hard_smp_processor_id(cpuid
);
600 int irq_choose_cpu(const struct cpumask
*mask
)
602 return hard_smp_processor_id();
606 int arch_early_irq_init(void)
612 static int __init
setup_noirqdistrib(char *str
)
618 __setup("noirqdistrib", setup_noirqdistrib
);
619 #endif /* CONFIG_PPC64 */