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1 /*
2 * Code for Kernel probes Jump optimization.
3 *
4 * Copyright 2017, Anju T, IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12 #include <linux/kprobes.h>
13 #include <linux/jump_label.h>
14 #include <linux/types.h>
15 #include <linux/slab.h>
16 #include <linux/list.h>
17 #include <asm/kprobes.h>
18 #include <asm/ptrace.h>
19 #include <asm/cacheflush.h>
20 #include <asm/code-patching.h>
21 #include <asm/sstep.h>
22 #include <asm/ppc-opcode.h>
23
24 #define TMPL_CALL_HDLR_IDX \
25 (optprobe_template_call_handler - optprobe_template_entry)
26 #define TMPL_EMULATE_IDX \
27 (optprobe_template_call_emulate - optprobe_template_entry)
28 #define TMPL_RET_IDX \
29 (optprobe_template_ret - optprobe_template_entry)
30 #define TMPL_OP_IDX \
31 (optprobe_template_op_address - optprobe_template_entry)
32 #define TMPL_INSN_IDX \
33 (optprobe_template_insn - optprobe_template_entry)
34 #define TMPL_END_IDX \
35 (optprobe_template_end - optprobe_template_entry)
36
37 DEFINE_INSN_CACHE_OPS(ppc_optinsn);
38
39 static bool insn_page_in_use;
40
41 static void *__ppc_alloc_insn_page(void)
42 {
43 if (insn_page_in_use)
44 return NULL;
45 insn_page_in_use = true;
46 return &optinsn_slot;
47 }
48
49 static void __ppc_free_insn_page(void *page __maybe_unused)
50 {
51 insn_page_in_use = false;
52 }
53
54 struct kprobe_insn_cache kprobe_ppc_optinsn_slots = {
55 .mutex = __MUTEX_INITIALIZER(kprobe_ppc_optinsn_slots.mutex),
56 .pages = LIST_HEAD_INIT(kprobe_ppc_optinsn_slots.pages),
57 /* insn_size initialized later */
58 .alloc = __ppc_alloc_insn_page,
59 .free = __ppc_free_insn_page,
60 .nr_garbage = 0,
61 };
62
63 /*
64 * Check if we can optimize this probe. Returns NIP post-emulation if this can
65 * be optimized and 0 otherwise.
66 */
67 static unsigned long can_optimize(struct kprobe *p)
68 {
69 struct pt_regs regs;
70 struct instruction_op op;
71 unsigned long nip = 0;
72
73 /*
74 * kprobe placed for kretprobe during boot time
75 * is not optimizing now.
76 *
77 * TODO: Optimize kprobe in kretprobe_trampoline
78 */
79 if (p->addr == (kprobe_opcode_t *)&kretprobe_trampoline)
80 return 0;
81
82 /*
83 * We only support optimizing kernel addresses, but not
84 * module addresses.
85 *
86 * FIXME: Optimize kprobes placed in module addresses.
87 */
88 if (!is_kernel_addr((unsigned long)p->addr))
89 return 0;
90
91 memset(&regs, 0, sizeof(struct pt_regs));
92 regs.nip = (unsigned long)p->addr;
93 regs.trap = 0x0;
94 regs.msr = MSR_KERNEL;
95
96 /*
97 * Kprobe placed in conditional branch instructions are
98 * not optimized, as we can't predict the nip prior with
99 * dummy pt_regs and can not ensure that the return branch
100 * from detour buffer falls in the range of address (i.e 32MB).
101 * A branch back from trampoline is set up in the detour buffer
102 * to the nip returned by the analyse_instr() here.
103 *
104 * Ensure that the instruction is not a conditional branch,
105 * and that can be emulated.
106 */
107 if (!is_conditional_branch(*p->ainsn.insn) &&
108 analyse_instr(&op, &regs, *p->ainsn.insn))
109 nip = regs.nip;
110
111 return nip;
112 }
113
114 static void optimized_callback(struct optimized_kprobe *op,
115 struct pt_regs *regs)
116 {
117 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
118 unsigned long flags;
119
120 /* This is possible if op is under delayed unoptimizing */
121 if (kprobe_disabled(&op->kp))
122 return;
123
124 local_irq_save(flags);
125 hard_irq_disable();
126
127 if (kprobe_running()) {
128 kprobes_inc_nmissed_count(&op->kp);
129 } else {
130 __this_cpu_write(current_kprobe, &op->kp);
131 regs->nip = (unsigned long)op->kp.addr;
132 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
133 opt_pre_handler(&op->kp, regs);
134 __this_cpu_write(current_kprobe, NULL);
135 }
136
137 /*
138 * No need for an explicit __hard_irq_enable() here.
139 * local_irq_restore() will re-enable interrupts,
140 * if they were hard disabled.
141 */
142 local_irq_restore(flags);
143 }
144 NOKPROBE_SYMBOL(optimized_callback);
145
146 void arch_remove_optimized_kprobe(struct optimized_kprobe *op)
147 {
148 if (op->optinsn.insn) {
149 free_ppc_optinsn_slot(op->optinsn.insn, 1);
150 op->optinsn.insn = NULL;
151 }
152 }
153
154 /*
155 * emulate_step() requires insn to be emulated as
156 * second parameter. Load register 'r4' with the
157 * instruction.
158 */
159 void patch_imm32_load_insns(unsigned int val, kprobe_opcode_t *addr)
160 {
161 /* addis r4,0,(insn)@h */
162 *addr++ = PPC_INST_ADDIS | ___PPC_RT(4) |
163 ((val >> 16) & 0xffff);
164
165 /* ori r4,r4,(insn)@l */
166 *addr = PPC_INST_ORI | ___PPC_RA(4) | ___PPC_RS(4) |
167 (val & 0xffff);
168 }
169
170 /*
171 * Generate instructions to load provided immediate 64-bit value
172 * to register 'r3' and patch these instructions at 'addr'.
173 */
174 void patch_imm64_load_insns(unsigned long val, kprobe_opcode_t *addr)
175 {
176 /* lis r3,(op)@highest */
177 *addr++ = PPC_INST_ADDIS | ___PPC_RT(3) |
178 ((val >> 48) & 0xffff);
179
180 /* ori r3,r3,(op)@higher */
181 *addr++ = PPC_INST_ORI | ___PPC_RA(3) | ___PPC_RS(3) |
182 ((val >> 32) & 0xffff);
183
184 /* rldicr r3,r3,32,31 */
185 *addr++ = PPC_INST_RLDICR | ___PPC_RA(3) | ___PPC_RS(3) |
186 __PPC_SH64(32) | __PPC_ME64(31);
187
188 /* oris r3,r3,(op)@h */
189 *addr++ = PPC_INST_ORIS | ___PPC_RA(3) | ___PPC_RS(3) |
190 ((val >> 16) & 0xffff);
191
192 /* ori r3,r3,(op)@l */
193 *addr = PPC_INST_ORI | ___PPC_RA(3) | ___PPC_RS(3) |
194 (val & 0xffff);
195 }
196
197 int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *p)
198 {
199 kprobe_opcode_t *buff, branch_op_callback, branch_emulate_step;
200 kprobe_opcode_t *op_callback_addr, *emulate_step_addr;
201 long b_offset;
202 unsigned long nip;
203
204 kprobe_ppc_optinsn_slots.insn_size = MAX_OPTINSN_SIZE;
205
206 nip = can_optimize(p);
207 if (!nip)
208 return -EILSEQ;
209
210 /* Allocate instruction slot for detour buffer */
211 buff = get_ppc_optinsn_slot();
212 if (!buff)
213 return -ENOMEM;
214
215 /*
216 * OPTPROBE uses 'b' instruction to branch to optinsn.insn.
217 *
218 * The target address has to be relatively nearby, to permit use
219 * of branch instruction in powerpc, because the address is specified
220 * in an immediate field in the instruction opcode itself, ie 24 bits
221 * in the opcode specify the address. Therefore the address should
222 * be within 32MB on either side of the current instruction.
223 */
224 b_offset = (unsigned long)buff - (unsigned long)p->addr;
225 if (!is_offset_in_branch_range(b_offset))
226 goto error;
227
228 /* Check if the return address is also within 32MB range */
229 b_offset = (unsigned long)(buff + TMPL_RET_IDX) -
230 (unsigned long)nip;
231 if (!is_offset_in_branch_range(b_offset))
232 goto error;
233
234 /* Setup template */
235 memcpy(buff, optprobe_template_entry,
236 TMPL_END_IDX * sizeof(kprobe_opcode_t));
237
238 /*
239 * Fixup the template with instructions to:
240 * 1. load the address of the actual probepoint
241 */
242 patch_imm64_load_insns((unsigned long)op, buff + TMPL_OP_IDX);
243
244 /*
245 * 2. branch to optimized_callback() and emulate_step()
246 */
247 kprobe_lookup_name("optimized_callback", op_callback_addr);
248 kprobe_lookup_name("emulate_step", emulate_step_addr);
249 if (!op_callback_addr || !emulate_step_addr) {
250 WARN(1, "kprobe_lookup_name() failed\n");
251 goto error;
252 }
253
254 branch_op_callback = create_branch((unsigned int *)buff + TMPL_CALL_HDLR_IDX,
255 (unsigned long)op_callback_addr,
256 BRANCH_SET_LINK);
257
258 branch_emulate_step = create_branch((unsigned int *)buff + TMPL_EMULATE_IDX,
259 (unsigned long)emulate_step_addr,
260 BRANCH_SET_LINK);
261
262 if (!branch_op_callback || !branch_emulate_step)
263 goto error;
264
265 buff[TMPL_CALL_HDLR_IDX] = branch_op_callback;
266 buff[TMPL_EMULATE_IDX] = branch_emulate_step;
267
268 /*
269 * 3. load instruction to be emulated into relevant register, and
270 */
271 patch_imm32_load_insns(*p->ainsn.insn, buff + TMPL_INSN_IDX);
272
273 /*
274 * 4. branch back from trampoline
275 */
276 buff[TMPL_RET_IDX] = create_branch((unsigned int *)buff + TMPL_RET_IDX,
277 (unsigned long)nip, 0);
278
279 flush_icache_range((unsigned long)buff,
280 (unsigned long)(&buff[TMPL_END_IDX]));
281
282 op->optinsn.insn = buff;
283
284 return 0;
285
286 error:
287 free_ppc_optinsn_slot(buff, 0);
288 return -ERANGE;
289
290 }
291
292 int arch_prepared_optinsn(struct arch_optimized_insn *optinsn)
293 {
294 return optinsn->insn != NULL;
295 }
296
297 /*
298 * On powerpc, Optprobes always replaces one instruction (4 bytes
299 * aligned and 4 bytes long). It is impossible to encounter another
300 * kprobe in this address range. So always return 0.
301 */
302 int arch_check_optimized_kprobe(struct optimized_kprobe *op)
303 {
304 return 0;
305 }
306
307 void arch_optimize_kprobes(struct list_head *oplist)
308 {
309 struct optimized_kprobe *op;
310 struct optimized_kprobe *tmp;
311
312 list_for_each_entry_safe(op, tmp, oplist, list) {
313 /*
314 * Backup instructions which will be replaced
315 * by jump address
316 */
317 memcpy(op->optinsn.copied_insn, op->kp.addr,
318 RELATIVEJUMP_SIZE);
319 patch_instruction(op->kp.addr,
320 create_branch((unsigned int *)op->kp.addr,
321 (unsigned long)op->optinsn.insn, 0));
322 list_del_init(&op->list);
323 }
324 }
325
326 void arch_unoptimize_kprobe(struct optimized_kprobe *op)
327 {
328 arch_arm_kprobe(&op->kp);
329 }
330
331 void arch_unoptimize_kprobes(struct list_head *oplist,
332 struct list_head *done_list)
333 {
334 struct optimized_kprobe *op;
335 struct optimized_kprobe *tmp;
336
337 list_for_each_entry_safe(op, tmp, oplist, list) {
338 arch_unoptimize_kprobe(op);
339 list_move(&op->list, done_list);
340 }
341 }
342
343 int arch_within_optimized_kprobe(struct optimized_kprobe *op,
344 unsigned long addr)
345 {
346 return ((unsigned long)op->kp.addr <= addr &&
347 (unsigned long)op->kp.addr + RELATIVEJUMP_SIZE > addr);
348 }